[u-boot.git] / test / dm / i2c.c

/*
 * Copyright (C) 2013 Google, Inc
 *
 * SPDX-License-Identifier:	GPL-2.0+
 *
 * Note: Test coverage does not include 10-bit addressing
 */

#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <i2c.h>
#include <asm/state.h>
#include <asm/test.h>
#include <dm/device-internal.h>
#include <dm/test.h>
#include <dm/uclass-internal.h>
#include <dm/util.h>
#include <test/ut.h>

static const int busnum;
static const int chip = 0x2c;

/* Test that we can find buses and chips */
static int dm_test_i2c_find(struct unit_test_state *uts)
{
	struct udevice *bus, *dev;
	const int no_chip = 0x10;

	ut_asserteq(-ENODEV, uclass_find_device_by_seq(UCLASS_I2C, busnum,
						       false, &bus));

	/*
	 * The post_bind() method will bind devices to chip selects. Check
	 * this then remove the emulation and the slave device.
	 */
	ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
	ut_assertok(dm_i2c_probe(bus, chip, 0, &dev));
	ut_asserteq(-ENODEV, dm_i2c_probe(bus, no_chip, 0, &dev));
	ut_asserteq(-ENODEV, uclass_get_device_by_seq(UCLASS_I2C, 1, &bus));

	return 0;
}
DM_TEST(dm_test_i2c_find, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);

static int dm_test_i2c_read_write(struct unit_test_state *uts)
{
	struct udevice *bus, *dev;
	uint8_t buf[5];

	ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
	ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
	ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
	ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
	ut_assertok(memcmp(buf, "\0\0AB\0", sizeof(buf)));

	return 0;
}
DM_TEST(dm_test_i2c_read_write, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);

static int dm_test_i2c_speed(struct unit_test_state *uts)
{
	struct udevice *bus, *dev;
	uint8_t buf[5];

	ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));

	/* Use test mode so we create the required errors for invalid speeds */
	sandbox_i2c_set_test_mode(bus, true);
	ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
	ut_assertok(dm_i2c_set_bus_speed(bus, 100000));
	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
	ut_assertok(dm_i2c_set_bus_speed(bus, 400000));
	ut_asserteq(400000, dm_i2c_get_bus_speed(bus));
	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
	ut_asserteq(-EINVAL, dm_i2c_write(dev, 0, buf, 5));
	sandbox_i2c_set_test_mode(bus, false);

	return 0;
}
DM_TEST(dm_test_i2c_speed, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);

static int dm_test_i2c_offset_len(struct unit_test_state *uts)
{
	struct udevice *bus, *dev;
	uint8_t buf[5];

	ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
	ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
	ut_assertok(i2c_set_chip_offset_len(dev, 1));
	ut_assertok(dm_i2c_read(dev, 0, buf, 5));

	/* This is not supported by the uclass */
	ut_asserteq(-EINVAL, i2c_set_chip_offset_len(dev, 5));

	return 0;
}
DM_TEST(dm_test_i2c_offset_len, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);

static int dm_test_i2c_probe_empty(struct unit_test_state *uts)
{
	struct udevice *bus, *dev;

	ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));

	/* Use test mode so that this chip address will always probe */
	sandbox_i2c_set_test_mode(bus, true);
	ut_assertok(dm_i2c_probe(bus, SANDBOX_I2C_TEST_ADDR, 0, &dev));
	sandbox_i2c_set_test_mode(bus, false);

	return 0;
}
DM_TEST(dm_test_i2c_probe_empty, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);

static int dm_test_i2c_bytewise(struct unit_test_state *uts)
{
	struct udevice *bus, *dev;
	struct udevice *eeprom;
	uint8_t buf[5];

	ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
	ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
	ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));

	/* Tell the EEPROM to only read/write one register at a time */
	ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
	ut_assertnonnull(eeprom);
	sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_SINGLE_BYTE);

	/* Now we only get the first byte - the rest will be 0xff */
	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
	ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));

	/* If we do a separate transaction for each byte, it works */
	ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
	ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));

	/* This will only write A */
	ut_assertok(i2c_set_chip_flags(dev, 0));
	ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
	ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));

	/* Check that the B was ignored */
	ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
	ut_assertok(memcmp(buf, "\0\0A\0\0\0", sizeof(buf)));

	/* Now write it again with the new flags, it should work */
	ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS));
	ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
	ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));

	ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS |
						DM_I2C_CHIP_RD_ADDRESS));
	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
	ut_assertok(memcmp(buf, "\0\0AB\0\0", sizeof(buf)));

	/* Restore defaults */
	sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_NONE);
	ut_assertok(i2c_set_chip_flags(dev, 0));

	return 0;
}
DM_TEST(dm_test_i2c_bytewise, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);

static int dm_test_i2c_offset(struct unit_test_state *uts)
{
	struct udevice *eeprom;
	struct udevice *dev;
	uint8_t buf[5];

	ut_assertok(i2c_get_chip_for_busnum(busnum, chip, 1, &dev));

	/* Do a transfer so we can find the emulator */
	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
	ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));

	/* Offset length 0 */
	sandbox_i2c_eeprom_set_offset_len(eeprom, 0);
	ut_assertok(i2c_set_chip_offset_len(dev, 0));
	ut_assertok(dm_i2c_write(dev, 10 /* ignored */, (uint8_t *)"AB", 2));
	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
	ut_assertok(memcmp(buf, "AB\0\0\0\0", sizeof(buf)));

	/* Offset length 1 */
	sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
	ut_assertok(i2c_set_chip_offset_len(dev, 1));
	ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
	ut_assertok(memcmp(buf, "ABAB\0", sizeof(buf)));

	/* Offset length 2 */
	sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
	ut_assertok(i2c_set_chip_offset_len(dev, 2));
	ut_assertok(dm_i2c_write(dev, 0x210, (uint8_t *)"AB", 2));
	ut_assertok(dm_i2c_read(dev, 0x210, buf, 5));
	ut_assertok(memcmp(buf, "AB\0\0\0", sizeof(buf)));

	/* Offset length 3 */
	sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
	ut_assertok(i2c_set_chip_offset_len(dev, 2));
	ut_assertok(dm_i2c_write(dev, 0x410, (uint8_t *)"AB", 2));
	ut_assertok(dm_i2c_read(dev, 0x410, buf, 5));
	ut_assertok(memcmp(buf, "AB\0\0\0", sizeof(buf)));

	/* Offset length 4 */
	sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
	ut_assertok(i2c_set_chip_offset_len(dev, 2));
	ut_assertok(dm_i2c_write(dev, 0x420, (uint8_t *)"AB", 2));
	ut_assertok(dm_i2c_read(dev, 0x420, buf, 5));
	ut_assertok(memcmp(buf, "AB\0\0\0", sizeof(buf)));

	/* Restore defaults */
	sandbox_i2c_eeprom_set_offset_len(eeprom, 1);

	return 0;
}
DM_TEST(dm_test_i2c_offset, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
Commit	Line	Data
ecc2ed55 SG	1	/*
	2	* Copyright (C) 2013 Google, Inc
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*
	6	* Note: Test coverage does not include 10-bit addressing
	7	*/
	8
	9	#include <common.h>
	10	#include <dm.h>
	11	#include <fdtdec.h>
	12	#include <i2c.h>
e721b882 JH	13	#include <asm/state.h>
e721b882 JH	14	#include <asm/test.h>
ecc2ed55 SG	15	#include <dm/device-internal.h>
	16	#include <dm/test.h>
	17	#include <dm/uclass-internal.h>
ecc2ed55	18	#include <dm/util.h>
e721b882	19	#include <test/ut.h>
ecc2ed55 SG	20
	21	static const int busnum;
	22	static const int chip = 0x2c;
	23
	24	/* Test that we can find buses and chips */
e721b882	25	static int dm_test_i2c_find(struct unit_test_state *uts)
ecc2ed55 SG	26	{
	27	struct udevice bus, dev;
	28	const int no_chip = 0x10;
	29
	30	ut_asserteq(-ENODEV, uclass_find_device_by_seq(UCLASS_I2C, busnum,
	31	false, &bus));
	32
	33	/*
91195485 SG	34	* The post_bind() method will bind devices to chip selects. Check
91195485 SG	35	* this then remove the emulation and the slave device.
ecc2ed55 SG	36	*/
ecc2ed55 SG	37	ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
f9a4c2da SG	38	ut_assertok(dm_i2c_probe(bus, chip, 0, &dev));
f9a4c2da SG	39	ut_asserteq(-ENODEV, dm_i2c_probe(bus, no_chip, 0, &dev));
ecc2ed55 SG	40	ut_asserteq(-ENODEV, uclass_get_device_by_seq(UCLASS_I2C, 1, &bus));
	41
	42	return 0;
	43	}
	44	DM_TEST(dm_test_i2c_find, DM_TESTF_SCAN_PDATA \| DM_TESTF_SCAN_FDT);
	45
e721b882	46	static int dm_test_i2c_read_write(struct unit_test_state *uts)
ecc2ed55 SG	47	{
	48	struct udevice bus, dev;
	49	uint8_t buf[5];
	50
	51	ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
25ab4b03	52	ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
f9a4c2da	53	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
ecc2ed55	54	ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
f9a4c2da SG	55	ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
f9a4c2da SG	56	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
ecc2ed55 SG	57	ut_assertok(memcmp(buf, "\0\0AB\0", sizeof(buf)));
	58
	59	return 0;
	60	}
	61	DM_TEST(dm_test_i2c_read_write, DM_TESTF_SCAN_PDATA \| DM_TESTF_SCAN_FDT);
	62
e721b882	63	static int dm_test_i2c_speed(struct unit_test_state *uts)
ecc2ed55 SG	64	{
	65	struct udevice bus, dev;
	66	uint8_t buf[5];
	67
	68	ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
182bf92d SG	69
	70	/* Use test mode so we create the required errors for invalid speeds */
	71	sandbox_i2c_set_test_mode(bus, true);
25ab4b03	72	ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
ca88b9b9	73	ut_assertok(dm_i2c_set_bus_speed(bus, 100000));
f9a4c2da	74	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
ca88b9b9 SG	75	ut_assertok(dm_i2c_set_bus_speed(bus, 400000));
ca88b9b9 SG	76	ut_asserteq(400000, dm_i2c_get_bus_speed(bus));
f9a4c2da SG	77	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
f9a4c2da SG	78	ut_asserteq(-EINVAL, dm_i2c_write(dev, 0, buf, 5));
182bf92d	79	sandbox_i2c_set_test_mode(bus, false);
ecc2ed55 SG	80
	81	return 0;
	82	}
	83	DM_TEST(dm_test_i2c_speed, DM_TESTF_SCAN_PDATA \| DM_TESTF_SCAN_FDT);
	84
e721b882	85	static int dm_test_i2c_offset_len(struct unit_test_state *uts)
ecc2ed55 SG	86	{
	87	struct udevice bus, dev;
	88	uint8_t buf[5];
	89
	90	ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
25ab4b03	91	ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
ecc2ed55	92	ut_assertok(i2c_set_chip_offset_len(dev, 1));
f9a4c2da	93	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
ecc2ed55 SG	94
	95	/* This is not supported by the uclass */
	96	ut_asserteq(-EINVAL, i2c_set_chip_offset_len(dev, 5));
	97
	98	return 0;
	99	}
	100	DM_TEST(dm_test_i2c_offset_len, DM_TESTF_SCAN_PDATA \| DM_TESTF_SCAN_FDT);
	101
e721b882	102	static int dm_test_i2c_probe_empty(struct unit_test_state *uts)
ecc2ed55 SG	103	{
	104	struct udevice bus, dev;
	105
	106	ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
182bf92d SG	107
	108	/* Use test mode so that this chip address will always probe */
	109	sandbox_i2c_set_test_mode(bus, true);
f9a4c2da	110	ut_assertok(dm_i2c_probe(bus, SANDBOX_I2C_TEST_ADDR, 0, &dev));
182bf92d	111	sandbox_i2c_set_test_mode(bus, false);
ecc2ed55 SG	112
	113	return 0;
	114	}
	115	DM_TEST(dm_test_i2c_probe_empty, DM_TESTF_SCAN_PDATA \| DM_TESTF_SCAN_FDT);
	116
e721b882	117	static int dm_test_i2c_bytewise(struct unit_test_state *uts)
ecc2ed55 SG	118	{
	119	struct udevice bus, dev;
	120	struct udevice *eeprom;
	121	uint8_t buf[5];
	122
	123	ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
25ab4b03	124	ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
f9a4c2da	125	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
ecc2ed55 SG	126	ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
	127
	128	/* Tell the EEPROM to only read/write one register at a time */
	129	ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
	130	ut_assertnonnull(eeprom);
	131	sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_SINGLE_BYTE);
	132
	133	/* Now we only get the first byte - the rest will be 0xff */
f9a4c2da	134	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
ecc2ed55 SG	135	ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));
	136
	137	/* If we do a separate transaction for each byte, it works */
	138	ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
f9a4c2da	139	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
ecc2ed55 SG	140	ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
	141
	142	/* This will only write A */
	143	ut_assertok(i2c_set_chip_flags(dev, 0));
f9a4c2da SG	144	ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
f9a4c2da SG	145	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
ecc2ed55 SG	146	ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));
	147
	148	/* Check that the B was ignored */
	149	ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
f9a4c2da	150	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
ecc2ed55 SG	151	ut_assertok(memcmp(buf, "\0\0A\0\0\0", sizeof(buf)));
	152
	153	/* Now write it again with the new flags, it should work */
	154	ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS));
f9a4c2da SG	155	ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
f9a4c2da SG	156	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
ecc2ed55 SG	157	ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));
	158
	159	ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS \|
	160	DM_I2C_CHIP_RD_ADDRESS));
f9a4c2da	161	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
ecc2ed55 SG	162	ut_assertok(memcmp(buf, "\0\0AB\0\0", sizeof(buf)));
	163
	164	/* Restore defaults */
	165	sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_NONE);
	166	ut_assertok(i2c_set_chip_flags(dev, 0));
	167
	168	return 0;
	169	}
	170	DM_TEST(dm_test_i2c_bytewise, DM_TESTF_SCAN_PDATA \| DM_TESTF_SCAN_FDT);
	171
e721b882	172	static int dm_test_i2c_offset(struct unit_test_state *uts)
ecc2ed55 SG	173	{
	174	struct udevice *eeprom;
	175	struct udevice *dev;
	176	uint8_t buf[5];
	177
25ab4b03	178	ut_assertok(i2c_get_chip_for_busnum(busnum, chip, 1, &dev));
ecc2ed55 SG	179
ecc2ed55 SG	180	/* Do a transfer so we can find the emulator */
f9a4c2da	181	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
ecc2ed55 SG	182	ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
	183
	184	/* Offset length 0 */
	185	sandbox_i2c_eeprom_set_offset_len(eeprom, 0);
	186	ut_assertok(i2c_set_chip_offset_len(dev, 0));
f9a4c2da SG	187	ut_assertok(dm_i2c_write(dev, 10 /* ignored /, (uint8_t )"AB", 2));
f9a4c2da SG	188	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
ecc2ed55 SG	189	ut_assertok(memcmp(buf, "AB\0\0\0\0", sizeof(buf)));
	190
	191	/* Offset length 1 */
	192	sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
	193	ut_assertok(i2c_set_chip_offset_len(dev, 1));
f9a4c2da SG	194	ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
f9a4c2da SG	195	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
ecc2ed55 SG	196	ut_assertok(memcmp(buf, "ABAB\0", sizeof(buf)));
	197
	198	/* Offset length 2 */
	199	sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
	200	ut_assertok(i2c_set_chip_offset_len(dev, 2));
f9a4c2da SG	201	ut_assertok(dm_i2c_write(dev, 0x210, (uint8_t *)"AB", 2));
f9a4c2da SG	202	ut_assertok(dm_i2c_read(dev, 0x210, buf, 5));
ecc2ed55 SG	203	ut_assertok(memcmp(buf, "AB\0\0\0", sizeof(buf)));
	204
	205	/* Offset length 3 */
	206	sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
	207	ut_assertok(i2c_set_chip_offset_len(dev, 2));
f9a4c2da SG	208	ut_assertok(dm_i2c_write(dev, 0x410, (uint8_t *)"AB", 2));
f9a4c2da SG	209	ut_assertok(dm_i2c_read(dev, 0x410, buf, 5));
ecc2ed55 SG	210	ut_assertok(memcmp(buf, "AB\0\0\0", sizeof(buf)));
	211
	212	/* Offset length 4 */
	213	sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
	214	ut_assertok(i2c_set_chip_offset_len(dev, 2));
f9a4c2da SG	215	ut_assertok(dm_i2c_write(dev, 0x420, (uint8_t *)"AB", 2));
f9a4c2da SG	216	ut_assertok(dm_i2c_read(dev, 0x420, buf, 5));
ecc2ed55 SG	217	ut_assertok(memcmp(buf, "AB\0\0\0", sizeof(buf)));
	218
	219	/* Restore defaults */
	220	sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
	221
	222	return 0;
	223	}
	224	DM_TEST(dm_test_i2c_offset, DM_TESTF_SCAN_PDATA \| DM_TESTF_SCAN_FDT);