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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
71f95118 WD |
2 | /* |
3 | * (C) Copyright 2003 | |
4 | * Kyle Harris, [email protected] | |
71f95118 WD |
5 | */ |
6 | ||
7 | #include <common.h> | |
e6f6f9e6 | 8 | #include <blk.h> |
71f95118 | 9 | #include <command.h> |
24b852a7 | 10 | #include <console.h> |
4e4bf944 | 11 | #include <display_options.h> |
d581076a | 12 | #include <memalign.h> |
71f95118 | 13 | #include <mmc.h> |
e6f6f9e6 | 14 | #include <part.h> |
732bc7ce JB |
15 | #include <sparse_format.h> |
16 | #include <image-sparse.h> | |
71f95118 | 17 | |
02e22c2d | 18 | static int curr_device = -1; |
272cc70b AF |
19 | |
20 | static void print_mmcinfo(struct mmc *mmc) | |
21 | { | |
c5f0d3f1 DSC |
22 | int i; |
23 | ||
93bfd616 | 24 | printf("Device: %s\n", mmc->cfg->name); |
272cc70b | 25 | printf("Manufacturer ID: %x\n", mmc->cid[0] >> 24); |
84191f73 MM |
26 | if (IS_SD(mmc)) { |
27 | printf("OEM: %x\n", (mmc->cid[0] >> 8) & 0xffff); | |
28 | printf("Name: %c%c%c%c%c \n", mmc->cid[0] & 0xff, | |
29 | (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, | |
30 | (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff); | |
31 | } else { | |
32 | printf("OEM: %x\n", (mmc->cid[0] >> 8) & 0xff); | |
33 | printf("Name: %c%c%c%c%c%c \n", mmc->cid[0] & 0xff, | |
34 | (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, | |
35 | (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff, | |
36 | (mmc->cid[2] >> 24)); | |
37 | } | |
272cc70b | 38 | |
7a96ec74 | 39 | printf("Bus Speed: %d\n", mmc->clock); |
52d241df | 40 | #if CONFIG_IS_ENABLED(MMC_VERBOSE) |
41e30dcf | 41 | printf("Mode: %s\n", mmc_mode_name(mmc->selected_mode)); |
52d241df JJH |
42 | mmc_dump_capabilities("card capabilities", mmc->card_caps); |
43 | mmc_dump_capabilities("host capabilities", mmc->host_caps); | |
44 | #endif | |
272cc70b AF |
45 | printf("Rd Block Len: %d\n", mmc->read_bl_len); |
46 | ||
4b7cee53 PA |
47 | printf("%s version %d.%d", IS_SD(mmc) ? "SD" : "MMC", |
48 | EXTRACT_SDMMC_MAJOR_VERSION(mmc->version), | |
49 | EXTRACT_SDMMC_MINOR_VERSION(mmc->version)); | |
50 | if (EXTRACT_SDMMC_CHANGE_VERSION(mmc->version) != 0) | |
51 | printf(".%d", EXTRACT_SDMMC_CHANGE_VERSION(mmc->version)); | |
52 | printf("\n"); | |
272cc70b AF |
53 | |
54 | printf("High Capacity: %s\n", mmc->high_capacity ? "Yes" : "No"); | |
940e0782 MK |
55 | puts("Capacity: "); |
56 | print_size(mmc->capacity, "\n"); | |
272cc70b | 57 | |
786e8f81 AG |
58 | printf("Bus Width: %d-bit%s\n", mmc->bus_width, |
59 | mmc->ddr_mode ? " DDR" : ""); | |
c5f0d3f1 | 60 | |
e6fa5a54 | 61 | #if CONFIG_IS_ENABLED(MMC_WRITE) |
b0361526 DSC |
62 | puts("Erase Group Size: "); |
63 | print_size(((u64)mmc->erase_grp_size) << 9, "\n"); | |
e6fa5a54 | 64 | #endif |
b0361526 | 65 | |
525ada21 | 66 | if (!IS_SD(mmc) && mmc->version >= MMC_VERSION_4_41) { |
c3dbb4f9 | 67 | bool has_enh = (mmc->part_support & ENHNCD_SUPPORT) != 0; |
beb98a14 | 68 | bool usr_enh = has_enh && (mmc->part_attr & EXT_CSD_ENH_USR); |
d581076a MV |
69 | ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); |
70 | u8 wp; | |
d5210e45 | 71 | int ret; |
b0361526 | 72 | |
b7a6e2c9 | 73 | #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING) |
b0361526 DSC |
74 | puts("HC WP Group Size: "); |
75 | print_size(((u64)mmc->hc_wp_grp_size) << 9, "\n"); | |
b7a6e2c9 | 76 | #endif |
b0361526 | 77 | |
c5f0d3f1 | 78 | puts("User Capacity: "); |
9e41a00b DSC |
79 | print_size(mmc->capacity_user, usr_enh ? " ENH" : ""); |
80 | if (mmc->wr_rel_set & EXT_CSD_WR_DATA_REL_USR) | |
81 | puts(" WRREL\n"); | |
82 | else | |
83 | putc('\n'); | |
beb98a14 DSC |
84 | if (usr_enh) { |
85 | puts("User Enhanced Start: "); | |
86 | print_size(mmc->enh_user_start, "\n"); | |
87 | puts("User Enhanced Size: "); | |
88 | print_size(mmc->enh_user_size, "\n"); | |
89 | } | |
c5f0d3f1 | 90 | puts("Boot Capacity: "); |
c3dbb4f9 | 91 | print_size(mmc->capacity_boot, has_enh ? " ENH\n" : "\n"); |
c5f0d3f1 | 92 | puts("RPMB Capacity: "); |
c3dbb4f9 | 93 | print_size(mmc->capacity_rpmb, has_enh ? " ENH\n" : "\n"); |
b0361526 | 94 | |
c5f0d3f1 | 95 | for (i = 0; i < ARRAY_SIZE(mmc->capacity_gp); i++) { |
c3dbb4f9 DSC |
96 | bool is_enh = has_enh && |
97 | (mmc->part_attr & EXT_CSD_ENH_GP(i)); | |
c5f0d3f1 | 98 | if (mmc->capacity_gp[i]) { |
f289fd73 | 99 | printf("GP%i Capacity: ", i+1); |
c3dbb4f9 | 100 | print_size(mmc->capacity_gp[i], |
9e41a00b DSC |
101 | is_enh ? " ENH" : ""); |
102 | if (mmc->wr_rel_set & EXT_CSD_WR_DATA_REL_GP(i)) | |
103 | puts(" WRREL\n"); | |
104 | else | |
105 | putc('\n'); | |
c5f0d3f1 DSC |
106 | } |
107 | } | |
d5210e45 HS |
108 | ret = mmc_send_ext_csd(mmc, ext_csd); |
109 | if (ret) | |
110 | return; | |
111 | wp = ext_csd[EXT_CSD_BOOT_WP_STATUS]; | |
112 | for (i = 0; i < 2; ++i) { | |
113 | printf("Boot area %d is ", i); | |
114 | switch (wp & 3) { | |
115 | case 0: | |
116 | printf("not write protected\n"); | |
117 | break; | |
118 | case 1: | |
119 | printf("power on protected\n"); | |
120 | break; | |
121 | case 2: | |
122 | printf("permanently protected\n"); | |
123 | break; | |
124 | default: | |
125 | printf("in reserved protection state\n"); | |
126 | break; | |
127 | } | |
128 | wp >>= 2; | |
129 | } | |
c5f0d3f1 | 130 | } |
272cc70b | 131 | } |
19f7a34a AG |
132 | |
133 | static struct mmc *__init_mmc_device(int dev, bool force_init, | |
134 | enum bus_mode speed_mode) | |
1fd93c6e PA |
135 | { |
136 | struct mmc *mmc; | |
137 | mmc = find_mmc_device(dev); | |
138 | if (!mmc) { | |
139 | printf("no mmc device at slot %x\n", dev); | |
140 | return NULL; | |
141 | } | |
bcfde7ff | 142 | |
d2a08369 MV |
143 | if (!mmc_getcd(mmc)) |
144 | force_init = true; | |
145 | ||
1ae24a50 SW |
146 | if (force_init) |
147 | mmc->has_init = 0; | |
19f7a34a AG |
148 | |
149 | if (IS_ENABLED(CONFIG_MMC_SPEED_MODE_SET)) | |
150 | mmc->user_speed_mode = speed_mode; | |
151 | ||
1fd93c6e PA |
152 | if (mmc_init(mmc)) |
153 | return NULL; | |
1d044d32 MV |
154 | |
155 | #ifdef CONFIG_BLOCK_CACHE | |
156 | struct blk_desc *bd = mmc_get_blk_desc(mmc); | |
8149b150 | 157 | blkcache_invalidate(bd->uclass_id, bd->devnum); |
1d044d32 MV |
158 | #endif |
159 | ||
1fd93c6e PA |
160 | return mmc; |
161 | } | |
09140113 | 162 | |
19f7a34a AG |
163 | static struct mmc *init_mmc_device(int dev, bool force_init) |
164 | { | |
165 | return __init_mmc_device(dev, force_init, MMC_MODES_END); | |
166 | } | |
167 | ||
09140113 SG |
168 | static int do_mmcinfo(struct cmd_tbl *cmdtp, int flag, int argc, |
169 | char *const argv[]) | |
272cc70b AF |
170 | { |
171 | struct mmc *mmc; | |
272cc70b | 172 | |
ea6ebe21 LW |
173 | if (curr_device < 0) { |
174 | if (get_mmc_num() > 0) | |
175 | curr_device = 0; | |
176 | else { | |
177 | puts("No MMC device available\n"); | |
178 | return 1; | |
179 | } | |
180 | } | |
272cc70b | 181 | |
1ae24a50 | 182 | mmc = init_mmc_device(curr_device, false); |
1fd93c6e PA |
183 | if (!mmc) |
184 | return CMD_RET_FAILURE; | |
272cc70b | 185 | |
1fd93c6e PA |
186 | print_mmcinfo(mmc); |
187 | return CMD_RET_SUCCESS; | |
188 | } | |
272cc70b | 189 | |
5a7b11e6 | 190 | #if CONFIG_IS_ENABLED(CMD_MMC_RPMB) |
1fd93c6e PA |
191 | static int confirm_key_prog(void) |
192 | { | |
193 | puts("Warning: Programming authentication key can be done only once !\n" | |
194 | " Use this command only if you are sure of what you are doing,\n" | |
195 | "Really perform the key programming? <y/N> "); | |
196 | if (confirm_yesno()) | |
ea6ebe21 | 197 | return 1; |
1fd93c6e PA |
198 | |
199 | puts("Authentication key programming aborted\n"); | |
200 | return 0; | |
201 | } | |
09140113 SG |
202 | |
203 | static int do_mmcrpmb_key(struct cmd_tbl *cmdtp, int flag, | |
204 | int argc, char *const argv[]) | |
1fd93c6e PA |
205 | { |
206 | void *key_addr; | |
207 | struct mmc *mmc = find_mmc_device(curr_device); | |
208 | ||
209 | if (argc != 2) | |
210 | return CMD_RET_USAGE; | |
211 | ||
7e5f460e | 212 | key_addr = (void *)hextoul(argv[1], NULL); |
1fd93c6e PA |
213 | if (!confirm_key_prog()) |
214 | return CMD_RET_FAILURE; | |
215 | if (mmc_rpmb_set_key(mmc, key_addr)) { | |
216 | printf("ERROR - Key already programmed ?\n"); | |
217 | return CMD_RET_FAILURE; | |
272cc70b | 218 | } |
1fd93c6e | 219 | return CMD_RET_SUCCESS; |
272cc70b | 220 | } |
09140113 SG |
221 | |
222 | static int do_mmcrpmb_read(struct cmd_tbl *cmdtp, int flag, | |
223 | int argc, char *const argv[]) | |
1fd93c6e PA |
224 | { |
225 | u16 blk, cnt; | |
226 | void *addr; | |
227 | int n; | |
228 | void *key_addr = NULL; | |
229 | struct mmc *mmc = find_mmc_device(curr_device); | |
272cc70b | 230 | |
1fd93c6e PA |
231 | if (argc < 4) |
232 | return CMD_RET_USAGE; | |
272cc70b | 233 | |
7e5f460e SG |
234 | addr = (void *)hextoul(argv[1], NULL); |
235 | blk = hextoul(argv[2], NULL); | |
236 | cnt = hextoul(argv[3], NULL); | |
1fd93c6e PA |
237 | |
238 | if (argc == 5) | |
7e5f460e | 239 | key_addr = (void *)hextoul(argv[4], NULL); |
1fd93c6e PA |
240 | |
241 | printf("\nMMC RPMB read: dev # %d, block # %d, count %d ... ", | |
242 | curr_device, blk, cnt); | |
243 | n = mmc_rpmb_read(mmc, addr, blk, cnt, key_addr); | |
244 | ||
245 | printf("%d RPMB blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR"); | |
246 | if (n != cnt) | |
247 | return CMD_RET_FAILURE; | |
248 | return CMD_RET_SUCCESS; | |
249 | } | |
09140113 SG |
250 | |
251 | static int do_mmcrpmb_write(struct cmd_tbl *cmdtp, int flag, | |
252 | int argc, char *const argv[]) | |
272cc70b | 253 | { |
1fd93c6e PA |
254 | u16 blk, cnt; |
255 | void *addr; | |
256 | int n; | |
257 | void *key_addr; | |
258 | struct mmc *mmc = find_mmc_device(curr_device); | |
6be95ccf | 259 | |
1fd93c6e | 260 | if (argc != 5) |
4c12eeb8 | 261 | return CMD_RET_USAGE; |
272cc70b | 262 | |
7e5f460e SG |
263 | addr = (void *)hextoul(argv[1], NULL); |
264 | blk = hextoul(argv[2], NULL); | |
265 | cnt = hextoul(argv[3], NULL); | |
266 | key_addr = (void *)hextoul(argv[4], NULL); | |
1fd93c6e PA |
267 | |
268 | printf("\nMMC RPMB write: dev # %d, block # %d, count %d ... ", | |
269 | curr_device, blk, cnt); | |
270 | n = mmc_rpmb_write(mmc, addr, blk, cnt, key_addr); | |
271 | ||
272 | printf("%d RPMB blocks written: %s\n", n, (n == cnt) ? "OK" : "ERROR"); | |
273 | if (n != cnt) | |
274 | return CMD_RET_FAILURE; | |
275 | return CMD_RET_SUCCESS; | |
276 | } | |
09140113 SG |
277 | |
278 | static int do_mmcrpmb_counter(struct cmd_tbl *cmdtp, int flag, | |
279 | int argc, char *const argv[]) | |
1fd93c6e PA |
280 | { |
281 | unsigned long counter; | |
282 | struct mmc *mmc = find_mmc_device(curr_device); | |
283 | ||
284 | if (mmc_rpmb_get_counter(mmc, &counter)) | |
285 | return CMD_RET_FAILURE; | |
286 | printf("RPMB Write counter= %lx\n", counter); | |
287 | return CMD_RET_SUCCESS; | |
288 | } | |
289 | ||
09140113 | 290 | static struct cmd_tbl cmd_rpmb[] = { |
1fd93c6e PA |
291 | U_BOOT_CMD_MKENT(key, 2, 0, do_mmcrpmb_key, "", ""), |
292 | U_BOOT_CMD_MKENT(read, 5, 1, do_mmcrpmb_read, "", ""), | |
293 | U_BOOT_CMD_MKENT(write, 5, 0, do_mmcrpmb_write, "", ""), | |
294 | U_BOOT_CMD_MKENT(counter, 1, 1, do_mmcrpmb_counter, "", ""), | |
295 | }; | |
296 | ||
09140113 SG |
297 | static int do_mmcrpmb(struct cmd_tbl *cmdtp, int flag, |
298 | int argc, char *const argv[]) | |
1fd93c6e | 299 | { |
09140113 | 300 | struct cmd_tbl *cp; |
1fd93c6e PA |
301 | struct mmc *mmc; |
302 | char original_part; | |
303 | int ret; | |
304 | ||
305 | cp = find_cmd_tbl(argv[1], cmd_rpmb, ARRAY_SIZE(cmd_rpmb)); | |
306 | ||
307 | /* Drop the rpmb subcommand */ | |
308 | argc--; | |
309 | argv++; | |
310 | ||
311 | if (cp == NULL || argc > cp->maxargs) | |
312 | return CMD_RET_USAGE; | |
80a48dd4 | 313 | if (flag == CMD_FLAG_REPEAT && !cmd_is_repeatable(cp)) |
1fd93c6e PA |
314 | return CMD_RET_SUCCESS; |
315 | ||
1ae24a50 | 316 | mmc = init_mmc_device(curr_device, false); |
1fd93c6e PA |
317 | if (!mmc) |
318 | return CMD_RET_FAILURE; | |
319 | ||
320 | if (!(mmc->version & MMC_VERSION_MMC)) { | |
71a3e5c5 | 321 | printf("It is not an eMMC device\n"); |
1fd93c6e PA |
322 | return CMD_RET_FAILURE; |
323 | } | |
324 | if (mmc->version < MMC_VERSION_4_41) { | |
325 | printf("RPMB not supported before version 4.41\n"); | |
326 | return CMD_RET_FAILURE; | |
ea6ebe21 | 327 | } |
1fd93c6e | 328 | /* Switch to the RPMB partition */ |
4dc80c87 | 329 | #ifndef CONFIG_BLK |
b955e42b | 330 | original_part = mmc->block_dev.hwpart; |
4dc80c87 KY |
331 | #else |
332 | original_part = mmc_get_blk_desc(mmc)->hwpart; | |
333 | #endif | |
e33a5c6b | 334 | if (blk_select_hwpart_devnum(UCLASS_MMC, curr_device, MMC_PART_RPMB) != |
69f45cd5 | 335 | 0) |
873cc1d7 | 336 | return CMD_RET_FAILURE; |
1fd93c6e | 337 | ret = cp->cmd(cmdtp, flag, argc, argv); |
272cc70b | 338 | |
1fd93c6e | 339 | /* Return to original partition */ |
e33a5c6b | 340 | if (blk_select_hwpart_devnum(UCLASS_MMC, curr_device, original_part) != |
69f45cd5 | 341 | 0) |
873cc1d7 | 342 | return CMD_RET_FAILURE; |
1fd93c6e PA |
343 | return ret; |
344 | } | |
345 | #endif | |
9fd38372 | 346 | |
09140113 SG |
347 | static int do_mmc_read(struct cmd_tbl *cmdtp, int flag, |
348 | int argc, char *const argv[]) | |
1fd93c6e PA |
349 | { |
350 | struct mmc *mmc; | |
351 | u32 blk, cnt, n; | |
352 | void *addr; | |
e85649c7 | 353 | |
1fd93c6e PA |
354 | if (argc != 4) |
355 | return CMD_RET_USAGE; | |
ea6ebe21 | 356 | |
7e5f460e SG |
357 | addr = (void *)hextoul(argv[1], NULL); |
358 | blk = hextoul(argv[2], NULL); | |
359 | cnt = hextoul(argv[3], NULL); | |
272cc70b | 360 | |
1ae24a50 | 361 | mmc = init_mmc_device(curr_device, false); |
1fd93c6e PA |
362 | if (!mmc) |
363 | return CMD_RET_FAILURE; | |
ea6ebe21 | 364 | |
1fd93c6e PA |
365 | printf("\nMMC read: dev # %d, block # %d, count %d ... ", |
366 | curr_device, blk, cnt); | |
9fd38372 | 367 | |
c40fdca6 | 368 | n = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, addr); |
1fd93c6e | 369 | printf("%d blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR"); |
8f3b9642 | 370 | |
1fd93c6e PA |
371 | return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE; |
372 | } | |
e6fa5a54 | 373 | |
c232d14d | 374 | #if CONFIG_IS_ENABLED(CMD_MMC_SWRITE) |
732bc7ce JB |
375 | static lbaint_t mmc_sparse_write(struct sparse_storage *info, lbaint_t blk, |
376 | lbaint_t blkcnt, const void *buffer) | |
377 | { | |
378 | struct blk_desc *dev_desc = info->priv; | |
379 | ||
380 | return blk_dwrite(dev_desc, blk, blkcnt, buffer); | |
381 | } | |
382 | ||
383 | static lbaint_t mmc_sparse_reserve(struct sparse_storage *info, | |
384 | lbaint_t blk, lbaint_t blkcnt) | |
385 | { | |
386 | return blkcnt; | |
387 | } | |
388 | ||
09140113 SG |
389 | static int do_mmc_sparse_write(struct cmd_tbl *cmdtp, int flag, |
390 | int argc, char *const argv[]) | |
732bc7ce JB |
391 | { |
392 | struct sparse_storage sparse; | |
393 | struct blk_desc *dev_desc; | |
394 | struct mmc *mmc; | |
395 | char dest[11]; | |
396 | void *addr; | |
397 | u32 blk; | |
398 | ||
399 | if (argc != 3) | |
400 | return CMD_RET_USAGE; | |
401 | ||
7e5f460e SG |
402 | addr = (void *)hextoul(argv[1], NULL); |
403 | blk = hextoul(argv[2], NULL); | |
732bc7ce JB |
404 | |
405 | if (!is_sparse_image(addr)) { | |
406 | printf("Not a sparse image\n"); | |
407 | return CMD_RET_FAILURE; | |
408 | } | |
409 | ||
410 | mmc = init_mmc_device(curr_device, false); | |
411 | if (!mmc) | |
412 | return CMD_RET_FAILURE; | |
413 | ||
414 | printf("\nMMC Sparse write: dev # %d, block # %d ... ", | |
415 | curr_device, blk); | |
416 | ||
417 | if (mmc_getwp(mmc) == 1) { | |
418 | printf("Error: card is write protected!\n"); | |
419 | return CMD_RET_FAILURE; | |
420 | } | |
421 | ||
422 | dev_desc = mmc_get_blk_desc(mmc); | |
423 | sparse.priv = dev_desc; | |
424 | sparse.blksz = 512; | |
425 | sparse.start = blk; | |
426 | sparse.size = dev_desc->lba - blk; | |
427 | sparse.write = mmc_sparse_write; | |
428 | sparse.reserve = mmc_sparse_reserve; | |
429 | sparse.mssg = NULL; | |
430 | sprintf(dest, "0x" LBAF, sparse.start * sparse.blksz); | |
431 | ||
c4ded03e | 432 | if (write_sparse_image(&sparse, dest, addr, NULL)) |
732bc7ce JB |
433 | return CMD_RET_FAILURE; |
434 | else | |
435 | return CMD_RET_SUCCESS; | |
436 | } | |
437 | #endif | |
438 | ||
c232d14d | 439 | #if CONFIG_IS_ENABLED(MMC_WRITE) |
09140113 SG |
440 | static int do_mmc_write(struct cmd_tbl *cmdtp, int flag, |
441 | int argc, char *const argv[]) | |
1fd93c6e PA |
442 | { |
443 | struct mmc *mmc; | |
444 | u32 blk, cnt, n; | |
445 | void *addr; | |
8f3b9642 | 446 | |
1fd93c6e PA |
447 | if (argc != 4) |
448 | return CMD_RET_USAGE; | |
272cc70b | 449 | |
7e5f460e SG |
450 | addr = (void *)hextoul(argv[1], NULL); |
451 | blk = hextoul(argv[2], NULL); | |
452 | cnt = hextoul(argv[3], NULL); | |
bc897b1d | 453 | |
1ae24a50 | 454 | mmc = init_mmc_device(curr_device, false); |
1fd93c6e PA |
455 | if (!mmc) |
456 | return CMD_RET_FAILURE; | |
bc897b1d | 457 | |
1fd93c6e PA |
458 | printf("\nMMC write: dev # %d, block # %d, count %d ... ", |
459 | curr_device, blk, cnt); | |
272cc70b | 460 | |
1fd93c6e PA |
461 | if (mmc_getwp(mmc) == 1) { |
462 | printf("Error: card is write protected!\n"); | |
463 | return CMD_RET_FAILURE; | |
464 | } | |
c40fdca6 | 465 | n = blk_dwrite(mmc_get_blk_desc(mmc), blk, cnt, addr); |
1fd93c6e | 466 | printf("%d blocks written: %s\n", n, (n == cnt) ? "OK" : "ERROR"); |
792970b0 | 467 | |
1fd93c6e PA |
468 | return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE; |
469 | } | |
09140113 SG |
470 | |
471 | static int do_mmc_erase(struct cmd_tbl *cmdtp, int flag, | |
472 | int argc, char *const argv[]) | |
1fd93c6e PA |
473 | { |
474 | struct mmc *mmc; | |
475 | u32 blk, cnt, n; | |
2a91c913 | 476 | |
1fd93c6e PA |
477 | if (argc != 3) |
478 | return CMD_RET_USAGE; | |
792970b0 | 479 | |
7e5f460e SG |
480 | blk = hextoul(argv[1], NULL); |
481 | cnt = hextoul(argv[2], NULL); | |
5a99b9de | 482 | |
1ae24a50 | 483 | mmc = init_mmc_device(curr_device, false); |
1fd93c6e PA |
484 | if (!mmc) |
485 | return CMD_RET_FAILURE; | |
5a99b9de | 486 | |
1fd93c6e PA |
487 | printf("\nMMC erase: dev # %d, block # %d, count %d ... ", |
488 | curr_device, blk, cnt); | |
5a99b9de | 489 | |
1fd93c6e PA |
490 | if (mmc_getwp(mmc) == 1) { |
491 | printf("Error: card is write protected!\n"); | |
492 | return CMD_RET_FAILURE; | |
493 | } | |
c40fdca6 | 494 | n = blk_derase(mmc_get_blk_desc(mmc), blk, cnt); |
1fd93c6e | 495 | printf("%d blocks erased: %s\n", n, (n == cnt) ? "OK" : "ERROR"); |
b01e6fe6 | 496 | |
1fd93c6e PA |
497 | return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE; |
498 | } | |
e6fa5a54 JJH |
499 | #endif |
500 | ||
09140113 SG |
501 | static int do_mmc_rescan(struct cmd_tbl *cmdtp, int flag, |
502 | int argc, char *const argv[]) | |
1fd93c6e PA |
503 | { |
504 | struct mmc *mmc; | |
19f7a34a AG |
505 | |
506 | if (argc == 1) { | |
507 | mmc = init_mmc_device(curr_device, true); | |
508 | } else if (argc == 2) { | |
27434703 HS |
509 | enum bus_mode speed_mode; |
510 | ||
19f7a34a AG |
511 | speed_mode = (int)dectoul(argv[1], NULL); |
512 | mmc = __init_mmc_device(curr_device, true, speed_mode); | |
513 | } else { | |
514 | return CMD_RET_USAGE; | |
515 | } | |
2a91c913 | 516 | |
941944e4 | 517 | if (!mmc) |
1fd93c6e | 518 | return CMD_RET_FAILURE; |
2a91c913 | 519 | |
1fd93c6e PA |
520 | return CMD_RET_SUCCESS; |
521 | } | |
09140113 SG |
522 | |
523 | static int do_mmc_part(struct cmd_tbl *cmdtp, int flag, | |
524 | int argc, char *const argv[]) | |
1fd93c6e | 525 | { |
4101f687 | 526 | struct blk_desc *mmc_dev; |
1fd93c6e PA |
527 | struct mmc *mmc; |
528 | ||
1ae24a50 | 529 | mmc = init_mmc_device(curr_device, false); |
1fd93c6e PA |
530 | if (!mmc) |
531 | return CMD_RET_FAILURE; | |
532 | ||
8149b150 | 533 | mmc_dev = blk_get_devnum_by_uclass_id(UCLASS_MMC, curr_device); |
1fd93c6e | 534 | if (mmc_dev != NULL && mmc_dev->type != DEV_TYPE_UNKNOWN) { |
3e8bd469 | 535 | part_print(mmc_dev); |
1fd93c6e PA |
536 | return CMD_RET_SUCCESS; |
537 | } | |
538 | ||
539 | puts("get mmc type error!\n"); | |
540 | return CMD_RET_FAILURE; | |
541 | } | |
09140113 SG |
542 | |
543 | static int do_mmc_dev(struct cmd_tbl *cmdtp, int flag, | |
544 | int argc, char *const argv[]) | |
1fd93c6e | 545 | { |
60dc58f7 | 546 | int dev, part = 0, ret; |
1fd93c6e PA |
547 | struct mmc *mmc; |
548 | ||
549 | if (argc == 1) { | |
550 | dev = curr_device; | |
19f7a34a | 551 | mmc = init_mmc_device(dev, true); |
1fd93c6e | 552 | } else if (argc == 2) { |
19f7a34a AG |
553 | dev = (int)dectoul(argv[1], NULL); |
554 | mmc = init_mmc_device(dev, true); | |
1fd93c6e | 555 | } else if (argc == 3) { |
0b1284eb SG |
556 | dev = (int)dectoul(argv[1], NULL); |
557 | part = (int)dectoul(argv[2], NULL); | |
1fd93c6e PA |
558 | if (part > PART_ACCESS_MASK) { |
559 | printf("#part_num shouldn't be larger than %d\n", | |
560 | PART_ACCESS_MASK); | |
561 | return CMD_RET_FAILURE; | |
33ace362 | 562 | } |
19f7a34a AG |
563 | mmc = init_mmc_device(dev, true); |
564 | } else if (argc == 4) { | |
27434703 HS |
565 | enum bus_mode speed_mode; |
566 | ||
19f7a34a AG |
567 | dev = (int)dectoul(argv[1], NULL); |
568 | part = (int)dectoul(argv[2], NULL); | |
569 | if (part > PART_ACCESS_MASK) { | |
570 | printf("#part_num shouldn't be larger than %d\n", | |
571 | PART_ACCESS_MASK); | |
572 | return CMD_RET_FAILURE; | |
573 | } | |
574 | speed_mode = (int)dectoul(argv[3], NULL); | |
575 | mmc = __init_mmc_device(dev, true, speed_mode); | |
1fd93c6e PA |
576 | } else { |
577 | return CMD_RET_USAGE; | |
578 | } | |
33ace362 | 579 | |
1fd93c6e PA |
580 | if (!mmc) |
581 | return CMD_RET_FAILURE; | |
582 | ||
e33a5c6b | 583 | ret = blk_select_hwpart_devnum(UCLASS_MMC, dev, part); |
60dc58f7 SW |
584 | printf("switch to partitions #%d, %s\n", |
585 | part, (!ret) ? "OK" : "ERROR"); | |
586 | if (ret) | |
587 | return 1; | |
588 | ||
1fd93c6e PA |
589 | curr_device = dev; |
590 | if (mmc->part_config == MMCPART_NOAVAILABLE) | |
591 | printf("mmc%d is current device\n", curr_device); | |
592 | else | |
593 | printf("mmc%d(part %d) is current device\n", | |
c40fdca6 | 594 | curr_device, mmc_get_blk_desc(mmc)->hwpart); |
33ace362 | 595 | |
1fd93c6e PA |
596 | return CMD_RET_SUCCESS; |
597 | } | |
09140113 SG |
598 | |
599 | static int do_mmc_list(struct cmd_tbl *cmdtp, int flag, | |
600 | int argc, char *const argv[]) | |
1fd93c6e PA |
601 | { |
602 | print_mmc_devices('\n'); | |
603 | return CMD_RET_SUCCESS; | |
604 | } | |
c599f53b | 605 | |
cf17789e | 606 | #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING) |
f702dc1e MV |
607 | static void parse_hwpart_user_enh_size(struct mmc *mmc, |
608 | struct mmc_hwpart_conf *pconf, | |
609 | char *argv) | |
610 | { | |
1d4b3b2f | 611 | int i, ret; |
f702dc1e MV |
612 | |
613 | pconf->user.enh_size = 0; | |
614 | ||
615 | if (!strcmp(argv, "-")) { /* The rest of eMMC */ | |
616 | ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); | |
617 | ret = mmc_send_ext_csd(mmc, ext_csd); | |
618 | if (ret) | |
619 | return; | |
1d4b3b2f | 620 | /* The enh_size value is in 512B block units */ |
f702dc1e MV |
621 | pconf->user.enh_size = |
622 | ((ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT + 2] << 16) + | |
623 | (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT + 1] << 8) + | |
624 | ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT]) * 1024 * | |
625 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * | |
626 | ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; | |
627 | pconf->user.enh_size -= pconf->user.enh_start; | |
1d4b3b2f MV |
628 | for (i = 0; i < ARRAY_SIZE(mmc->capacity_gp); i++) { |
629 | /* | |
630 | * If the eMMC already has GP partitions set, | |
631 | * subtract their size from the maximum USER | |
632 | * partition size. | |
633 | * | |
634 | * Else, if the command was used to configure new | |
635 | * GP partitions, subtract their size from maximum | |
636 | * USER partition size. | |
637 | */ | |
638 | if (mmc->capacity_gp[i]) { | |
639 | /* The capacity_gp is in 1B units */ | |
640 | pconf->user.enh_size -= mmc->capacity_gp[i] >> 9; | |
641 | } else if (pconf->gp_part[i].size) { | |
642 | /* The gp_part[].size is in 512B units */ | |
643 | pconf->user.enh_size -= pconf->gp_part[i].size; | |
644 | } | |
645 | } | |
f702dc1e MV |
646 | } else { |
647 | pconf->user.enh_size = dectoul(argv, NULL); | |
648 | } | |
649 | } | |
650 | ||
651 | static int parse_hwpart_user(struct mmc *mmc, struct mmc_hwpart_conf *pconf, | |
09140113 | 652 | int argc, char *const argv[]) |
189f963a DSC |
653 | { |
654 | int i = 0; | |
655 | ||
656 | memset(&pconf->user, 0, sizeof(pconf->user)); | |
657 | ||
658 | while (i < argc) { | |
659 | if (!strcmp(argv[i], "enh")) { | |
660 | if (i + 2 >= argc) | |
661 | return -1; | |
662 | pconf->user.enh_start = | |
0b1284eb | 663 | dectoul(argv[i + 1], NULL); |
f702dc1e | 664 | parse_hwpart_user_enh_size(mmc, pconf, argv[i + 2]); |
189f963a DSC |
665 | i += 3; |
666 | } else if (!strcmp(argv[i], "wrrel")) { | |
667 | if (i + 1 >= argc) | |
668 | return -1; | |
669 | pconf->user.wr_rel_change = 1; | |
670 | if (!strcmp(argv[i+1], "on")) | |
671 | pconf->user.wr_rel_set = 1; | |
672 | else if (!strcmp(argv[i+1], "off")) | |
673 | pconf->user.wr_rel_set = 0; | |
674 | else | |
675 | return -1; | |
676 | i += 2; | |
677 | } else { | |
678 | break; | |
679 | } | |
680 | } | |
681 | return i; | |
682 | } | |
683 | ||
684 | static int parse_hwpart_gp(struct mmc_hwpart_conf *pconf, int pidx, | |
09140113 | 685 | int argc, char *const argv[]) |
189f963a DSC |
686 | { |
687 | int i; | |
688 | ||
689 | memset(&pconf->gp_part[pidx], 0, sizeof(pconf->gp_part[pidx])); | |
690 | ||
691 | if (1 >= argc) | |
692 | return -1; | |
0b1284eb | 693 | pconf->gp_part[pidx].size = dectoul(argv[0], NULL); |
189f963a DSC |
694 | |
695 | i = 1; | |
696 | while (i < argc) { | |
697 | if (!strcmp(argv[i], "enh")) { | |
698 | pconf->gp_part[pidx].enhanced = 1; | |
699 | i += 1; | |
700 | } else if (!strcmp(argv[i], "wrrel")) { | |
701 | if (i + 1 >= argc) | |
702 | return -1; | |
703 | pconf->gp_part[pidx].wr_rel_change = 1; | |
704 | if (!strcmp(argv[i+1], "on")) | |
705 | pconf->gp_part[pidx].wr_rel_set = 1; | |
706 | else if (!strcmp(argv[i+1], "off")) | |
707 | pconf->gp_part[pidx].wr_rel_set = 0; | |
708 | else | |
709 | return -1; | |
710 | i += 2; | |
711 | } else { | |
712 | break; | |
713 | } | |
714 | } | |
715 | return i; | |
716 | } | |
717 | ||
09140113 SG |
718 | static int do_mmc_hwpartition(struct cmd_tbl *cmdtp, int flag, |
719 | int argc, char *const argv[]) | |
c599f53b DSC |
720 | { |
721 | struct mmc *mmc; | |
722 | struct mmc_hwpart_conf pconf = { }; | |
723 | enum mmc_hwpart_conf_mode mode = MMC_HWPART_CONF_CHECK; | |
189f963a | 724 | int i, r, pidx; |
c599f53b DSC |
725 | |
726 | mmc = init_mmc_device(curr_device, false); | |
727 | if (!mmc) | |
728 | return CMD_RET_FAILURE; | |
729 | ||
0d453c84 JC |
730 | if (IS_SD(mmc)) { |
731 | puts("SD doesn't support partitioning\n"); | |
732 | return CMD_RET_FAILURE; | |
733 | } | |
734 | ||
c599f53b DSC |
735 | if (argc < 1) |
736 | return CMD_RET_USAGE; | |
737 | i = 1; | |
738 | while (i < argc) { | |
189f963a DSC |
739 | if (!strcmp(argv[i], "user")) { |
740 | i++; | |
f702dc1e | 741 | r = parse_hwpart_user(mmc, &pconf, argc - i, &argv[i]); |
189f963a | 742 | if (r < 0) |
c599f53b | 743 | return CMD_RET_USAGE; |
189f963a | 744 | i += r; |
c599f53b DSC |
745 | } else if (!strncmp(argv[i], "gp", 2) && |
746 | strlen(argv[i]) == 3 && | |
747 | argv[i][2] >= '1' && argv[i][2] <= '4') { | |
c599f53b | 748 | pidx = argv[i][2] - '1'; |
189f963a DSC |
749 | i++; |
750 | r = parse_hwpart_gp(&pconf, pidx, argc-i, &argv[i]); | |
751 | if (r < 0) | |
752 | return CMD_RET_USAGE; | |
753 | i += r; | |
c599f53b DSC |
754 | } else if (!strcmp(argv[i], "check")) { |
755 | mode = MMC_HWPART_CONF_CHECK; | |
756 | i++; | |
757 | } else if (!strcmp(argv[i], "set")) { | |
758 | mode = MMC_HWPART_CONF_SET; | |
759 | i++; | |
760 | } else if (!strcmp(argv[i], "complete")) { | |
761 | mode = MMC_HWPART_CONF_COMPLETE; | |
762 | i++; | |
763 | } else { | |
764 | return CMD_RET_USAGE; | |
765 | } | |
766 | } | |
767 | ||
768 | puts("Partition configuration:\n"); | |
769 | if (pconf.user.enh_size) { | |
770 | puts("\tUser Enhanced Start: "); | |
771 | print_size(((u64)pconf.user.enh_start) << 9, "\n"); | |
772 | puts("\tUser Enhanced Size: "); | |
773 | print_size(((u64)pconf.user.enh_size) << 9, "\n"); | |
774 | } else { | |
775 | puts("\tNo enhanced user data area\n"); | |
776 | } | |
189f963a DSC |
777 | if (pconf.user.wr_rel_change) |
778 | printf("\tUser partition write reliability: %s\n", | |
779 | pconf.user.wr_rel_set ? "on" : "off"); | |
c599f53b DSC |
780 | for (pidx = 0; pidx < 4; pidx++) { |
781 | if (pconf.gp_part[pidx].size) { | |
782 | printf("\tGP%i Capacity: ", pidx+1); | |
783 | print_size(((u64)pconf.gp_part[pidx].size) << 9, | |
784 | pconf.gp_part[pidx].enhanced ? | |
785 | " ENH\n" : "\n"); | |
786 | } else { | |
787 | printf("\tNo GP%i partition\n", pidx+1); | |
788 | } | |
189f963a DSC |
789 | if (pconf.gp_part[pidx].wr_rel_change) |
790 | printf("\tGP%i write reliability: %s\n", pidx+1, | |
791 | pconf.gp_part[pidx].wr_rel_set ? "on" : "off"); | |
c599f53b DSC |
792 | } |
793 | ||
794 | if (!mmc_hwpart_config(mmc, &pconf, mode)) { | |
795 | if (mode == MMC_HWPART_CONF_COMPLETE) | |
796 | puts("Partitioning successful, " | |
797 | "power-cycle to make effective\n"); | |
798 | return CMD_RET_SUCCESS; | |
799 | } else { | |
189f963a | 800 | puts("Failed!\n"); |
c599f53b DSC |
801 | return CMD_RET_FAILURE; |
802 | } | |
803 | } | |
cf17789e | 804 | #endif |
c599f53b | 805 | |
1fd93c6e | 806 | #ifdef CONFIG_SUPPORT_EMMC_BOOT |
09140113 SG |
807 | static int do_mmc_bootbus(struct cmd_tbl *cmdtp, int flag, |
808 | int argc, char *const argv[]) | |
1fd93c6e PA |
809 | { |
810 | int dev; | |
811 | struct mmc *mmc; | |
812 | u8 width, reset, mode; | |
813 | ||
814 | if (argc != 5) | |
815 | return CMD_RET_USAGE; | |
0b1284eb SG |
816 | dev = dectoul(argv[1], NULL); |
817 | width = dectoul(argv[2], NULL); | |
818 | reset = dectoul(argv[3], NULL); | |
819 | mode = dectoul(argv[4], NULL); | |
1fd93c6e | 820 | |
1ae24a50 | 821 | mmc = init_mmc_device(dev, false); |
1fd93c6e PA |
822 | if (!mmc) |
823 | return CMD_RET_FAILURE; | |
824 | ||
825 | if (IS_SD(mmc)) { | |
826 | puts("BOOT_BUS_WIDTH only exists on eMMC\n"); | |
827 | return CMD_RET_FAILURE; | |
2a91c913 | 828 | } |
ab71188c | 829 | |
e9978b17 JC |
830 | /* |
831 | * BOOT_BUS_CONDITIONS[177] | |
832 | * BOOT_MODE[4:3] | |
833 | * 0x0 : Use SDR + Backward compatible timing in boot operation | |
834 | * 0x1 : Use SDR + High Speed Timing in boot operation mode | |
835 | * 0x2 : Use DDR in boot operation | |
836 | * RESET_BOOT_BUS_CONDITIONS | |
837 | * 0x0 : Reset bus width to x1, SDR, Backward compatible | |
838 | * 0x1 : Retain BOOT_BUS_WIDTH and BOOT_MODE | |
839 | * BOOT_BUS_WIDTH | |
840 | * 0x0 : x1(sdr) or x4 (ddr) buswidth | |
841 | * 0x1 : x4(sdr/ddr) buswith | |
842 | * 0x2 : x8(sdr/ddr) buswith | |
843 | * | |
844 | */ | |
845 | if (width >= 0x3) { | |
846 | printf("boot_bus_width %d is invalid\n", width); | |
847 | return CMD_RET_FAILURE; | |
848 | } | |
849 | ||
850 | if (reset >= 0x2) { | |
851 | printf("reset_boot_bus_width %d is invalid\n", reset); | |
852 | return CMD_RET_FAILURE; | |
853 | } | |
854 | ||
855 | if (mode >= 0x3) { | |
856 | printf("reset_boot_bus_width %d is invalid\n", mode); | |
857 | return CMD_RET_FAILURE; | |
858 | } | |
859 | ||
1fd93c6e | 860 | /* acknowledge to be sent during boot operation */ |
e9978b17 JC |
861 | if (mmc_set_boot_bus_width(mmc, width, reset, mode)) { |
862 | puts("BOOT_BUS_WIDTH is failed to change.\n"); | |
863 | return CMD_RET_FAILURE; | |
864 | } | |
865 | ||
866 | printf("Set to BOOT_BUS_WIDTH = 0x%x, RESET = 0x%x, BOOT_MODE = 0x%x\n", | |
867 | width, reset, mode); | |
868 | return CMD_RET_SUCCESS; | |
1fd93c6e | 869 | } |
09140113 SG |
870 | |
871 | static int do_mmc_boot_resize(struct cmd_tbl *cmdtp, int flag, | |
872 | int argc, char *const argv[]) | |
1fd93c6e PA |
873 | { |
874 | int dev; | |
875 | struct mmc *mmc; | |
876 | u32 bootsize, rpmbsize; | |
ab71188c | 877 | |
1fd93c6e PA |
878 | if (argc != 4) |
879 | return CMD_RET_USAGE; | |
0b1284eb SG |
880 | dev = dectoul(argv[1], NULL); |
881 | bootsize = dectoul(argv[2], NULL); | |
882 | rpmbsize = dectoul(argv[3], NULL); | |
1fd93c6e | 883 | |
1ae24a50 | 884 | mmc = init_mmc_device(dev, false); |
1fd93c6e PA |
885 | if (!mmc) |
886 | return CMD_RET_FAILURE; | |
887 | ||
888 | if (IS_SD(mmc)) { | |
71a3e5c5 | 889 | printf("It is not an eMMC device\n"); |
1fd93c6e | 890 | return CMD_RET_FAILURE; |
ab71188c MN |
891 | } |
892 | ||
1fd93c6e PA |
893 | if (mmc_boot_partition_size_change(mmc, bootsize, rpmbsize)) { |
894 | printf("EMMC boot partition Size change Failed.\n"); | |
895 | return CMD_RET_FAILURE; | |
896 | } | |
e85649c7 | 897 | |
1fd93c6e PA |
898 | printf("EMMC boot partition Size %d MB\n", bootsize); |
899 | printf("EMMC RPMB partition Size %d MB\n", rpmbsize); | |
900 | return CMD_RET_SUCCESS; | |
901 | } | |
bdb60996 | 902 | |
5c2beda5 | 903 | static int mmc_partconf_print(struct mmc *mmc, const char *varname) |
bdb60996 AD |
904 | { |
905 | u8 ack, access, part; | |
906 | ||
907 | if (mmc->part_config == MMCPART_NOAVAILABLE) { | |
908 | printf("No part_config info for ver. 0x%x\n", mmc->version); | |
909 | return CMD_RET_FAILURE; | |
910 | } | |
911 | ||
912 | access = EXT_CSD_EXTRACT_PARTITION_ACCESS(mmc->part_config); | |
913 | ack = EXT_CSD_EXTRACT_BOOT_ACK(mmc->part_config); | |
914 | part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config); | |
915 | ||
5c2beda5 RD |
916 | if(varname) |
917 | env_set_hex(varname, part); | |
918 | ||
bdb60996 AD |
919 | printf("EXT_CSD[179], PARTITION_CONFIG:\n" |
920 | "BOOT_ACK: 0x%x\n" | |
921 | "BOOT_PARTITION_ENABLE: 0x%x\n" | |
922 | "PARTITION_ACCESS: 0x%x\n", ack, part, access); | |
923 | ||
924 | return CMD_RET_SUCCESS; | |
925 | } | |
926 | ||
09140113 SG |
927 | static int do_mmc_partconf(struct cmd_tbl *cmdtp, int flag, |
928 | int argc, char *const argv[]) | |
1fd93c6e PA |
929 | { |
930 | int dev; | |
931 | struct mmc *mmc; | |
932 | u8 ack, part_num, access; | |
272cc70b | 933 | |
5c2beda5 | 934 | if (argc != 2 && argc != 3 && argc != 5) |
1fd93c6e | 935 | return CMD_RET_USAGE; |
272cc70b | 936 | |
0b1284eb | 937 | dev = dectoul(argv[1], NULL); |
d23d8d7e | 938 | |
1ae24a50 | 939 | mmc = init_mmc_device(dev, false); |
1fd93c6e PA |
940 | if (!mmc) |
941 | return CMD_RET_FAILURE; | |
942 | ||
943 | if (IS_SD(mmc)) { | |
944 | puts("PARTITION_CONFIG only exists on eMMC\n"); | |
945 | return CMD_RET_FAILURE; | |
946 | } | |
947 | ||
5c2beda5 RD |
948 | if (argc == 2 || argc == 3) |
949 | return mmc_partconf_print(mmc, argc == 3 ? argv[2] : NULL); | |
bdb60996 | 950 | |
0b1284eb SG |
951 | ack = dectoul(argv[2], NULL); |
952 | part_num = dectoul(argv[3], NULL); | |
953 | access = dectoul(argv[4], NULL); | |
bdb60996 | 954 | |
1fd93c6e PA |
955 | /* acknowledge to be sent during boot operation */ |
956 | return mmc_set_part_conf(mmc, ack, part_num, access); | |
957 | } | |
09140113 SG |
958 | |
959 | static int do_mmc_rst_func(struct cmd_tbl *cmdtp, int flag, | |
960 | int argc, char *const argv[]) | |
1fd93c6e PA |
961 | { |
962 | int dev; | |
963 | struct mmc *mmc; | |
964 | u8 enable; | |
965 | ||
966 | /* | |
967 | * Set the RST_n_ENABLE bit of RST_n_FUNCTION | |
968 | * The only valid values are 0x0, 0x1 and 0x2 and writing | |
969 | * a value of 0x1 or 0x2 sets the value permanently. | |
970 | */ | |
971 | if (argc != 3) | |
972 | return CMD_RET_USAGE; | |
973 | ||
0b1284eb SG |
974 | dev = dectoul(argv[1], NULL); |
975 | enable = dectoul(argv[2], NULL); | |
1fd93c6e | 976 | |
678e9316 | 977 | if (enable > 2) { |
1fd93c6e PA |
978 | puts("Invalid RST_n_ENABLE value\n"); |
979 | return CMD_RET_USAGE; | |
980 | } | |
981 | ||
1ae24a50 | 982 | mmc = init_mmc_device(dev, false); |
1fd93c6e PA |
983 | if (!mmc) |
984 | return CMD_RET_FAILURE; | |
985 | ||
986 | if (IS_SD(mmc)) { | |
987 | puts("RST_n_FUNCTION only exists on eMMC\n"); | |
988 | return CMD_RET_FAILURE; | |
989 | } | |
272cc70b | 990 | |
1fd93c6e PA |
991 | return mmc_set_rst_n_function(mmc, enable); |
992 | } | |
993 | #endif | |
09140113 SG |
994 | static int do_mmc_setdsr(struct cmd_tbl *cmdtp, int flag, |
995 | int argc, char *const argv[]) | |
1fd93c6e PA |
996 | { |
997 | struct mmc *mmc; | |
998 | u32 val; | |
999 | int ret; | |
1000 | ||
1001 | if (argc != 2) | |
1002 | return CMD_RET_USAGE; | |
7e5f460e | 1003 | val = hextoul(argv[1], NULL); |
1fd93c6e PA |
1004 | |
1005 | mmc = find_mmc_device(curr_device); | |
1006 | if (!mmc) { | |
1007 | printf("no mmc device at slot %x\n", curr_device); | |
1008 | return CMD_RET_FAILURE; | |
1009 | } | |
1010 | ret = mmc_set_dsr(mmc, val); | |
1011 | printf("set dsr %s\n", (!ret) ? "OK, force rescan" : "ERROR"); | |
1012 | if (!ret) { | |
1013 | mmc->has_init = 0; | |
1014 | if (mmc_init(mmc)) | |
1015 | return CMD_RET_FAILURE; | |
1016 | else | |
1017 | return CMD_RET_SUCCESS; | |
272cc70b | 1018 | } |
1fd93c6e PA |
1019 | return ret; |
1020 | } | |
1021 | ||
cd3d4880 | 1022 | #ifdef CONFIG_CMD_BKOPS_ENABLE |
cf1f7355 | 1023 | static int mmc_bkops_common(char *device, bool autobkops, bool enable) |
cd3d4880 | 1024 | { |
cd3d4880 | 1025 | struct mmc *mmc; |
cf1f7355 | 1026 | int dev; |
cd3d4880 | 1027 | |
cf1f7355 | 1028 | dev = dectoul(device, NULL); |
cd3d4880 TM |
1029 | |
1030 | mmc = init_mmc_device(dev, false); | |
1031 | if (!mmc) | |
1032 | return CMD_RET_FAILURE; | |
1033 | ||
1034 | if (IS_SD(mmc)) { | |
1035 | puts("BKOPS_EN only exists on eMMC\n"); | |
1036 | return CMD_RET_FAILURE; | |
1037 | } | |
1038 | ||
cf1f7355 MV |
1039 | return mmc_set_bkops_enable(mmc, autobkops, enable); |
1040 | } | |
1041 | ||
1042 | static int do_mmc_bkops(struct cmd_tbl *cmdtp, int flag, | |
1043 | int argc, char * const argv[]) | |
1044 | { | |
1045 | bool autobkops, enable; | |
1046 | ||
1047 | if (argc != 4) | |
1048 | return CMD_RET_USAGE; | |
1049 | ||
1050 | if (!strcmp(argv[2], "manual")) | |
1051 | autobkops = false; | |
1052 | else if (!strcmp(argv[2], "auto")) | |
1053 | autobkops = true; | |
1054 | else | |
1055 | return CMD_RET_FAILURE; | |
1056 | ||
1057 | if (!strcmp(argv[3], "disable")) | |
1058 | enable = false; | |
1059 | else if (!strcmp(argv[3], "enable")) | |
1060 | enable = true; | |
1061 | else | |
1062 | return CMD_RET_FAILURE; | |
1063 | ||
1064 | return mmc_bkops_common(argv[1], autobkops, enable); | |
1065 | } | |
1066 | ||
1067 | static int do_mmc_bkops_enable(struct cmd_tbl *cmdtp, int flag, | |
1068 | int argc, char * const argv[]) | |
1069 | { | |
1070 | if (argc != 2) | |
1071 | return CMD_RET_USAGE; | |
1072 | ||
1073 | return mmc_bkops_common(argv[1], false, true); | |
cd3d4880 TM |
1074 | } |
1075 | #endif | |
1076 | ||
09140113 | 1077 | static int do_mmc_boot_wp(struct cmd_tbl *cmdtp, int flag, |
0469d846 HS |
1078 | int argc, char * const argv[]) |
1079 | { | |
1080 | int err; | |
1081 | struct mmc *mmc; | |
23366241 | 1082 | int part; |
0469d846 HS |
1083 | |
1084 | mmc = init_mmc_device(curr_device, false); | |
1085 | if (!mmc) | |
1086 | return CMD_RET_FAILURE; | |
1087 | if (IS_SD(mmc)) { | |
1088 | printf("It is not an eMMC device\n"); | |
1089 | return CMD_RET_FAILURE; | |
1090 | } | |
23366241 YCLP |
1091 | |
1092 | if (argc == 2) { | |
1093 | part = dectoul(argv[1], NULL); | |
1094 | err = mmc_boot_wp_single_partition(mmc, part); | |
1095 | } else { | |
1096 | err = mmc_boot_wp(mmc); | |
1097 | } | |
1098 | ||
0469d846 HS |
1099 | if (err) |
1100 | return CMD_RET_FAILURE; | |
1101 | printf("boot areas protected\n"); | |
1102 | return CMD_RET_SUCCESS; | |
1103 | } | |
1104 | ||
09140113 | 1105 | static struct cmd_tbl cmd_mmc[] = { |
1fd93c6e PA |
1106 | U_BOOT_CMD_MKENT(info, 1, 0, do_mmcinfo, "", ""), |
1107 | U_BOOT_CMD_MKENT(read, 4, 1, do_mmc_read, "", ""), | |
23366241 | 1108 | U_BOOT_CMD_MKENT(wp, 2, 0, do_mmc_boot_wp, "", ""), |
e6fa5a54 | 1109 | #if CONFIG_IS_ENABLED(MMC_WRITE) |
1fd93c6e PA |
1110 | U_BOOT_CMD_MKENT(write, 4, 0, do_mmc_write, "", ""), |
1111 | U_BOOT_CMD_MKENT(erase, 3, 0, do_mmc_erase, "", ""), | |
c232d14d AK |
1112 | #endif |
1113 | #if CONFIG_IS_ENABLED(CMD_MMC_SWRITE) | |
1114 | U_BOOT_CMD_MKENT(swrite, 3, 0, do_mmc_sparse_write, "", ""), | |
e6fa5a54 | 1115 | #endif |
19f7a34a | 1116 | U_BOOT_CMD_MKENT(rescan, 2, 1, do_mmc_rescan, "", ""), |
1fd93c6e | 1117 | U_BOOT_CMD_MKENT(part, 1, 1, do_mmc_part, "", ""), |
19f7a34a | 1118 | U_BOOT_CMD_MKENT(dev, 4, 0, do_mmc_dev, "", ""), |
1fd93c6e | 1119 | U_BOOT_CMD_MKENT(list, 1, 1, do_mmc_list, "", ""), |
cf17789e | 1120 | #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING) |
189f963a | 1121 | U_BOOT_CMD_MKENT(hwpartition, 28, 0, do_mmc_hwpartition, "", ""), |
cf17789e | 1122 | #endif |
1fd93c6e PA |
1123 | #ifdef CONFIG_SUPPORT_EMMC_BOOT |
1124 | U_BOOT_CMD_MKENT(bootbus, 5, 0, do_mmc_bootbus, "", ""), | |
fa7b8851 | 1125 | U_BOOT_CMD_MKENT(bootpart-resize, 4, 0, do_mmc_boot_resize, "", ""), |
1fd93c6e PA |
1126 | U_BOOT_CMD_MKENT(partconf, 5, 0, do_mmc_partconf, "", ""), |
1127 | U_BOOT_CMD_MKENT(rst-function, 3, 0, do_mmc_rst_func, "", ""), | |
1128 | #endif | |
5a7b11e6 | 1129 | #if CONFIG_IS_ENABLED(CMD_MMC_RPMB) |
1fd93c6e PA |
1130 | U_BOOT_CMD_MKENT(rpmb, CONFIG_SYS_MAXARGS, 1, do_mmcrpmb, "", ""), |
1131 | #endif | |
1132 | U_BOOT_CMD_MKENT(setdsr, 2, 0, do_mmc_setdsr, "", ""), | |
cd3d4880 TM |
1133 | #ifdef CONFIG_CMD_BKOPS_ENABLE |
1134 | U_BOOT_CMD_MKENT(bkops-enable, 2, 0, do_mmc_bkops_enable, "", ""), | |
cf1f7355 | 1135 | U_BOOT_CMD_MKENT(bkops, 4, 0, do_mmc_bkops, "", ""), |
cd3d4880 | 1136 | #endif |
1fd93c6e PA |
1137 | }; |
1138 | ||
09140113 SG |
1139 | static int do_mmcops(struct cmd_tbl *cmdtp, int flag, int argc, |
1140 | char *const argv[]) | |
1fd93c6e | 1141 | { |
09140113 | 1142 | struct cmd_tbl *cp; |
1fd93c6e PA |
1143 | |
1144 | cp = find_cmd_tbl(argv[1], cmd_mmc, ARRAY_SIZE(cmd_mmc)); | |
1145 | ||
1146 | /* Drop the mmc command */ | |
1147 | argc--; | |
1148 | argv++; | |
1149 | ||
1150 | if (cp == NULL || argc > cp->maxargs) | |
1151 | return CMD_RET_USAGE; | |
80a48dd4 | 1152 | if (flag == CMD_FLAG_REPEAT && !cmd_is_repeatable(cp)) |
1fd93c6e | 1153 | return CMD_RET_SUCCESS; |
ea6ebe21 | 1154 | |
1fd93c6e PA |
1155 | if (curr_device < 0) { |
1156 | if (get_mmc_num() > 0) { | |
1157 | curr_device = 0; | |
1158 | } else { | |
1159 | puts("No MMC device available\n"); | |
1160 | return CMD_RET_FAILURE; | |
1161 | } | |
1162 | } | |
1163 | return cp->cmd(cmdtp, flag, argc, argv); | |
272cc70b AF |
1164 | } |
1165 | ||
1166 | U_BOOT_CMD( | |
189f963a | 1167 | mmc, 29, 1, do_mmcops, |
852dbfdd | 1168 | "MMC sub system", |
1fd93c6e PA |
1169 | "info - display info of the current MMC device\n" |
1170 | "mmc read addr blk# cnt\n" | |
ea6ebe21 | 1171 | "mmc write addr blk# cnt\n" |
c232d14d | 1172 | #if CONFIG_IS_ENABLED(CMD_MMC_SWRITE) |
732bc7ce JB |
1173 | "mmc swrite addr blk#\n" |
1174 | #endif | |
e6f99a56 | 1175 | "mmc erase blk# cnt\n" |
19f7a34a | 1176 | "mmc rescan [mode]\n" |
ea6ebe21 | 1177 | "mmc part - lists available partition on current mmc device\n" |
19f7a34a AG |
1178 | "mmc dev [dev] [part] [mode] - show or set current mmc device [partition] and set mode\n" |
1179 | " - the required speed mode is passed as the index from the following list\n" | |
1180 | " [MMC_LEGACY, MMC_HS, SD_HS, MMC_HS_52, MMC_DDR_52, UHS_SDR12, UHS_SDR25,\n" | |
1181 | " UHS_SDR50, UHS_DDR50, UHS_SDR104, MMC_HS_200, MMC_HS_400, MMC_HS_400_ES]\n" | |
2a91c913 | 1182 | "mmc list - lists available devices\n" |
23366241 YCLP |
1183 | "mmc wp [PART] - power on write protect boot partitions\n" |
1184 | " arguments:\n" | |
1185 | " PART - [0|1]\n" | |
1186 | " : 0 - first boot partition, 1 - second boot partition\n" | |
1187 | " if not assigned, write protect all boot partitions\n" | |
84593679 | 1188 | #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING) |
8ae82c4b | 1189 | "mmc hwpartition <USER> <GP> <MODE> - does hardware partitioning\n" |
c599f53b | 1190 | " arguments (sizes in 512-byte blocks):\n" |
8ae82c4b JC |
1191 | " USER - <user> <enh> <start> <cnt> <wrrel> <{on|off}>\n" |
1192 | " : sets user data area attributes\n" | |
1193 | " GP - <{gp1|gp2|gp3|gp4}> <cnt> <enh> <wrrel> <{on|off}>\n" | |
1194 | " : general purpose partition\n" | |
1195 | " MODE - <{check|set|complete}>\n" | |
1196 | " : mode, complete set partitioning completed\n" | |
189f963a DSC |
1197 | " WARNING: Partitioning is a write-once setting once it is set to complete.\n" |
1198 | " Power cycling is required to initialize partitions after set to complete.\n" | |
84593679 | 1199 | #endif |
2a91c913 | 1200 | #ifdef CONFIG_SUPPORT_EMMC_BOOT |
1019b196 | 1201 | "mmc bootbus <dev> <boot_bus_width> <reset_boot_bus_width> <boot_mode>\n" |
5a99b9de | 1202 | " - Set the BOOT_BUS_WIDTH field of the specified device\n" |
f1fd957e TR |
1203 | "mmc bootpart-resize <dev> <boot part size MB> <RPMB part size MB>\n" |
1204 | " - Change sizes of boot and RPMB partitions of specified device\n" | |
5c2beda5 | 1205 | "mmc partconf <dev> [[varname] | [<boot_ack> <boot_partition> <partition_access>]]\n" |
bdb60996 | 1206 | " - Show or change the bits of the PARTITION_CONFIG field of the specified device\n" |
5c2beda5 | 1207 | " If showing the bits, optionally store the boot_partition field into varname\n" |
1019b196 | 1208 | "mmc rst-function <dev> <value>\n" |
33ace362 TR |
1209 | " - Change the RST_n_FUNCTION field of the specified device\n" |
1210 | " WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values.\n" | |
3511b4e2 | 1211 | #endif |
5a7b11e6 | 1212 | #if CONFIG_IS_ENABLED(CMD_MMC_RPMB) |
1fd93c6e PA |
1213 | "mmc rpmb read addr blk# cnt [address of auth-key] - block size is 256 bytes\n" |
1214 | "mmc rpmb write addr blk# cnt <address of auth-key> - block size is 256 bytes\n" | |
1215 | "mmc rpmb key <address of auth-key> - program the RPMB authentication key.\n" | |
1216 | "mmc rpmb counter - read the value of the write counter\n" | |
1217 | #endif | |
1218 | "mmc setdsr <value> - set DSR register value\n" | |
cd3d4880 TM |
1219 | #ifdef CONFIG_CMD_BKOPS_ENABLE |
1220 | "mmc bkops-enable <dev> - enable background operations handshake on device\n" | |
1221 | " WARNING: This is a write-once setting.\n" | |
cf1f7355 MV |
1222 | "mmc bkops <dev> [auto|manual] [enable|disable]\n" |
1223 | " - configure background operations handshake on device\n" | |
cd3d4880 | 1224 | #endif |
2a91c913 | 1225 | ); |
1fd93c6e PA |
1226 | |
1227 | /* Old command kept for compatibility. Same as 'mmc info' */ | |
1228 | U_BOOT_CMD( | |
1229 | mmcinfo, 1, 0, do_mmcinfo, | |
1230 | "display MMC info", | |
1231 | "- display info of the current MMC device" | |
1232 | ); |