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cf885929 SG |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* | |
3 | * Copyright 2019 Google LLC | |
4 | */ | |
5 | ||
6 | #define LOG_CATEGORY UCLASS_SOUND | |
7 | ||
8 | #include <common.h> | |
9 | #include <audio_codec.h> | |
10 | #include <dm.h> | |
11 | #include <i2c.h> | |
12 | #include "rt5677.h" | |
f7ae49fc | 13 | #include <log.h> |
cf885929 SG |
14 | |
15 | struct rt5677_priv { | |
16 | struct udevice *dev; | |
17 | }; | |
18 | ||
19 | /* RT5677 has 256 8-bit register addresses, and 16-bit register data */ | |
20 | struct rt5677_init_reg { | |
21 | u8 reg; | |
22 | u16 val; | |
23 | }; | |
24 | ||
25 | static struct rt5677_init_reg init_list[] = { | |
26 | {RT5677_LOUT1, 0x0800}, | |
27 | {RT5677_SIDETONE_CTRL, 0x0000}, | |
28 | {RT5677_STO1_ADC_DIG_VOL, 0x3F3F}, | |
29 | {RT5677_DAC1_DIG_VOL, 0x9090}, | |
30 | {RT5677_STO2_ADC_MIXER, 0xA441}, | |
31 | {RT5677_STO1_ADC_MIXER, 0x5480}, | |
32 | {RT5677_STO1_DAC_MIXER, 0x8A8A}, | |
33 | {RT5677_PWR_DIG1, 0x9800}, /* Power up I2S1 */ | |
34 | {RT5677_PWR_ANLG1, 0xE9D5}, | |
35 | {RT5677_PWR_ANLG2, 0x2CC0}, | |
36 | {RT5677_PWR_DSP2, 0x0C00}, | |
37 | {RT5677_I2S2_SDP, 0x0000}, | |
38 | {RT5677_CLK_TREE_CTRL1, 0x1111}, | |
39 | {RT5677_PLL1_CTRL1, 0x0000}, | |
40 | {RT5677_PLL1_CTRL2, 0x0000}, | |
41 | {RT5677_DIG_MISC, 0x0029}, | |
42 | {RT5677_GEN_CTRL1, 0x00FF}, | |
43 | {RT5677_GPIO_CTRL2, 0x0020}, | |
44 | {RT5677_PWR_DIG2, 0x9024}, /* Power on ADC Stereo Filters */ | |
45 | {RT5677_PDM_OUT_CTRL, 0x0088}, /* Unmute PDM, set stereo1 DAC */ | |
46 | {RT5677_PDM_DATA_CTRL1, 0x0001}, /* Sysclk to PDM filter divider 2 */ | |
47 | }; | |
48 | ||
49 | /** | |
50 | * rt5677_i2c_read() - Read a 16-bit register | |
51 | * | |
52 | * @priv: Private driver data | |
53 | * @reg: Register number to read | |
54 | * @returns data read or -ve on error | |
55 | */ | |
56 | static int rt5677_i2c_read(struct rt5677_priv *priv, uint reg) | |
57 | { | |
58 | u8 buf[2]; | |
59 | int ret; | |
60 | ||
61 | ret = dm_i2c_read(priv->dev, reg, buf, sizeof(u16)); | |
62 | if (ret) | |
63 | return ret; | |
64 | return buf[0] << 8 | buf[1]; | |
65 | } | |
66 | ||
67 | /** | |
68 | * rt5677_i2c_write() - Write a 16-bit register | |
69 | * | |
70 | * @priv: Private driver data | |
71 | * @reg: Register number to read | |
72 | * @data: Data to write | |
73 | * @returns 0 if OK, -ve on error | |
74 | */ | |
75 | static int rt5677_i2c_write(struct rt5677_priv *priv, uint reg, uint data) | |
76 | { | |
77 | u8 buf[2]; | |
78 | ||
79 | buf[0] = (data >> 8) & 0xff; | |
80 | buf[1] = data & 0xff; | |
81 | ||
82 | return dm_i2c_write(priv->dev, reg, buf, sizeof(u16)); | |
83 | } | |
84 | ||
85 | /** | |
86 | * rt5677_bic_or() - Set and clear bits of a codec register | |
87 | * | |
88 | * @priv: Private driver data | |
89 | * @reg: Register number to update | |
90 | * @bic: Mask of bits to clear | |
91 | * @set: Mask of bits to set | |
92 | * @returns 0 if OK, -ve on error | |
93 | * | |
94 | */ | |
95 | static int rt5677_bic_or(struct rt5677_priv *priv, uint reg, uint bic, | |
96 | uint set) | |
97 | { | |
98 | uint old, new_value; | |
99 | int ret; | |
100 | ||
101 | old = rt5677_i2c_read(priv, reg); | |
102 | if (old < 0) | |
103 | return old; | |
104 | ||
105 | new_value = (old & ~bic) | (set & bic); | |
106 | ||
107 | if (old != new_value) { | |
108 | ret = rt5677_i2c_write(priv, reg, new_value); | |
109 | if (ret) | |
110 | return ret; | |
111 | } | |
112 | ||
113 | return 0; | |
114 | } | |
115 | ||
116 | /** | |
117 | * rt5677_reg_init() - Initialise codec regs w/static/base values | |
118 | * | |
119 | * @priv: Private driver data | |
120 | * @returns 0 if OK, -ve on error | |
121 | */ | |
122 | static int rt5677_reg_init(struct rt5677_priv *priv) | |
123 | { | |
124 | int ret; | |
125 | int i; | |
126 | ||
127 | for (i = 0; i < ARRAY_SIZE(init_list); i++) { | |
128 | ret = rt5677_i2c_write(priv, init_list[i].reg, init_list[i].val); | |
129 | if (ret) | |
130 | return ret; | |
131 | } | |
132 | ||
133 | return 0; | |
134 | } | |
135 | ||
136 | #ifdef DEBUG | |
137 | static void debug_dump_5677_regs(struct rt5677_priv *priv, int swap) | |
138 | { | |
139 | uint i, reg_word; | |
140 | ||
141 | /* Show all 16-bit codec regs */ | |
142 | for (i = 0; i < RT5677_REG_CNT; i++) { | |
143 | if (i % 8 == 0) | |
144 | log_debug("\nMX%02x: ", i); | |
145 | ||
146 | rt5677_i2c_read(priv, (u8)i, ®_word); | |
147 | if (swap) | |
148 | log_debug("%04x ", swap_bytes16(reg_word)); | |
149 | else | |
150 | log_debug("%04x ", reg_word); | |
151 | } | |
152 | log_debug("\n"); | |
153 | ||
154 | /* Show all 16-bit 'private' codec regs */ | |
155 | for (i = 0; i < RT5677_PR_REG_CNT; i++) { | |
156 | if (i % 8 == 0) | |
157 | log_debug("\nPR%02x: ", i); | |
158 | ||
159 | rt5677_i2c_write(priv, RT5677_PRIV_INDEX, i); | |
160 | rt5677_i2c_read(priv, RT5677_PRIV_DATA, ®_word); | |
161 | if (swap) | |
162 | log_debug("%04x ", swap_bytes16(reg_word)); | |
163 | else | |
164 | log_debug("%04x ", reg_word); | |
165 | } | |
166 | log_debug("\n"); | |
167 | } | |
168 | #endif /* DEBUG */ | |
169 | ||
170 | static int rt5677_hw_params(struct rt5677_priv *priv, uint bits_per_sample) | |
171 | { | |
172 | int ret; | |
173 | ||
174 | switch (bits_per_sample) { | |
175 | case 16: | |
176 | ret = rt5677_bic_or(priv, RT5677_I2S1_SDP, RT5677_I2S_DL_MASK, | |
177 | 0); | |
178 | if (ret) { | |
179 | log_debug("Error updating I2S1 Interface Ctrl reg\n"); | |
180 | return 1; | |
181 | } | |
182 | break; | |
183 | default: | |
184 | log_err("Illegal bits per sample %d\n", bits_per_sample); | |
185 | return -EINVAL; | |
186 | } | |
187 | ||
188 | return 0; | |
189 | } | |
190 | ||
191 | /** | |
192 | * rt5677_set_fmt() - set rt5677 I2S format | |
193 | * | |
194 | * @priv: Private driver data | |
195 | * @returns 0 if OK, -ve on error | |
196 | */ | |
197 | static int rt5677_set_fmt(struct rt5677_priv *priv) | |
198 | { | |
199 | int ret = 0; | |
200 | ||
201 | /* | |
202 | * Set format here: Assumes I2S, NB_NF, CBS_CFS | |
203 | * | |
204 | * CBS_CFS (Codec Bit Slave/Codec Frame Slave) | |
205 | */ | |
206 | ret = rt5677_bic_or(priv, RT5677_I2S1_SDP, RT5677_I2S_MS_MASK, | |
207 | RT5677_I2S_MS_S); | |
208 | ||
209 | /* NB_NF (Normal Bit/Normal Frame) */ | |
210 | ret |= rt5677_bic_or(priv, RT5677_I2S1_SDP, RT5677_I2S_BP_MASK, | |
211 | RT5677_I2S_BP_NOR); | |
212 | ||
213 | /* I2S mode */ | |
214 | ret |= rt5677_bic_or(priv, RT5677_I2S1_SDP, RT5677_I2S_DF_MASK, | |
215 | RT5677_I2S_DF_I2S); | |
216 | ||
217 | /* A44: I2S2 (going to speaker amp) is master */ | |
218 | ret |= rt5677_bic_or(priv, RT5677_I2S2_SDP, RT5677_I2S_MS_MASK, | |
219 | RT5677_I2S_MS_M); | |
220 | ||
221 | if (ret) { | |
222 | log_err("Error updating I2S1 Interface Ctrl reg\n"); | |
223 | return ret; | |
224 | } | |
225 | ||
226 | return 0; | |
227 | } | |
228 | ||
229 | /** | |
230 | * rt5677_reset() - reset the audio codec | |
231 | * | |
232 | * @priv: Private driver data | |
233 | * @returns 0 if OK, -ve on error | |
234 | */ | |
235 | static int rt5677_reset(struct rt5677_priv *priv) | |
236 | { | |
237 | int ret; | |
238 | ||
239 | /* Reset the codec registers to their defaults */ | |
240 | ret = rt5677_i2c_write(priv, RT5677_RESET, RT5677_SW_RESET); | |
241 | if (ret) { | |
242 | log_err("Error resetting codec\n"); | |
243 | return ret; | |
244 | } | |
245 | ||
246 | return 0; | |
247 | } | |
248 | ||
249 | /** | |
250 | * Initialise rt5677 codec device | |
251 | * | |
252 | * @priv: Private driver data | |
253 | * @returns 0 if OK, -ve on error | |
254 | */ | |
255 | int rt5677_device_init(struct rt5677_priv *priv) | |
256 | { | |
257 | int ret; | |
258 | ||
259 | /* Read status reg */ | |
260 | ret = rt5677_i2c_read(priv, RT5677_RESET); | |
261 | if (ret < 0) | |
262 | return ret; | |
263 | log_debug("reg 00h, Software Reset & Status = 0x%04x\n", ret); | |
264 | ||
265 | /* Reset the codec/regs */ | |
266 | ret = rt5677_reset(priv); | |
267 | if (ret) | |
268 | return ret; | |
269 | ||
270 | ret = rt5677_i2c_read(priv, RT5677_VENDOR_ID1); | |
271 | if (ret < 0) { | |
272 | log_err("Error reading vendor ID\n"); | |
273 | return 1; | |
274 | } | |
275 | log_debug("Hardware ID: %0xX\n", ret); | |
276 | ||
277 | ret = rt5677_i2c_read(priv, RT5677_VENDOR_ID2); | |
278 | if (ret < 0) { | |
279 | log_err("Error reading vendor rev\n"); | |
280 | return 1; | |
281 | } | |
282 | log_debug("Hardware revision: %04x\n", ret); | |
283 | ||
284 | return 0; | |
285 | } | |
286 | ||
287 | static int rt5677_set_params(struct udevice *dev, int interface, int rate, | |
288 | int mclk_freq, int bits_per_sample, | |
289 | uint channels) | |
290 | { | |
291 | struct rt5677_priv *priv = dev_get_priv(dev); | |
292 | int ret; | |
293 | ||
294 | /* Initialise codec regs w/static/base values, same as Linux driver */ | |
295 | ret = rt5677_reg_init(priv); | |
296 | if (ret) | |
297 | return ret; | |
298 | ||
299 | ret = rt5677_hw_params(priv, bits_per_sample); | |
300 | if (ret) | |
301 | return ret; | |
302 | ||
303 | ret = rt5677_set_fmt(priv); | |
304 | if (ret) | |
305 | return ret; | |
306 | ||
307 | return 0; | |
308 | } | |
309 | ||
310 | static int rt5677_probe(struct udevice *dev) | |
311 | { | |
312 | struct rt5677_priv *priv = dev_get_priv(dev); | |
313 | ||
314 | priv->dev = dev; | |
315 | ||
316 | return rt5677_device_init(priv); | |
317 | } | |
318 | ||
319 | static const struct audio_codec_ops rt5677_ops = { | |
320 | .set_params = rt5677_set_params, | |
321 | }; | |
322 | ||
323 | static const struct udevice_id rt5677_ids[] = { | |
324 | { .compatible = "realtek,rt5677" }, | |
325 | { } | |
326 | }; | |
327 | ||
328 | U_BOOT_DRIVER(rt5677_drv) = { | |
329 | .name = "rt5677", | |
330 | .id = UCLASS_AUDIO_CODEC, | |
331 | .of_match = rt5677_ids, | |
332 | .ops = &rt5677_ops, | |
333 | .probe = rt5677_probe, | |
334 | .priv_auto_alloc_size = sizeof(struct rt5677_priv), | |
335 | }; |