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Commit | Line | Data |
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d25ce7d2 | 1 | /* |
a5e8199a | 2 | * Common SPI flash Interface |
d25ce7d2 HS |
3 | * |
4 | * Copyright (C) 2008 Atmel Corporation | |
a5e8199a | 5 | * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. |
d25ce7d2 | 6 | * |
5b8031cc | 7 | * SPDX-License-Identifier: GPL-2.0 |
d25ce7d2 | 8 | */ |
a5e8199a | 9 | |
d25ce7d2 HS |
10 | #ifndef _SPI_FLASH_H_ |
11 | #define _SPI_FLASH_H_ | |
12 | ||
4c2dbefd | 13 | #include <dm.h> /* Because we dereference struct udevice here */ |
e06ab654 | 14 | #include <linux/types.h> |
d25ce7d2 | 15 | |
88e34e5f NK |
16 | #ifndef CONFIG_SF_DEFAULT_SPEED |
17 | # define CONFIG_SF_DEFAULT_SPEED 1000000 | |
18 | #endif | |
19 | #ifndef CONFIG_SF_DEFAULT_MODE | |
20 | # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 | |
21 | #endif | |
22 | #ifndef CONFIG_SF_DEFAULT_CS | |
23 | # define CONFIG_SF_DEFAULT_CS 0 | |
24 | #endif | |
25 | #ifndef CONFIG_SF_DEFAULT_BUS | |
26 | # define CONFIG_SF_DEFAULT_BUS 0 | |
27 | #endif | |
28 | ||
ff0960f9 | 29 | struct spi_slave; |
33adfb5f | 30 | |
7ab35d92 JT |
31 | /** |
32 | * struct spi_flash - SPI flash structure | |
33 | * | |
34 | * @spi: SPI slave | |
5d69df35 | 35 | * @dev: SPI flash device |
7ab35d92 | 36 | * @name: Name of SPI flash |
5d69df35 | 37 | * @dual_flash: Indicates dual flash memories - dual stacked, parallel |
056fbc73 | 38 | * @shift: Flash shift useful in dual parallel |
1fabefdd | 39 | * @flags: Indication of spi flash flags |
7ab35d92 JT |
40 | * @size: Total flash size |
41 | * @page_size: Write (page) size | |
42 | * @sector_size: Sector size | |
5d69df35 | 43 | * @erase_size: Erase size |
7ab35d92 JT |
44 | * @bank_read_cmd: Bank read cmd |
45 | * @bank_write_cmd: Bank write cmd | |
46 | * @bank_curr: Current flash bank | |
7ab35d92 | 47 | * @erase_cmd: Erase cmd 4K, 32K, 64K |
3163aaa6 JT |
48 | * @read_cmd: Read cmd - Array Fast, Extn read and quad read. |
49 | * @write_cmd: Write cmd - page and quad program. | |
5d69df35 JT |
50 | * @dummy_byte: Dummy cycles for read operation. |
51 | * @memory_map: Address of read-only SPI flash access | |
c3c016cf FE |
52 | * @flash_lock: lock a region of the SPI Flash |
53 | * @flash_unlock: unlock a region of the SPI Flash | |
54 | * @flash_is_locked: check if a region of the SPI Flash is completely locked | |
7ab35d92 JT |
55 | * @read: Flash read ops: Read len bytes at offset into buf |
56 | * Supported cmds: Fast Array Read | |
801cec59 | 57 | * @write: Flash write ops: Write len bytes from buf into offset |
7ab35d92 JT |
58 | * Supported cmds: Page Program |
59 | * @erase: Flash erase ops: Erase len bytes from offset | |
60 | * Supported cmds: Sector erase 4K, 32K, 64K | |
801cec59 | 61 | * return 0 - Success, 1 - Failure |
7ab35d92 | 62 | */ |
d25ce7d2 HS |
63 | struct spi_flash { |
64 | struct spi_slave *spi; | |
d15e74f1 | 65 | #ifdef CONFIG_DM_SPI_FLASH |
4c2dbefd | 66 | struct udevice *dev; |
4c2dbefd | 67 | #endif |
7ab35d92 | 68 | const char *name; |
f77f4691 | 69 | u8 dual_flash; |
056fbc73 | 70 | u8 shift; |
1fabefdd | 71 | u16 flags; |
d25ce7d2 | 72 | |
7ab35d92 JT |
73 | u32 size; |
74 | u32 page_size; | |
75 | u32 sector_size; | |
76 | u32 erase_size; | |
1dcd6d03 | 77 | #ifdef CONFIG_SPI_FLASH_BAR |
7ab35d92 JT |
78 | u8 bank_read_cmd; |
79 | u8 bank_write_cmd; | |
80 | u8 bank_curr; | |
1dcd6d03 | 81 | #endif |
7ab35d92 | 82 | u8 erase_cmd; |
4e09cc1e | 83 | u8 read_cmd; |
3163aaa6 | 84 | u8 write_cmd; |
ff063ed4 | 85 | u8 dummy_byte; |
615a1561 | 86 | |
7ab35d92 | 87 | void *memory_map; |
c3c016cf FE |
88 | |
89 | int (*flash_lock)(struct spi_flash *flash, u32 ofs, size_t len); | |
90 | int (*flash_unlock)(struct spi_flash *flash, u32 ofs, size_t len); | |
91 | int (*flash_is_locked)(struct spi_flash *flash, u32 ofs, size_t len); | |
4c2dbefd SG |
92 | #ifndef CONFIG_DM_SPI_FLASH |
93 | /* | |
94 | * These are not strictly needed for driver model, but keep them here | |
d15e74f1 | 95 | * while the transition is in progress. |
4c2dbefd SG |
96 | * |
97 | * Normally each driver would provide its own operations, but for | |
98 | * SPI flash most chips use the same algorithms. One approach is | |
99 | * to create a 'common' SPI flash device which knows how to talk | |
100 | * to most devices, and then allow other drivers to be used instead | |
d15e74f1 | 101 | * if required, perhaps with a way of scanning through the list to |
4c2dbefd SG |
102 | * find the driver that matches the device. |
103 | */ | |
7ab35d92 JT |
104 | int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf); |
105 | int (*write)(struct spi_flash *flash, u32 offset, size_t len, | |
106 | const void *buf); | |
107 | int (*erase)(struct spi_flash *flash, u32 offset, size_t len); | |
4c2dbefd SG |
108 | #endif |
109 | }; | |
110 | ||
111 | struct dm_spi_flash_ops { | |
112 | int (*read)(struct udevice *dev, u32 offset, size_t len, void *buf); | |
113 | int (*write)(struct udevice *dev, u32 offset, size_t len, | |
114 | const void *buf); | |
115 | int (*erase)(struct udevice *dev, u32 offset, size_t len); | |
d25ce7d2 HS |
116 | }; |
117 | ||
4c2dbefd SG |
118 | /* Access the serial operations for a device */ |
119 | #define sf_get_ops(dev) ((struct dm_spi_flash_ops *)(dev)->driver->ops) | |
120 | ||
121 | #ifdef CONFIG_DM_SPI_FLASH | |
8d987abc SG |
122 | /** |
123 | * spi_flash_read_dm() - Read data from SPI flash | |
124 | * | |
125 | * @dev: SPI flash device | |
126 | * @offset: Offset into device in bytes to read from | |
127 | * @len: Number of bytes to read | |
128 | * @buf: Buffer to put the data that is read | |
129 | * @return 0 if OK, -ve on error | |
130 | */ | |
131 | int spi_flash_read_dm(struct udevice *dev, u32 offset, size_t len, void *buf); | |
132 | ||
133 | /** | |
134 | * spi_flash_write_dm() - Write data to SPI flash | |
135 | * | |
136 | * @dev: SPI flash device | |
137 | * @offset: Offset into device in bytes to write to | |
138 | * @len: Number of bytes to write | |
139 | * @buf: Buffer containing bytes to write | |
140 | * @return 0 if OK, -ve on error | |
141 | */ | |
142 | int spi_flash_write_dm(struct udevice *dev, u32 offset, size_t len, | |
143 | const void *buf); | |
144 | ||
145 | /** | |
146 | * spi_flash_erase_dm() - Erase blocks of the SPI flash | |
147 | * | |
148 | * Note that @len must be a muiltiple of the flash sector size. | |
149 | * | |
150 | * @dev: SPI flash device | |
151 | * @offset: Offset into device in bytes to start erasing | |
152 | * @len: Number of bytes to erase | |
153 | * @return 0 if OK, -ve on error | |
154 | */ | |
155 | int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len); | |
156 | ||
4c2dbefd SG |
157 | int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs, |
158 | unsigned int max_hz, unsigned int spi_mode, | |
159 | struct udevice **devp); | |
160 | ||
161 | /* Compatibility function - this is the old U-Boot API */ | |
162 | struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, | |
163 | unsigned int max_hz, unsigned int spi_mode); | |
164 | ||
165 | /* Compatibility function - this is the old U-Boot API */ | |
166 | void spi_flash_free(struct spi_flash *flash); | |
167 | ||
4c2dbefd | 168 | static inline int spi_flash_read(struct spi_flash *flash, u32 offset, |
8d987abc | 169 | size_t len, void *buf) |
4c2dbefd | 170 | { |
8d987abc | 171 | return spi_flash_read_dm(flash->dev, offset, len, buf); |
4c2dbefd SG |
172 | } |
173 | ||
174 | static inline int spi_flash_write(struct spi_flash *flash, u32 offset, | |
8d987abc | 175 | size_t len, const void *buf) |
4c2dbefd | 176 | { |
8d987abc | 177 | return spi_flash_write_dm(flash->dev, offset, len, buf); |
4c2dbefd SG |
178 | } |
179 | ||
180 | static inline int spi_flash_erase(struct spi_flash *flash, u32 offset, | |
8d987abc | 181 | size_t len) |
4c2dbefd | 182 | { |
8d987abc | 183 | return spi_flash_erase_dm(flash->dev, offset, len); |
4c2dbefd SG |
184 | } |
185 | ||
186 | struct sandbox_state; | |
187 | ||
188 | int sandbox_sf_bind_emul(struct sandbox_state *state, int busnum, int cs, | |
189 | struct udevice *bus, int of_offset, const char *spec); | |
190 | ||
191 | void sandbox_sf_unbind_emul(struct sandbox_state *state, int busnum, int cs); | |
192 | ||
193 | #else | |
d25ce7d2 HS |
194 | struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, |
195 | unsigned int max_hz, unsigned int spi_mode); | |
0efc0249 SG |
196 | |
197 | /** | |
198 | * Set up a new SPI flash from an fdt node | |
199 | * | |
200 | * @param blob Device tree blob | |
201 | * @param slave_node Pointer to this SPI slave node in the device tree | |
202 | * @param spi_node Cached pointer to the SPI interface this node belongs | |
203 | * to | |
204 | * @return 0 if ok, -1 on error | |
205 | */ | |
206 | struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node, | |
207 | int spi_node); | |
208 | ||
d25ce7d2 HS |
209 | void spi_flash_free(struct spi_flash *flash); |
210 | ||
211 | static inline int spi_flash_read(struct spi_flash *flash, u32 offset, | |
212 | size_t len, void *buf) | |
213 | { | |
214 | return flash->read(flash, offset, len, buf); | |
215 | } | |
216 | ||
217 | static inline int spi_flash_write(struct spi_flash *flash, u32 offset, | |
218 | size_t len, const void *buf) | |
219 | { | |
220 | return flash->write(flash, offset, len, buf); | |
221 | } | |
222 | ||
223 | static inline int spi_flash_erase(struct spi_flash *flash, u32 offset, | |
224 | size_t len) | |
225 | { | |
226 | return flash->erase(flash, offset, len); | |
227 | } | |
4c2dbefd | 228 | #endif |
d25ce7d2 | 229 | |
c3c016cf FE |
230 | static inline int spi_flash_protect(struct spi_flash *flash, u32 ofs, u32 len, |
231 | bool prot) | |
232 | { | |
439fcb9b | 233 | if (!flash->flash_lock || !flash->flash_unlock) |
c3c016cf FE |
234 | return -EOPNOTSUPP; |
235 | ||
236 | if (prot) | |
237 | return flash->flash_lock(flash, ofs, len); | |
238 | else | |
239 | return flash->flash_unlock(flash, ofs, len); | |
240 | } | |
241 | ||
d25ce7d2 | 242 | #endif /* _SPI_FLASH_H_ */ |