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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
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2 | /* |
3 | * Copyright 2013 Freescale Semiconductor, Inc. | |
4 | * | |
5 | * Configuration settings for the phytec PCM-052 SoM. | |
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6 | */ |
7 | ||
8 | #ifndef __CONFIG_H | |
9 | #define __CONFIG_H | |
10 | ||
11 | #include <asm/arch/imx-regs.h> | |
12 | ||
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13 | #define CONFIG_SKIP_LOWLEVEL_INIT |
14 | ||
15 | /* Enable passing of ATAGs */ | |
16 | #define CONFIG_CMDLINE_TAG | |
17 | ||
18 | /* Size of malloc() pool */ | |
19 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) | |
20 | ||
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21 | /* Allow to overwrite serial and ethaddr */ |
22 | #define CONFIG_ENV_OVERWRITE | |
931a1d2a | 23 | |
931a1d2a | 24 | /* NAND support */ |
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25 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
26 | ||
27 | #ifdef CONFIG_CMD_NAND | |
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28 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
29 | #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR | |
30 | ||
31 | #define CONFIG_JFFS2_NAND | |
32 | ||
931a1d2a | 33 | /* Dynamic MTD partition support */ |
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34 | #define CONFIG_MTD_PARTITIONS |
35 | #define CONFIG_MTD_DEVICE | |
27192d16 | 36 | |
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37 | #endif |
38 | ||
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39 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
40 | #define CONFIG_SYS_FSL_ESDHC_NUM 1 | |
41 | ||
42 | /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/ | |
931a1d2a | 43 | |
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44 | #define CONFIG_FEC_MXC |
45 | #define CONFIG_MII | |
46 | #define IMX_FEC_BASE ENET_BASE_ADDR | |
47 | #define CONFIG_FEC_XCV_TYPE RMII | |
48 | #define CONFIG_FEC_MXC_PHYADDR 0 | |
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49 | |
50 | /* QSPI Configs*/ | |
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51 | |
52 | #ifdef CONFIG_FSL_QSPI | |
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53 | #define FSL_QSPI_FLASH_SIZE (1 << 24) |
54 | #define FSL_QSPI_FLASH_NUM 2 | |
55 | #define CONFIG_SYS_FSL_QSPI_LE | |
56 | #endif | |
57 | ||
58 | /* I2C Configs */ | |
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59 | #define CONFIG_SYS_I2C |
60 | #define CONFIG_SYS_I2C_MXC_I2C3 | |
61 | #define CONFIG_SYS_I2C_MXC | |
62 | ||
63 | /* RTC (actually an RV-4162 but M41T62-compatible) */ | |
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64 | #define CONFIG_RTC_M41T62 |
65 | #define CONFIG_SYS_I2C_RTC_ADDR 0x68 | |
66 | #define CONFIG_SYS_RTC_BUS_NUM 2 | |
67 | ||
68 | /* EEPROM (24FC256) */ | |
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69 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 |
70 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 | |
71 | #define CONFIG_SYS_I2C_EEPROM_BUS 2 | |
72 | ||
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73 | |
74 | #define CONFIG_LOADADDR 0x82000000 | |
75 | ||
76 | /* We boot from the gfxRAM area of the OCRAM. */ | |
c0f432c3 | 77 | #define CONFIG_BOARD_SIZE_LIMIT 520192 |
931a1d2a | 78 | |
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79 | /* if no target-specific extra environment settings were defined by the |
80 | target, define an empty one */ | |
81 | #ifndef PCM052_EXTRA_ENV_SETTINGS | |
82 | #define PCM052_EXTRA_ENV_SETTINGS | |
83 | #endif | |
84 | ||
85 | /* if no target-specific boot command was defined by the target, | |
86 | define an empty one */ | |
87 | #ifndef PCM052_BOOTCOMMAND | |
88 | #define PCM052_BOOTCOMMAND | |
89 | #endif | |
90 | ||
91 | /* if no target-specific extra environment settings were defined by the | |
92 | target, define an empty one */ | |
93 | #ifndef PCM052_NET_INIT | |
94 | #define PCM052_NET_INIT | |
95 | #endif | |
96 | ||
97 | /* boot command, including the target-defined one if any */ | |
98 | #define CONFIG_BOOTCOMMAND PCM052_BOOTCOMMAND "run bootcmd_nand" | |
99 | ||
100 | /* Extra env settings (including the target-defined ones if any) */ | |
040ef8f5 | 101 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
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102 | PCM052_EXTRA_ENV_SETTINGS \ |
103 | "autoload=no\0" \ | |
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104 | "fdt_high=0xffffffff\0" \ |
105 | "initrd_high=0xffffffff\0" \ | |
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106 | "blimg_file=u-boot.vyb\0" \ |
107 | "blimg_addr=0x81000000\0" \ | |
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108 | "kernel_file=zImage\0" \ |
109 | "kernel_addr=0x82000000\0" \ | |
083e4fd4 | 110 | "fdt_file=zImage.dtb\0" \ |
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111 | "fdt_addr=0x81000000\0" \ |
112 | "ram_file=uRamdisk\0" \ | |
113 | "ram_addr=0x83000000\0" \ | |
114 | "filesys=rootfs.ubifs\0" \ | |
115 | "sys_addr=0x81000000\0" \ | |
116 | "tftploc=/path/to/tftp/directory/\0" \ | |
117 | "nfs_root=/path/to/nfs/root\0" \ | |
118 | "tftptimeout=1000\0" \ | |
119 | "tftptimeoutcountmax=1000000\0" \ | |
43ede0bc | 120 | "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ |
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121 | "bootargs_base=setenv bootargs rw " \ |
122 | " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \ | |
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123 | "console=ttyLP1,115200n8\0" \ |
124 | "bootargs_sd=setenv bootargs ${bootargs} " \ | |
125 | "root=/dev/mmcblk0p2 rootwait\0" \ | |
931a1d2a | 126 | "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \ |
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127 | "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \ |
128 | "bootargs_nand=setenv bootargs ${bootargs} " \ | |
27f7d4f5 | 129 | "ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \ |
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130 | "bootargs_ram=setenv bootargs ${bootargs} " \ |
131 | "root=/dev/ram rw initrd=${ram_addr}\0" \ | |
132 | "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ | |
133 | "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \ | |
134 | "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \ | |
135 | "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \ | |
136 | "bootz ${kernel_addr} - ${fdt_addr}\0" \ | |
137 | "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \ | |
138 | "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \ | |
139 | "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \ | |
140 | "bootz ${kernel_addr} - ${fdt_addr}\0" \ | |
141 | "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \ | |
142 | "nand read ${fdt_addr} dtb; " \ | |
143 | "nand read ${kernel_addr} kernel; " \ | |
144 | "bootz ${kernel_addr} - ${fdt_addr}\0" \ | |
145 | "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \ | |
146 | "nand read ${fdt_addr} dtb; " \ | |
147 | "nand read ${kernel_addr} kernel; " \ | |
27f7d4f5 | 148 | "nand read ${ram_addr} root; " \ |
040ef8f5 | 149 | "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \ |
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150 | "update_bootloader_from_tftp=" PCM052_NET_INIT \ |
151 | "if tftp ${blimg_addr} "\ | |
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152 | "${tftpdir}${blimg_file}; then " \ |
153 | "mtdparts default; " \ | |
040ef8f5 | 154 | "nand erase.part bootloader; " \ |
ed0c2c0a | 155 | "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \ |
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156 | "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \ |
157 | "${kernel_file}; " \ | |
158 | "then mtdparts default; " \ | |
159 | "nand erase.part kernel; " \ | |
160 | "nand write ${kernel_addr} kernel ${filesize}; " \ | |
161 | "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \ | |
162 | "nand erase.part dtb; " \ | |
163 | "nand write ${fdt_addr} dtb ${filesize}; fi\0" \ | |
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164 | "update_kernel_from_tftp=" PCM052_NET_INIT \ |
165 | "if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \ | |
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166 | "then setenv fdtsize ${filesize}; " \ |
167 | "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \ | |
168 | "mtdparts default; " \ | |
169 | "nand erase.part dtb; " \ | |
170 | "nand write ${fdt_addr} dtb ${fdtsize}; " \ | |
171 | "nand erase.part kernel; " \ | |
172 | "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \ | |
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173 | "update_rootfs_from_tftp=" PCM052_NET_INIT \ |
174 | "if tftp ${sys_addr} ${tftpdir}${filesys}; " \ | |
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175 | "then mtdparts default; " \ |
176 | "nand erase.part root; " \ | |
177 | "ubi part root; " \ | |
178 | "ubi create rootfs; " \ | |
179 | "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \ | |
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180 | "update_ramdisk_from_tftp=" PCM052_NET_INIT \ |
181 | "if tftp ${ram_addr} ${tftpdir}${ram_file}; " \ | |
040ef8f5 | 182 | "then mtdparts default; " \ |
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183 | "nand erase.part root; " \ |
184 | "nand write ${ram_addr} root ${filesize}; fi\0" | |
931a1d2a | 185 | |
931a1d2a | 186 | /* Miscellaneous configurable options */ |
931a1d2a | 187 | |
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188 | #define CONFIG_SYS_MEMTEST_START 0x80010000 |
189 | #define CONFIG_SYS_MEMTEST_END 0x87C00000 | |
190 | ||
191 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
192 | ||
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193 | /* Physical memory map */ |
194 | #define CONFIG_NR_DRAM_BANKS 1 | |
195 | #define PHYS_SDRAM (0x80000000) | |
a7e5f7f3 | 196 | #define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * 1024 * 1024) |
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197 | |
198 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
199 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
200 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
201 | ||
202 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
203 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
204 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
205 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
206 | ||
e856bdcf | 207 | /* environment organization */ |
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208 | #ifdef CONFIG_ENV_IS_IN_MMC |
209 | #define CONFIG_ENV_SIZE (8 * 1024) | |
210 | ||
211 | #define CONFIG_ENV_OFFSET (12 * 64 * 1024) | |
212 | #define CONFIG_SYS_MMC_ENV_DEV 0 | |
213 | #endif | |
214 | ||
215 | #ifdef CONFIG_ENV_IS_IN_NAND | |
216 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) | |
217 | #define CONFIG_ENV_SIZE (8 * 1024) | |
040ef8f5 | 218 | #define CONFIG_ENV_OFFSET 0xA0000 |
931a1d2a | 219 | #define CONFIG_ENV_SIZE_REDUND (8 * 1024) |
040ef8f5 | 220 | #define CONFIG_ENV_OFFSET_REDUND 0xC0000 |
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221 | #endif |
222 | ||
931a1d2a | 223 | #endif |