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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
eb6b458c | 2 | /* Copyright 2013 Freescale Semiconductor, Inc. |
eb6b458c PL |
3 | */ |
4 | ||
5 | #include <common.h> | |
6 | #include <mpc85xx.h> | |
7 | #include <asm/io.h> | |
8 | #include <ns16550.h> | |
9 | #include <nand.h> | |
10 | #include <asm/mmu.h> | |
11 | #include <asm/immap_85xx.h> | |
12 | #include <asm/fsl_law.h> | |
13 | #include <asm/global_data.h> | |
14 | ||
15 | DECLARE_GLOBAL_DATA_PTR; | |
16 | ||
17 | void board_init_f(ulong bootflag) | |
18 | { | |
19 | u32 plat_ratio; | |
20 | ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; | |
21 | ||
22 | #if defined(CONFIG_SYS_NAND_BR_PRELIM) && defined(CONFIG_SYS_NAND_OR_PRELIM) | |
23 | set_lbc_br(0, CONFIG_SYS_NAND_BR_PRELIM); | |
24 | set_lbc_or(0, CONFIG_SYS_NAND_OR_PRELIM); | |
25 | #endif | |
26 | ||
27 | /* initialize selected port with appropriate baud rate */ | |
28 | plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; | |
29 | plat_ratio >>= 1; | |
30 | gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; | |
31 | ||
32 | NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, | |
33 | gd->bus_clk / 16 / CONFIG_BAUDRATE); | |
34 | ||
35 | puts("\nNAND boot...\n"); | |
36 | ||
37 | /* copy code to RAM and jump to it - this should not return */ | |
38 | /* NOTE - code has to be copied out of NAND buffer before | |
39 | * other blocks can be read. | |
40 | */ | |
41 | relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); | |
42 | } | |
43 | ||
44 | void board_init_r(gd_t *gd, ulong dest_addr) | |
45 | { | |
46 | puts("SPL\n"); | |
47 | nand_boot(); | |
48 | } | |
49 | ||
50 | void putc(char c) | |
51 | { | |
52 | if (c == '\n') | |
53 | NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r'); | |
54 | ||
55 | NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c); | |
56 | } | |
57 | ||
58 | void puts(const char *str) | |
59 | { | |
60 | while (*str) | |
61 | putc(*str++); | |
62 | } |