projects / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 9886c3d7 IG |
2 | /* |
| 3 | * (C) Copyright 2014 CompuLab, Ltd. <www.compulab.co.il> | |
| 4 | * | |
| 5 | * Authors: Igor Grinberg <[email protected]> | |
| 9886c3d7 IG |
6 | */ |
| 7 | ||
| 8 | #include <common.h> | |
| 9 | #include <netdev.h> | |
| 10 | ||
| 11 | #include <asm/io.h> | |
| 1221ce45 | 12 | #include <linux/errno.h> |
| 9886c3d7 IG |
13 | #include <asm/arch/cpu.h> |
| 14 | #include <asm/arch/mem.h> | |
| 15 | #include <asm/arch/sys_proto.h> | |
| 16 | #include <asm/gpio.h> | |
| 17 | ||
| 18 | #include "common.h" | |
| 19 | ||
| 20 | static u32 cl_omap3_smc911x_gpmc_net_config[GPMC_MAX_REG] = { | |
| 21 | NET_GPMC_CONFIG1, | |
| 22 | NET_GPMC_CONFIG2, | |
| 23 | NET_GPMC_CONFIG3, | |
| 24 | NET_GPMC_CONFIG4, | |
| 25 | NET_GPMC_CONFIG5, | |
| 26 | NET_GPMC_CONFIG6, | |
| 27 | 0 | |
| 28 | }; | |
| 29 | ||
| 30 | static void cl_omap3_smc911x_setup_net_chip_gmpc(int cs, u32 base_addr) | |
| 31 | { | |
| 32 | struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; | |
| 33 | ||
| 34 | enable_gpmc_cs_config(cl_omap3_smc911x_gpmc_net_config, | |
| 35 | &gpmc_cfg->cs[cs], base_addr, GPMC_SIZE_16M); | |
| 36 | ||
| 37 | /* Enable off mode for NWE in PADCONF_GPMC_NWE register */ | |
| 38 | writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); | |
| 39 | ||
| 40 | /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */ | |
| 41 | writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); | |
| 42 | ||
| 43 | /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */ | |
| 44 | writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, | |
| 45 | &ctrl_base->gpmc_nadv_ale); | |
| 46 | } | |
| 47 | ||
| 48 | #ifdef CONFIG_OMAP_GPIO | |
| 49 | static int cl_omap3_smc911x_reset_net_chip(int gpio) | |
| 50 | { | |
| 51 | int err; | |
| 52 | ||
| 53 | if (!gpio_is_valid(gpio)) | |
| 54 | return -EINVAL; | |
| 55 | ||
| 56 | err = gpio_request(gpio, "eth rst"); | |
| 57 | if (err) | |
| 58 | return err; | |
| 59 | ||
| 60 | /* Set gpio as output and send a pulse */ | |
| 61 | gpio_direction_output(gpio, 1); | |
| 62 | udelay(1); | |
| 63 | gpio_set_value(gpio, 0); | |
| 64 | mdelay(40); | |
| 65 | gpio_set_value(gpio, 1); | |
| 66 | mdelay(1); | |
| 67 | ||
| 68 | return 0; | |
| 69 | } | |
| 70 | #else /* !CONFIG_OMAP_GPIO */ | |
| 71 | static inline int cl_omap3_smc911x_reset_net_chip(int gpio) { return 0; } | |
| 72 | #endif /* CONFIG_OMAP_GPIO */ | |
| 73 | ||
| 74 | int cl_omap3_smc911x_init(int id, int cs, u32 base_addr, | |
| 75 | int (*reset)(int), int rst_gpio) | |
| 76 | { | |
| 77 | int ret; | |
| 78 | ||
| 79 | cl_omap3_smc911x_setup_net_chip_gmpc(cs, base_addr); | |
| 80 | ||
| 81 | if (reset) | |
| 82 | reset(rst_gpio); | |
| 83 | else | |
| 84 | cl_omap3_smc911x_reset_net_chip(rst_gpio); | |
| 85 | ||
| 86 | ret = smc911x_initialize(id, base_addr); | |
| 87 | if (ret > 0) | |
| 88 | return ret; | |
| 89 | ||
| 90 | printf("Failed initializing SMC911x! "); | |
| 91 | return 0; | |
| 92 | } |