[u-boot.git] / drivers / serial / lpc32xx_hsuart.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2011-2015 Vladimir Zapolskiy <[email protected]>
 */

#include <common.h>
#include <clock_legacy.h>
#include <dm.h>
#include <serial.h>
#include <dm/platform_data/lpc32xx_hsuart.h>

#include <asm/arch/uart.h>
#include <linux/compiler.h>

struct lpc32xx_hsuart_priv {
	struct hsuart_regs *hsuart;
};

static int lpc32xx_serial_setbrg(struct udevice *dev, int baudrate)
{
	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
	struct hsuart_regs *hsuart = priv->hsuart;
	u32 div;

	/* UART rate = PERIPH_CLK / ((HSU_RATE + 1) x 14) */
	div = (get_serial_clock() / 14 + baudrate / 2) / baudrate - 1;
	if (div > 255)
		div = 255;

	writel(div, &hsuart->rate);

	return 0;
}

static int lpc32xx_serial_getc(struct udevice *dev)
{
	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
	struct hsuart_regs *hsuart = priv->hsuart;

	if (!(readl(&hsuart->level) & HSUART_LEVEL_RX))
		return -EAGAIN;

	return readl(&hsuart->rx) & HSUART_RX_DATA;
}

static int lpc32xx_serial_putc(struct udevice *dev, const char c)
{
	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
	struct hsuart_regs *hsuart = priv->hsuart;

	/* Wait for empty FIFO */
	if (readl(&hsuart->level) & HSUART_LEVEL_TX)
		return -EAGAIN;

	writel(c, &hsuart->tx);

	return 0;
}

static int lpc32xx_serial_pending(struct udevice *dev, bool input)
{
	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
	struct hsuart_regs *hsuart = priv->hsuart;

	if (input) {
		if (readl(&hsuart->level) & HSUART_LEVEL_RX)
			return 1;
	} else {
		if (readl(&hsuart->level) & HSUART_LEVEL_TX)
			return 1;
	}

	return 0;
}

static int lpc32xx_serial_init(struct hsuart_regs *hsuart)
{
	/* Disable hardware RTS and CTS flow control, set up RX and TX FIFO */
	writel(HSUART_CTRL_TMO_16 | HSUART_CTRL_HSU_OFFSET(20) |
	       HSUART_CTRL_HSU_RX_TRIG_32 | HSUART_CTRL_HSU_TX_TRIG_0,
	       &hsuart->ctrl);

	return 0;
}

static int lpc32xx_hsuart_probe(struct udevice *dev)
{
	struct lpc32xx_hsuart_plat *plat = dev_get_plat(dev);
	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);

	priv->hsuart = (struct hsuart_regs *)plat->base;

	lpc32xx_serial_init(priv->hsuart);

	return 0;
}

static const struct dm_serial_ops lpc32xx_hsuart_ops = {
	.setbrg	= lpc32xx_serial_setbrg,
	.getc	= lpc32xx_serial_getc,
	.putc	= lpc32xx_serial_putc,
	.pending = lpc32xx_serial_pending,
};

U_BOOT_DRIVER(lpc32xx_hsuart) = {
	.name	= "lpc32xx_hsuart",
	.id	= UCLASS_SERIAL,
	.probe	= lpc32xx_hsuart_probe,
	.ops	= &lpc32xx_hsuart_ops,
	.priv_auto	= sizeof(struct lpc32xx_hsuart_priv),
	.flags	= DM_FLAG_PRE_RELOC,
};
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
cc35fdbc	2	/*
f21069ed	3	* Copyright (C) 2011-2015 Vladimir Zapolskiy <[email protected]>
cc35fdbc VZ	4	*/
	5
	6	#include <common.h>
d96c2604	7	#include <clock_legacy.h>
f21069ed	8	#include <dm.h>
e503f90a	9	#include <serial.h>
f21069ed VZ	10	#include <dm/platform_data/lpc32xx_hsuart.h>
	11
	12	#include <asm/arch/uart.h>
e503f90a	13	#include <linux/compiler.h>
cc35fdbc	14
f21069ed VZ	15	struct lpc32xx_hsuart_priv {
	16	struct hsuart_regs *hsuart;
	17	};
cc35fdbc	18
f21069ed	19	static int lpc32xx_serial_setbrg(struct udevice *dev, int baudrate)
cc35fdbc	20	{
f21069ed VZ	21	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
f21069ed VZ	22	struct hsuart_regs *hsuart = priv->hsuart;
cc35fdbc VZ	23	u32 div;
	24
	25	/* UART rate = PERIPH_CLK / ((HSU_RATE + 1) x 14) */
f21069ed	26	div = (get_serial_clock() / 14 + baudrate / 2) / baudrate - 1;
cc35fdbc VZ	27	if (div > 255)
	28	div = 255;
	29
	30	writel(div, &hsuart->rate);
f21069ed VZ	31
f21069ed VZ	32	return 0;
cc35fdbc VZ	33	}
cc35fdbc VZ	34
f21069ed	35	static int lpc32xx_serial_getc(struct udevice *dev)
cc35fdbc	36	{
f21069ed VZ	37	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
	38	struct hsuart_regs *hsuart = priv->hsuart;
	39
	40	if (!(readl(&hsuart->level) & HSUART_LEVEL_RX))
	41	return -EAGAIN;
cc35fdbc VZ	42
	43	return readl(&hsuart->rx) & HSUART_RX_DATA;
	44	}
	45
f21069ed	46	static int lpc32xx_serial_putc(struct udevice *dev, const char c)
cc35fdbc	47	{
f21069ed VZ	48	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
	49	struct hsuart_regs *hsuart = priv->hsuart;
	50
	51	/* Wait for empty FIFO */
	52	if (readl(&hsuart->level) & HSUART_LEVEL_TX)
	53	return -EAGAIN;
5deccafa	54
cc35fdbc VZ	55	writel(c, &hsuart->tx);
cc35fdbc VZ	56
f21069ed	57	return 0;
cc35fdbc VZ	58	}
cc35fdbc VZ	59
f21069ed	60	static int lpc32xx_serial_pending(struct udevice *dev, bool input)
cc35fdbc	61	{
f21069ed VZ	62	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
	63	struct hsuart_regs *hsuart = priv->hsuart;
	64
	65	if (input) {
	66	if (readl(&hsuart->level) & HSUART_LEVEL_RX)
	67	return 1;
	68	} else {
	69	if (readl(&hsuart->level) & HSUART_LEVEL_TX)
	70	return 1;
	71	}
cc35fdbc VZ	72
	73	return 0;
	74	}
	75
f21069ed	76	static int lpc32xx_serial_init(struct hsuart_regs *hsuart)
cc35fdbc	77	{
cc35fdbc VZ	78	/* Disable hardware RTS and CTS flow control, set up RX and TX FIFO */
	79	writel(HSUART_CTRL_TMO_16 \| HSUART_CTRL_HSU_OFFSET(20) \|
	80	HSUART_CTRL_HSU_RX_TRIG_32 \| HSUART_CTRL_HSU_TX_TRIG_0,
	81	&hsuart->ctrl);
f21069ed	82
e503f90a	83	return 0;
cc35fdbc VZ	84	}
cc35fdbc VZ	85
f21069ed VZ	86	static int lpc32xx_hsuart_probe(struct udevice *dev)
f21069ed VZ	87	{
8a8d24bd	88	struct lpc32xx_hsuart_plat *plat = dev_get_plat(dev);
f21069ed VZ	89	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
f21069ed VZ	90
caa4daa2	91	priv->hsuart = (struct hsuart_regs *)plat->base;
f21069ed VZ	92
	93	lpc32xx_serial_init(priv->hsuart);
	94
	95	return 0;
	96	}
	97
	98	static const struct dm_serial_ops lpc32xx_hsuart_ops = {
e503f90a	99	.setbrg = lpc32xx_serial_setbrg,
e503f90a	100	.getc = lpc32xx_serial_getc,
f21069ed VZ	101	.putc = lpc32xx_serial_putc,
f21069ed VZ	102	.pending = lpc32xx_serial_pending,
e503f90a MV	103	};
e503f90a MV	104
f21069ed VZ	105	U_BOOT_DRIVER(lpc32xx_hsuart) = {
	106	.name = "lpc32xx_hsuart",
	107	.id = UCLASS_SERIAL,
	108	.probe = lpc32xx_hsuart_probe,
	109	.ops = &lpc32xx_hsuart_ops,
41575d8e	110	.priv_auto = sizeof(struct lpc32xx_hsuart_priv),
f21069ed VZ	111	.flags = DM_FLAG_PRE_RELOC,
f21069ed VZ	112	};