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dtoc: Tidy up more Python style in dtb_platdata
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SG
1config RAM
2 bool "Enable RAM drivers using Driver Model"
3 depends on DM
4 help
5 This allows drivers to be provided for SDRAM and other RAM
6 controllers and their type to be specified in the board's device
7 tree. Generally some parameters are required to set up the RAM and
8 the RAM size can either be statically defined or dynamically
9 detected.
10
40c9abbd 11config SPL_RAM
6c51df68 12 bool "Enable RAM support in SPL"
45233301 13 depends on RAM && SPL_DM
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14 help
15 The RAM subsystem adds a small amount of overhead to the image.
16 If this is acceptable and you have a need to use RAM drivers in
17 SPL, enable this option. It might provide a cleaner interface to
18 setting up RAM (e.g. SDRAM / DDR) within SPL.
bf1ae442 19
c336c3c3 20config TPL_RAM
93fd5b0a 21 bool "Enable RAM support in TPL"
39edfaa7 22 depends on RAM
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23 help
24 The RAM subsystem adds a small amount of overhead to the image.
25 If this is acceptable and you have a need to use RAM drivers in
26 TPL, enable this option. It might provide a cleaner interface to
27 setting up RAM (e.g. SDRAM / DDR) within TPL.
28
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29config STM32_SDRAM
30 bool "Enable STM32 SDRAM support"
31 depends on RAM
32 help
33 STM32F7 family devices support flexible memory controller(FMC) to
34 support external memories like sdram, psram & nand.
35 This driver is for the sdram memory interface with the FMC.
e70f70aa 36
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37config MPC83XX_SDRAM
38 bool "Enable MPC83XX SDRAM support"
39 depends on RAM
40 help
41 Enable support for the internal DDR Memory Controller of the MPC83xx
42 family of SoCs. Both static configurations, as well as configuring
43 the RAM through the use of SPD (Serial Presence Detect) is supported
44 via device tree settings.
45
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LV
46config K3_AM654_DDRSS
47 bool "Enable AM654 DDRSS support"
48 depends on RAM && SOC_K3_AM6
49 help
50 K3 based AM654 devices has DDR memory subsystem that comprises
51 Synopys DDR controller, Synopsis DDR phy and wrapper logic to
52 intergrate these blocks into the device. This DDR subsystem
53 provides an interface to external SDRAM devices. Enabling this
54 config add support for the initialization of the external
55 SDRAM devices connected to DDR subsystem.
56
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57config K3_J721E_DDRSS
58 bool "Enable J721E DDRSS support"
59 depends on RAM
60 help
61 The J721E DDR subsystem comprises DDR controller, DDR PHY and
62 wrapper logic to integrate these blocks in the device. The DDR
63 subsystem is used to provide an interface to external SDRAM
64 devices which can be utilized for storing program or data.
65 Enabling this config adds support for the DDR memory controller
66 on J721E family of SoCs.
67
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68config IMXRT_SDRAM
69 bool "Enable i.MXRT SDRAM support"
70 depends on RAM
71 help
72 i.MXRT family devices support smart external memory controller(SEMC)
73 to support external memories like sdram, psram & nand.
74 This driver is for the sdram memory interface with the SEMC.
75
0474050d 76source "drivers/ram/aspeed/Kconfig"
82ee138d 77source "drivers/ram/rockchip/Kconfig"
c514a94a 78source "drivers/ram/sifive/Kconfig"
e70f70aa 79source "drivers/ram/stm32mp1/Kconfig"
15afe725 80source "drivers/ram/octeon/Kconfig"
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