[u-boot.git] / drivers / serial / ns16550.c

/*
 * COM1 NS16550 support
 * originally from linux source (arch/powerpc/boot/ns16550.c)
 * modified to use CONFIG_SYS_ISA_MEM and new defines
 */

#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
#include <ns16550.h>
#include <serial.h>
#include <watchdog.h>
#include <linux/types.h>
#include <asm/io.h>

DECLARE_GLOBAL_DATA_PTR;

#define UART_LCRVAL UART_LCR_8N1		/* 8 data, 1 stop, no parity */
#define UART_MCRVAL (UART_MCR_DTR | \
		     UART_MCR_RTS)		/* RTS/DTR */
#define UART_FCRVAL (UART_FCR_FIFO_EN |	\
		     UART_FCR_RXSR |	\
		     UART_FCR_TXSR)		/* Clear & enable FIFOs */

#ifndef CONFIG_DM_SERIAL
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
#define serial_out(x, y)	outb(x, (ulong)y)
#define serial_in(y)		inb((ulong)y)
#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
#define serial_out(x, y)	out_be32(y, x)
#define serial_in(y)		in_be32(y)
#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
#define serial_out(x, y)	out_le32(y, x)
#define serial_in(y)		in_le32(y)
#else
#define serial_out(x, y)	writeb(x, y)
#define serial_in(y)		readb(y)
#endif
#endif /* !CONFIG_DM_SERIAL */

#if defined(CONFIG_SOC_KEYSTONE)
#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE   0
#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
#undef UART_MCRVAL
#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
#define UART_MCRVAL             (UART_MCR_RTS | UART_MCR_AFE)
#else
#define UART_MCRVAL             (UART_MCR_RTS)
#endif
#endif

#ifndef CONFIG_SYS_NS16550_IER
#define CONFIG_SYS_NS16550_IER  0x00
#endif /* CONFIG_SYS_NS16550_IER */

#ifdef CONFIG_DM_SERIAL

static inline void serial_out_shift(void *addr, int shift, int value)
{
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
	outb(value, (ulong)addr);
#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
	out_le32(addr, value);
#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	out_be32(addr, value);
#elif defined(CONFIG_SYS_NS16550_MEM32)
	writel(value, addr);
#elif defined(CONFIG_SYS_BIG_ENDIAN)
	writeb(value, addr + (1 << shift) - 1);
#else
	writeb(value, addr);
#endif
}

static inline int serial_in_shift(void *addr, int shift)
{
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
	return inb((ulong)addr);
#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
	return in_le32(addr);
#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	return in_be32(addr);
#elif defined(CONFIG_SYS_NS16550_MEM32)
	return readl(addr);
#elif defined(CONFIG_SYS_BIG_ENDIAN)
	return readb(addr + (1 << shift) - 1);
#else
	return readb(addr);
#endif
}

static void ns16550_writeb(NS16550_t port, int offset, int value)
{
	struct ns16550_platdata *plat = port->plat;
	unsigned char *addr;

	offset *= 1 << plat->reg_shift;
	addr = map_physmem(plat->base, 0, MAP_NOCACHE) + offset;
	/*
	 * As far as we know it doesn't make sense to support selection of
	 * these options at run-time, so use the existing CONFIG options.
	 */
	serial_out_shift(addr, plat->reg_shift, value);
}

static int ns16550_readb(NS16550_t port, int offset)
{
	struct ns16550_platdata *plat = port->plat;
	unsigned char *addr;

	offset *= 1 << plat->reg_shift;
	addr = map_physmem(plat->base, 0, MAP_NOCACHE) + offset;

	return serial_in_shift(addr, plat->reg_shift);
}

/* We can clean these up once everything is moved to driver model */
#define serial_out(value, addr)	\
	ns16550_writeb(com_port, \
		(unsigned char *)addr - (unsigned char *)com_port, value)
#define serial_in(addr) \
	ns16550_readb(com_port, \
		(unsigned char *)addr - (unsigned char *)com_port)
#endif

static inline int calc_divisor(NS16550_t port, int clock, int baudrate)
{
	const unsigned int mode_x_div = 16;

	return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
}

int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
{
#ifdef CONFIG_OMAP1510
	/* If can't cleanly clock 115200 set div to 1 */
	if ((clock == 12000000) && (baudrate == 115200)) {
		port->osc_12m_sel = OSC_12M_SEL;  /* enable 6.5 * divisor */
		return 1;			/* return 1 for base divisor */
	}
	port->osc_12m_sel = 0;			/* clear if previsouly set */
#endif

	return calc_divisor(port, clock, baudrate);
}

static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
{
	serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
	serial_out(baud_divisor & 0xff, &com_port->dll);
	serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
	serial_out(UART_LCRVAL, &com_port->lcr);
}

void NS16550_init(NS16550_t com_port, int baud_divisor)
{
#if (defined(CONFIG_SPL_BUILD) && \
		(defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
	/*
	 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
	 * before SPL starts only THRE bit is set. We have to empty the
	 * transmitter before initialization starts.
	 */
	if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
	     == UART_LSR_THRE) {
		if (baud_divisor != -1)
			NS16550_setbrg(com_port, baud_divisor);
		serial_out(0, &com_port->mdr1);
	}
#endif

	while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
		;

	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
#if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \
			defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
	serial_out(0x7, &com_port->mdr1);	/* mode select reset TL16C750*/
#endif
	serial_out(UART_MCRVAL, &com_port->mcr);
	serial_out(UART_FCRVAL, &com_port->fcr);
	if (baud_divisor != -1)
		NS16550_setbrg(com_port, baud_divisor);
#if defined(CONFIG_OMAP) || \
	defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \
	defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)

	/* /16 is proper to hit 115200 with 48MHz */
	serial_out(0, &com_port->mdr1);
#endif /* CONFIG_OMAP */
#if defined(CONFIG_SOC_KEYSTONE)
	serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
#endif
}

#ifndef CONFIG_NS16550_MIN_FUNCTIONS
void NS16550_reinit(NS16550_t com_port, int baud_divisor)
{
	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
	NS16550_setbrg(com_port, 0);
	serial_out(UART_MCRVAL, &com_port->mcr);
	serial_out(UART_FCRVAL, &com_port->fcr);
	NS16550_setbrg(com_port, baud_divisor);
}
#endif /* CONFIG_NS16550_MIN_FUNCTIONS */

void NS16550_putc(NS16550_t com_port, char c)
{
	while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
		;
	serial_out(c, &com_port->thr);

	/*
	 * Call watchdog_reset() upon newline. This is done here in putc
	 * since the environment code uses a single puts() to print the complete
	 * environment upon "printenv". So we can't put this watchdog call
	 * in puts().
	 */
	if (c == '\n')
		WATCHDOG_RESET();
}

#ifndef CONFIG_NS16550_MIN_FUNCTIONS
char NS16550_getc(NS16550_t com_port)
{
	while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
		extern void usbtty_poll(void);
		usbtty_poll();
#endif
		WATCHDOG_RESET();
	}
	return serial_in(&com_port->rbr);
}

int NS16550_tstc(NS16550_t com_port)
{
	return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
}

#endif /* CONFIG_NS16550_MIN_FUNCTIONS */

#ifdef CONFIG_DEBUG_UART_NS16550

#include <debug_uart.h>

#define serial_dout(reg, value)	\
	serial_out_shift((char *)com_port + \
		((char *)reg - (char *)com_port) * \
			(1 << CONFIG_DEBUG_UART_SHIFT), \
		CONFIG_DEBUG_UART_SHIFT, value)
#define serial_din(reg) \
	serial_in_shift((char *)com_port + \
		((char *)reg - (char *)com_port) * \
			(1 << CONFIG_DEBUG_UART_SHIFT), \
		CONFIG_DEBUG_UART_SHIFT)

static inline void _debug_uart_init(void)
{
	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
	int baud_divisor;

	/*
	 * We copy the code from above because it is already horribly messy.
	 * Trying to refactor to nicely remove the duplication doesn't seem
	 * feasible. The better fix is to move all users of this driver to
	 * driver model.
	 */
	baud_divisor = calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
				    CONFIG_BAUDRATE);
	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
	serial_dout(&com_port->mcr, UART_MCRVAL);
	serial_dout(&com_port->fcr, UART_FCRVAL);

	serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
	serial_dout(&com_port->dll, baud_divisor & 0xff);
	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
	serial_dout(&com_port->lcr, UART_LCRVAL);
}

static inline void _debug_uart_putc(int ch)
{
	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;

	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
		;
	serial_dout(&com_port->thr, ch);
}

DEBUG_UART_FUNCS

#endif

#ifdef CONFIG_DM_SERIAL
static int ns16550_serial_putc(struct udevice *dev, const char ch)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
		return -EAGAIN;
	serial_out(ch, &com_port->thr);

	/*
	 * Call watchdog_reset() upon newline. This is done here in putc
	 * since the environment code uses a single puts() to print the complete
	 * environment upon "printenv". So we can't put this watchdog call
	 * in puts().
	 */
	if (ch == '\n')
		WATCHDOG_RESET();

	return 0;
}

static int ns16550_serial_pending(struct udevice *dev, bool input)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	if (input)
		return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
	else
		return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
}

static int ns16550_serial_getc(struct udevice *dev)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
		return -EAGAIN;

	return serial_in(&com_port->rbr);
}

static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
{
	struct NS16550 *const com_port = dev_get_priv(dev);
	struct ns16550_platdata *plat = com_port->plat;
	int clock_divisor;

	clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);

	NS16550_setbrg(com_port, clock_divisor);

	return 0;
}

int ns16550_serial_probe(struct udevice *dev)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	com_port->plat = dev_get_platdata(dev);
	NS16550_init(com_port, -1);

	return 0;
}

#if CONFIG_IS_ENABLED(OF_CONTROL)
int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
{
	struct ns16550_platdata *plat = dev->platdata;
	fdt_addr_t addr;

	/* try Processor Local Bus device first */
	addr = dev_get_addr(dev);
#ifdef CONFIG_PCI
	if (addr == FDT_ADDR_T_NONE) {
		/* then try pci device */
		struct fdt_pci_addr pci_addr;
		u32 bar;
		int ret;

		/* we prefer to use a memory-mapped register */
		ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
					  FDT_PCI_SPACE_MEM32, "reg",
					  &pci_addr);
		if (ret) {
			/* try if there is any i/o-mapped register */
			ret = fdtdec_get_pci_addr(gd->fdt_blob,
						  dev->of_offset,
						  FDT_PCI_SPACE_IO,
						  "reg", &pci_addr);
			if (ret)
				return ret;
		}

		ret = fdtdec_get_pci_bar32(gd->fdt_blob, dev->of_offset,
					   &pci_addr, &bar);
		if (ret)
			return ret;

		addr = bar;
	}
#endif

	if (addr == FDT_ADDR_T_NONE)
		return -EINVAL;

	plat->base = addr;
	plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
					 "reg-shift", 1);

	return 0;
}
#endif

const struct dm_serial_ops ns16550_serial_ops = {
	.putc = ns16550_serial_putc,
	.pending = ns16550_serial_pending,
	.getc = ns16550_serial_getc,
	.setbrg = ns16550_serial_setbrg,
};
#endif /* CONFIG_DM_SERIAL */
Commit	Line	Data
e85390dc WD	1	/*
e85390dc WD	2	* COM1 NS16550 support
a47a12be	3	* originally from linux source (arch/powerpc/boot/ns16550.c)
6d0f6bcf	4	* modified to use CONFIG_SYS_ISA_MEM and new defines
e85390dc WD	5	*/
e85390dc WD	6
fa54eb12	7	#include <common.h>
12e431b2 SG	8	#include <dm.h>
	9	#include <errno.h>
	10	#include <fdtdec.h>
e85390dc	11	#include <ns16550.h>
12e431b2	12	#include <serial.h>
a1b322a9	13	#include <watchdog.h>
167cdad1 GR	14	#include <linux/types.h>
167cdad1 GR	15	#include <asm/io.h>
e85390dc	16
12e431b2 SG	17	DECLARE_GLOBAL_DATA_PTR;
12e431b2 SG	18
200779e3 DZ	19	#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
	20	#define UART_MCRVAL (UART_MCR_DTR \| \
	21	UART_MCR_RTS) /* RTS/DTR */
	22	#define UART_FCRVAL (UART_FCR_FIFO_EN \| \
	23	UART_FCR_RXSR \| \
	24	UART_FCR_TXSR) /* Clear & enable FIFOs */
12e431b2 SG	25
12e431b2 SG	26	#ifndef CONFIG_DM_SERIAL
167cdad1	27	#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
f8df9d0d SG	28	#define serial_out(x, y) outb(x, (ulong)y)
f8df9d0d SG	29	#define serial_in(y) inb((ulong)y)
79df1208	30	#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
f8df9d0d SG	31	#define serial_out(x, y) out_be32(y, x)
f8df9d0d SG	32	#define serial_in(y) in_be32(y)
79df1208	33	#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
f8df9d0d SG	34	#define serial_out(x, y) out_le32(y, x)
f8df9d0d SG	35	#define serial_in(y) in_le32(y)
167cdad1	36	#else
f8df9d0d SG	37	#define serial_out(x, y) writeb(x, y)
f8df9d0d SG	38	#define serial_in(y) readb(y)
167cdad1	39	#endif
12e431b2	40	#endif /* !CONFIG_DM_SERIAL */
e85390dc	41
7c387646	42	#if defined(CONFIG_SOC_KEYSTONE)
ef509b90 VA	43	#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
ef509b90 VA	44	#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) \| (1 << 13) \| (1 << 0))
d57dee57 KM	45	#undef UART_MCRVAL
	46	#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
	47	#define UART_MCRVAL (UART_MCR_RTS \| UART_MCR_AFE)
	48	#else
	49	#define UART_MCRVAL (UART_MCR_RTS)
	50	#endif
ef509b90 VA	51	#endif
ef509b90 VA	52
a160ea0b PW	53	#ifndef CONFIG_SYS_NS16550_IER
	54	#define CONFIG_SYS_NS16550_IER 0x00
	55	#endif /* CONFIG_SYS_NS16550_IER */
	56
12e431b2	57	#ifdef CONFIG_DM_SERIAL
12e431b2	58
363e6da1	59	static inline void serial_out_shift(void *addr, int shift, int value)
76571674	60	{
12e431b2	61	#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
1f77690e	62	outb(value, (ulong)addr);
12e431b2 SG	63	#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
	64	out_le32(addr, value);
	65	#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	66	out_be32(addr, value);
90914008 SG	67	#elif defined(CONFIG_SYS_NS16550_MEM32)
90914008 SG	68	writel(value, addr);
12e431b2	69	#elif defined(CONFIG_SYS_BIG_ENDIAN)
76571674	70	writeb(value, addr + (1 << shift) - 1);
12e431b2 SG	71	#else
	72	writeb(value, addr);
	73	#endif
	74	}
	75
363e6da1	76	static inline int serial_in_shift(void *addr, int shift)
12e431b2	77	{
12e431b2	78	#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
1f77690e	79	return inb((ulong)addr);
12e431b2 SG	80	#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
	81	return in_le32(addr);
	82	#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	83	return in_be32(addr);
90914008 SG	84	#elif defined(CONFIG_SYS_NS16550_MEM32)
90914008 SG	85	return readl(addr);
12e431b2	86	#elif defined(CONFIG_SYS_BIG_ENDIAN)
20379c11	87	return readb(addr + (1 << shift) - 1);
12e431b2 SG	88	#else
	89	return readb(addr);
	90	#endif
	91	}
	92
76571674 SG	93	static void ns16550_writeb(NS16550_t port, int offset, int value)
	94	{
	95	struct ns16550_platdata *plat = port->plat;
	96	unsigned char *addr;
	97
	98	offset *= 1 << plat->reg_shift;
77d7b5cd	99	addr = map_physmem(plat->base, 0, MAP_NOCACHE) + offset;
76571674 SG	100	/*
	101	* As far as we know it doesn't make sense to support selection of
	102	* these options at run-time, so use the existing CONFIG options.
	103	*/
	104	serial_out_shift(addr, plat->reg_shift, value);
	105	}
	106
	107	static int ns16550_readb(NS16550_t port, int offset)
	108	{
	109	struct ns16550_platdata *plat = port->plat;
	110	unsigned char *addr;
	111
	112	offset *= 1 << plat->reg_shift;
77d7b5cd	113	addr = map_physmem(plat->base, 0, MAP_NOCACHE) + offset;
76571674 SG	114
	115	return serial_in_shift(addr, plat->reg_shift);
	116	}
	117
12e431b2 SG	118	/* We can clean these up once everything is moved to driver model */
12e431b2 SG	119	#define serial_out(value, addr) \
363e6da1 SG	120	ns16550_writeb(com_port, \
363e6da1 SG	121	(unsigned char )addr - (unsigned char )com_port, value)
12e431b2	122	#define serial_in(addr) \
363e6da1 SG	123	ns16550_readb(com_port, \
363e6da1 SG	124	(unsigned char )addr - (unsigned char )com_port)
12e431b2 SG	125	#endif
12e431b2 SG	126
21d00436	127	static inline int calc_divisor(NS16550_t port, int clock, int baudrate)
fa54eb12 SG	128	{
	129	const unsigned int mode_x_div = 16;
	130
21d00436 SG	131	return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
	132	}
	133
	134	int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
	135	{
fa54eb12 SG	136	#ifdef CONFIG_OMAP1510
	137	/* If can't cleanly clock 115200 set div to 1 */
	138	if ((clock == 12000000) && (baudrate == 115200)) {
	139	port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */
	140	return 1; /* return 1 for base divisor */
	141	}
	142	port->osc_12m_sel = 0; /* clear if previsouly set */
	143	#endif
	144
21d00436	145	return calc_divisor(port, clock, baudrate);
fa54eb12 SG	146	}
fa54eb12 SG	147
8bbe33c8 SG	148	static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
	149	{
	150	serial_out(UART_LCR_BKSE \| UART_LCRVAL, &com_port->lcr);
	151	serial_out(baud_divisor & 0xff, &com_port->dll);
	152	serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
	153	serial_out(UART_LCRVAL, &com_port->lcr);
	154	}
	155
f8df9d0d	156	void NS16550_init(NS16550_t com_port, int baud_divisor)
e85390dc	157	{
956a8bae GG	158	#if (defined(CONFIG_SPL_BUILD) && \
956a8bae GG	159	(defined(CONFIG_OMAP34XX) \|\| defined(CONFIG_OMAP44XX)))
fd2aeac5	160	/*
956a8bae GG	161	* On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
	162	* before SPL starts only THRE bit is set. We have to empty the
	163	* transmitter before initialization starts.
fd2aeac5 MH	164	*/
	165	if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT \| UART_LSR_THRE))
	166	== UART_LSR_THRE) {
12e431b2 SG	167	if (baud_divisor != -1)
12e431b2 SG	168	NS16550_setbrg(com_port, baud_divisor);
fd2aeac5 MH	169	serial_out(0, &com_port->mdr1);
	170	}
	171	#endif
	172
cb55b332 SW	173	while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
	174	;
	175
a160ea0b	176	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
456ccfdf TR	177	#if defined(CONFIG_OMAP) \|\| defined(CONFIG_AM33XX) \|\| \
456ccfdf TR	178	defined(CONFIG_TI81XX) \|\| defined(CONFIG_AM43XX)
167cdad1	179	serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
945af8d7	180	#endif
167cdad1 GR	181	serial_out(UART_MCRVAL, &com_port->mcr);
167cdad1 GR	182	serial_out(UART_FCRVAL, &com_port->fcr);
12e431b2 SG	183	if (baud_divisor != -1)
12e431b2 SG	184	NS16550_setbrg(com_port, baud_divisor);
8ac22a60	185	#if defined(CONFIG_OMAP) \|\| \
6213a68f	186	defined(CONFIG_AM33XX) \|\| defined(CONFIG_SOC_DA8XX) \|\| \
9ed6e412	187	defined(CONFIG_TI81XX) \|\| defined(CONFIG_AM43XX)
5289e83a	188
f8df9d0d SG	189	/* /16 is proper to hit 115200 with 48MHz */
f8df9d0d SG	190	serial_out(0, &com_port->mdr1);
b4746d8b	191	#endif /* CONFIG_OMAP */
7c387646	192	#if defined(CONFIG_SOC_KEYSTONE)
ef509b90 VA	193	serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
ef509b90 VA	194	#endif
e85390dc WD	195	}
e85390dc WD	196
f5675aa5	197	#ifndef CONFIG_NS16550_MIN_FUNCTIONS
f8df9d0d	198	void NS16550_reinit(NS16550_t com_port, int baud_divisor)
e85390dc	199	{
a160ea0b	200	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
8bbe33c8	201	NS16550_setbrg(com_port, 0);
167cdad1 GR	202	serial_out(UART_MCRVAL, &com_port->mcr);
167cdad1 GR	203	serial_out(UART_FCRVAL, &com_port->fcr);
8bbe33c8	204	NS16550_setbrg(com_port, baud_divisor);
e85390dc	205	}
f5675aa5	206	#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
e85390dc	207
f8df9d0d	208	void NS16550_putc(NS16550_t com_port, char c)
e85390dc	209	{
f8df9d0d SG	210	while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
f8df9d0d SG	211	;
167cdad1	212	serial_out(c, &com_port->thr);
1a2d9b30 SR	213
	214	/*
	215	* Call watchdog_reset() upon newline. This is done here in putc
	216	* since the environment code uses a single puts() to print the complete
	217	* environment upon "printenv". So we can't put this watchdog call
	218	* in puts().
	219	*/
	220	if (c == '\n')
	221	WATCHDOG_RESET();
e85390dc WD	222	}
e85390dc WD	223
f5675aa5	224	#ifndef CONFIG_NS16550_MIN_FUNCTIONS
f8df9d0d	225	char NS16550_getc(NS16550_t com_port)
e85390dc	226	{
167cdad1	227	while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
f2041388	228	#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
232c150a WD	229	extern void usbtty_poll(void);
	230	usbtty_poll();
	231	#endif
a1b322a9	232	WATCHDOG_RESET();
232c150a	233	}
167cdad1	234	return serial_in(&com_port->rbr);
e85390dc WD	235	}
e85390dc WD	236
f8df9d0d	237	int NS16550_tstc(NS16550_t com_port)
e85390dc	238	{
f8df9d0d	239	return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
e85390dc WD	240	}
e85390dc WD	241
f5675aa5	242	#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
12e431b2	243
21d00436 SG	244	#ifdef CONFIG_DEBUG_UART_NS16550
	245
	246	#include <debug_uart.h>
	247
6e780c7a SG	248	#define serial_dout(reg, value) \
	249	serial_out_shift((char *)com_port + \
	250	((char )reg - (char )com_port) * \
	251	(1 << CONFIG_DEBUG_UART_SHIFT), \
	252	CONFIG_DEBUG_UART_SHIFT, value)
	253	#define serial_din(reg) \
	254	serial_in_shift((char *)com_port + \
	255	((char )reg - (char )com_port) * \
	256	(1 << CONFIG_DEBUG_UART_SHIFT), \
	257	CONFIG_DEBUG_UART_SHIFT)
	258
97b05973	259	static inline void _debug_uart_init(void)
21d00436 SG	260	{
	261	struct NS16550 com_port = (struct NS16550 )CONFIG_DEBUG_UART_BASE;
	262	int baud_divisor;
	263
	264	/*
	265	* We copy the code from above because it is already horribly messy.
	266	* Trying to refactor to nicely remove the duplication doesn't seem
	267	* feasible. The better fix is to move all users of this driver to
	268	* driver model.
	269	*/
	270	baud_divisor = calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
	271	CONFIG_BAUDRATE);
6e780c7a SG	272	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
	273	serial_dout(&com_port->mcr, UART_MCRVAL);
	274	serial_dout(&com_port->fcr, UART_FCRVAL);
	275
	276	serial_dout(&com_port->lcr, UART_LCR_BKSE \| UART_LCRVAL);
	277	serial_dout(&com_port->dll, baud_divisor & 0xff);
	278	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
	279	serial_dout(&com_port->lcr, UART_LCRVAL);
21d00436 SG	280	}
	281
	282	static inline void _debug_uart_putc(int ch)
	283	{
	284	struct NS16550 com_port = (struct NS16550 )CONFIG_DEBUG_UART_BASE;
	285
6e780c7a	286	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
21d00436	287	;
6e780c7a	288	serial_dout(&com_port->thr, ch);
21d00436 SG	289	}
	290
	291	DEBUG_UART_FUNCS
	292
	293	#endif
	294
12e431b2 SG	295	#ifdef CONFIG_DM_SERIAL
	296	static int ns16550_serial_putc(struct udevice *dev, const char ch)
	297	{
	298	struct NS16550 *const com_port = dev_get_priv(dev);
	299
	300	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
	301	return -EAGAIN;
	302	serial_out(ch, &com_port->thr);
	303
	304	/*
	305	* Call watchdog_reset() upon newline. This is done here in putc
	306	* since the environment code uses a single puts() to print the complete
	307	* environment upon "printenv". So we can't put this watchdog call
	308	* in puts().
	309	*/
	310	if (ch == '\n')
	311	WATCHDOG_RESET();
	312
	313	return 0;
	314	}
	315
	316	static int ns16550_serial_pending(struct udevice *dev, bool input)
	317	{
	318	struct NS16550 *const com_port = dev_get_priv(dev);
	319
	320	if (input)
	321	return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
	322	else
	323	return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
	324	}
	325
	326	static int ns16550_serial_getc(struct udevice *dev)
	327	{
	328	struct NS16550 *const com_port = dev_get_priv(dev);
	329
aea2be20	330	if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
12e431b2 SG	331	return -EAGAIN;
	332
	333	return serial_in(&com_port->rbr);
	334	}
	335
	336	static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
	337	{
	338	struct NS16550 *const com_port = dev_get_priv(dev);
	339	struct ns16550_platdata *plat = com_port->plat;
	340	int clock_divisor;
	341
	342	clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
	343
	344	NS16550_setbrg(com_port, clock_divisor);
	345
	346	return 0;
	347	}
	348
	349	int ns16550_serial_probe(struct udevice *dev)
	350	{
	351	struct NS16550 *const com_port = dev_get_priv(dev);
	352
11c1a878	353	com_port->plat = dev_get_platdata(dev);
12e431b2 SG	354	NS16550_init(com_port, -1);
	355
	356	return 0;
	357	}
	358
0f925822	359	#if CONFIG_IS_ENABLED(OF_CONTROL)
12e431b2 SG	360	int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
12e431b2 SG	361	{
12e431b2 SG	362	struct ns16550_platdata *plat = dev->platdata;
	363	fdt_addr_t addr;
	364
3db886a5	365	/* try Processor Local Bus device first */
4e9838c1	366	addr = dev_get_addr(dev);
3db886a5 BM	367	#ifdef CONFIG_PCI
	368	if (addr == FDT_ADDR_T_NONE) {
	369	/* then try pci device */
	370	struct fdt_pci_addr pci_addr;
	371	u32 bar;
	372	int ret;
	373
	374	/* we prefer to use a memory-mapped register */
	375	ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
	376	FDT_PCI_SPACE_MEM32, "reg",
	377	&pci_addr);
	378	if (ret) {
	379	/* try if there is any i/o-mapped register */
	380	ret = fdtdec_get_pci_addr(gd->fdt_blob,
	381	dev->of_offset,
	382	FDT_PCI_SPACE_IO,
	383	"reg", &pci_addr);
	384	if (ret)
	385	return ret;
	386	}
	387
	388	ret = fdtdec_get_pci_bar32(gd->fdt_blob, dev->of_offset,
	389	&pci_addr, &bar);
	390	if (ret)
	391	return ret;
	392
	393	addr = bar;
	394	}
	395	#endif
	396
12e431b2 SG	397	if (addr == FDT_ADDR_T_NONE)
	398	return -EINVAL;
	399
167efe01	400	plat->base = addr;
12e431b2 SG	401	plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
12e431b2 SG	402	"reg-shift", 1);
12e431b2 SG	403
	404	return 0;
	405	}
11c1a878	406	#endif
12e431b2 SG	407
	408	const struct dm_serial_ops ns16550_serial_ops = {
	409	.putc = ns16550_serial_putc,
	410	.pending = ns16550_serial_pending,
	411	.getc = ns16550_serial_getc,
	412	.setbrg = ns16550_serial_setbrg,
	413	};
	414	#endif /* CONFIG_DM_SERIAL */