[u-boot.git] / arch / x86 / cpu / start.S

/*
 *  U-Boot - x86 Startup Code
 *
 * (C) Copyright 2008-2011
 * Graeme Russ, <[email protected]>
 *
 * (C) Copyright 2002
 * Daniel Engström, Omicron Ceti AB, <[email protected]>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <config.h>
#include <asm/global_data.h>
#include <asm/post.h>
#include <asm/processor.h>
#include <asm/processor-flags.h>
#include <generated/generic-asm-offsets.h>
#include <generated/asm-offsets.h>

.section .text
.code32
.globl _start
.type _start, @function
.globl _x86boot_start
_x86boot_start:
	/*
	 * This is the fail safe 32-bit bootstrap entry point. The
	 * following code is not executed from a cold-reset (actually, a
	 * lot of it is, but from real-mode after cold reset. It is
	 * repeated here to put the board into a state as close to cold
	 * reset as necessary)
	 */
	cli
	cld

	/* Turn off cache (this might require a 486-class CPU) */
	movl	%cr0, %eax
	orl	$(X86_CR0_NW | X86_CR0_CD), %eax
	movl	%eax, %cr0
	wbinvd

	/* Tell 32-bit code it is being entered from an in-RAM copy */
	movw	$GD_FLG_WARM_BOOT, %bx
	jmp	1f
_start:
	/*
	 * This is the 32-bit cold-reset entry point. Initialize %bx to 0
	 * in case we're preceeded by some sort of boot stub.
	 */
	movw	$GD_FLG_COLD_BOOT, %bx
1:
	/* Save BIST */
	movl	%eax, %ebp

	/* Load the segement registes to match the gdt loaded in start16.S */
	movl	$(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
	movw	%ax, %fs
	movw	%ax, %ds
	movw	%ax, %gs
	movw	%ax, %es
	movw	%ax, %ss

	/* Clear the interrupt vectors */
	lidt	blank_idt_ptr

	/* Early platform init (setup gpio, etc ) */
	jmp	early_board_init
.globl early_board_init_ret
early_board_init_ret:
	post_code(POST_START)

	/* Initialise Cache-As-RAM */
	jmp	car_init
.globl car_init_ret
car_init_ret:
#ifndef CONFIG_HAVE_FSP
	/*
	 * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
	 * or fully initialised SDRAM - we really don't care which)
	 * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack
	 * and early malloc area. The MRC requires some space at the top.
	 *
	 * Stack grows down from top of CAR. We have:
	 *
	 * top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE
	 *	MRC area
	 *	global_data
	 *	x86 global descriptor table
	 *	early malloc area
	 *	stack
	 * bottom-> CONFIG_SYS_CAR_ADDR
	 */
	movl	$(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
	subl	$CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
#endif
#else
	/*
	 * When we get here after car_init, esp points to a temporary stack
	 * and esi holds the HOB list address returned by the FSP.
	 */
#endif

	/* Reserve space on stack for global data */
	subl	$GENERATED_GBL_DATA_SIZE, %esp

	/* Align global data to 16-byte boundary */
	andl	$0xfffffff0, %esp
	post_code(POST_START_STACK)

	/* Zero the global data since it won't happen later */
	xorl	%eax, %eax
	movl	$GENERATED_GBL_DATA_SIZE, %ecx
	movl	%esp, %edi
	rep	stosb

#ifdef CONFIG_HAVE_FSP
	/* Store HOB list */
	movl	%esp, %edx
	addl	$GD_HOB_LIST, %edx
	movl	%esi, (%edx)
#endif

	/* Setup first parameter to setup_gdt, pointer to global_data */
	movl	%esp, %eax

	/* Reserve space for global descriptor table */
	subl	$X86_GDT_SIZE, %esp

	/* Align temporary global descriptor table to 16-byte boundary */
	andl	$0xfffffff0, %esp
	movl	%esp, %ecx

#if defined(CONFIG_SYS_MALLOC_F_LEN)
	subl	$CONFIG_SYS_MALLOC_F_LEN, %esp
	movl	%eax, %edx
	addl	$GD_MALLOC_BASE, %edx
	movl	%esp, (%edx)
#endif
	/* Store BIST */
	movl	%eax, %edx
	addl	$GD_BIST, %edx
	movl	%ebp, (%edx)

	/* Set second parameter to setup_gdt */
	movl	%ecx, %edx

	/* Setup global descriptor table so gd->xyz works */
	call	setup_gdt

	/* Set parameter to board_init_f() to boot flags */
	post_code(POST_START_DONE)
	xorl	%eax, %eax

	/* Enter, U-boot! */
	call	board_init_f

	/* indicate (lack of) progress */
	movw	$0x85, %ax
	jmp	die

.globl board_init_f_r_trampoline
.type board_init_f_r_trampoline, @function
board_init_f_r_trampoline:
	/*
	 * SDRAM has been initialised, U-Boot code has been copied into
	 * RAM, BSS has been cleared and relocation adjustments have been
	 * made. It is now time to jump into the in-RAM copy of U-Boot
	 *
	 * %eax = Address of top of new stack
	 */

	/* Stack grows down from top of SDRAM */
	movl	%eax, %esp

	/* Reserve space on stack for global data */
	subl	$GENERATED_GBL_DATA_SIZE, %esp

	/* Align global data to 16-byte boundary */
	andl	$0xfffffff0, %esp

	/* Setup first parameter to memcpy (and setup_gdt) */
	movl	%esp, %eax

	/* Setup second parameter to memcpy */
	fs movl 0, %edx

	/* Set third parameter to memcpy */
	movl	$GENERATED_GBL_DATA_SIZE, %ecx

	/* Copy global data from CAR to SDRAM stack */
	call	memcpy

	/* Reserve space for global descriptor table */
	subl	$X86_GDT_SIZE, %esp

	/* Align global descriptor table to 16-byte boundary */
	andl	$0xfffffff0, %esp

	/* Set second parameter to setup_gdt */
	movl	%esp, %edx

	/* Setup global descriptor table so gd->xyz works */
	call	setup_gdt

	/* Set if we need to disable CAR */
.weak	car_uninit
	movl	$car_uninit, %eax
	cmpl	$0, %eax
	jz	1f

	call	car_uninit
1:
	/* Re-enter U-Boot by calling board_init_f_r */
	call	board_init_f_r

die:
	hlt
	jmp	die
	hlt

blank_idt_ptr:
	.word	0		/* limit */
	.long	0		/* base */

	.p2align	2	/* force 4-byte alignment */

multiboot_header:
	/* magic */
	.long	0x1BADB002
	/* flags */
	.long	(1 << 16)
	/* checksum */
	.long	-0x1BADB002 - (1 << 16)
	/* header addr */
	.long	multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE
	/* load addr */
	.long	CONFIG_SYS_TEXT_BASE
	/* load end addr */
	.long	0
	/* bss end addr */
	.long	0
	/* entry addr */
	.long	CONFIG_SYS_TEXT_BASE
Commit	Line	Data
2262cfee	1	/*
fe0c33a5	2	* U-Boot - x86 Startup Code
2262cfee	3	*
dbf7115a GR	4	* (C) Copyright 2008-2011
	5	* Graeme Russ, <[email protected]>
	6	*
	7	* (C) Copyright 2002
fa82f871	8	* Daniel Engström, Omicron Ceti AB, <[email protected]>
2262cfee	9	*
1a459660	10	* SPDX-License-Identifier: GPL-2.0+
2262cfee WD	11	*/
2262cfee WD	12
2262cfee	13	#include <config.h>
161b3589	14	#include <asm/global_data.h>
d1cd0459	15	#include <asm/post.h>
109ad143	16	#include <asm/processor.h>
0c24c9cc	17	#include <asm/processor-flags.h>
9e6c572f	18	#include <generated/generic-asm-offsets.h>
fe0c33a5	19	#include <generated/asm-offsets.h>
2262cfee	20
2262cfee WD	21	.section .text
	22	.code32
	23	.globl _start
8bde7f77	24	.type _start, @function
fea25720 GR	25	.globl _x86boot_start
fea25720 GR	26	_x86boot_start:
077e1958 GR	27	/*
	28	* This is the fail safe 32-bit bootstrap entry point. The
	29	* following code is not executed from a cold-reset (actually, a
	30	* lot of it is, but from real-mode after cold reset. It is
	31	* repeated here to put the board into a state as close to cold
	32	* reset as necessary)
	33	*/
	34	cli
	35	cld
	36
2f0e0cd2	37	/* Turn off cache (this might require a 486-class CPU) */
077e1958	38	movl %cr0, %eax
0c24c9cc	39	orl $(X86_CR0_NW \| X86_CR0_CD), %eax
077e1958 GR	40	movl %eax, %cr0
	41	wbinvd
	42
91d82a29 GB	43	/* Tell 32-bit code it is being entered from an in-RAM copy */
	44	movw $GD_FLG_WARM_BOOT, %bx
	45	jmp 1f
8bde7f77	46	_start:
91d82a29 GB	47	/*
	48	* This is the 32-bit cold-reset entry point. Initialize %bx to 0
	49	* in case we're preceeded by some sort of boot stub.
	50	*/
	51	movw $GD_FLG_COLD_BOOT, %bx
	52	1:
f67cd51e SG	53	/* Save BIST */
f67cd51e SG	54	movl %eax, %ebp
077e1958	55
dbf7115a	56	/* Load the segement registes to match the gdt loaded in start16.S */
109ad143	57	movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
8ffb2e8f GR	58	movw %ax, %fs
	59	movw %ax, %ds
	60	movw %ax, %gs
	61	movw %ax, %es
	62	movw %ax, %ss
8bde7f77	63
16263087	64	/* Clear the interrupt vectors */
077e1958 GR	65	lidt blank_idt_ptr
077e1958 GR	66
2262cfee	67	/* Early platform init (setup gpio, etc ) */
2262cfee	68	jmp early_board_init
88fa0a6e	69	.globl early_board_init_ret
2262cfee	70	early_board_init_ret:
d1cd0459	71	post_code(POST_START)
8bde7f77	72
ed4cba79 GR	73	/* Initialise Cache-As-RAM */
	74	jmp car_init
	75	.globl car_init_ret
	76	car_init_ret:
bceb9f0f	77	#ifndef CONFIG_HAVE_FSP
ed4cba79 GR	78	/*
	79	* We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
	80	* or fully initialised SDRAM - we really don't care which)
	81	* starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack
65dd74a6	82	* and early malloc area. The MRC requires some space at the top.
76f90f30 SG	83	*
	84	* Stack grows down from top of CAR. We have:
	85	*
	86	* top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE
65dd74a6	87	* MRC area
76f90f30 SG	88	* global_data
	89	* x86 global descriptor table
	90	* early malloc area
	91	* stack
	92	* bottom-> CONFIG_SYS_CAR_ADDR
ed4cba79	93	*/
65dd74a6 SG	94	movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
	95	#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
	96	subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
	97	#endif
bceb9f0f BM	98	#else
	99	/*
	100	* When we get here after car_init, esp points to a temporary stack
	101	* and esi holds the HOB list address returned by the FSP.
	102	*/
	103	#endif
8d61625d GR	104
	105	/* Reserve space on stack for global data */
	106	subl $GENERATED_GBL_DATA_SIZE, %esp
	107
	108	/* Align global data to 16-byte boundary */
	109	andl $0xfffffff0, %esp
d1cd0459	110	post_code(POST_START_STACK)
8d61625d	111
fbd72824 SG	112	/* Zero the global data since it won't happen later */
	113	xorl %eax, %eax
	114	movl $GENERATED_GBL_DATA_SIZE, %ecx
	115	movl %esp, %edi
	116	rep stosb
	117
bceb9f0f BM	118	#ifdef CONFIG_HAVE_FSP
	119	/* Store HOB list */
	120	movl %esp, %edx
	121	addl $GD_HOB_LIST, %edx
	122	movl %esi, (%edx)
	123	#endif
	124
76f90f30	125	/* Setup first parameter to setup_gdt, pointer to global_data */
8d61625d GR	126	movl %esp, %eax
	127
	128	/* Reserve space for global descriptor table */
	129	subl $X86_GDT_SIZE, %esp
	130
76f90f30 SG	131	/* Align temporary global descriptor table to 16-byte boundary */
	132	andl $0xfffffff0, %esp
	133	movl %esp, %ecx
	134
5dbcaa21 SG	135	#if defined(CONFIG_SYS_MALLOC_F_LEN)
	136	subl $CONFIG_SYS_MALLOC_F_LEN, %esp
	137	movl %eax, %edx
	138	addl $GD_MALLOC_BASE, %edx
	139	movl %esp, (%edx)
	140	#endif
f67cd51e SG	141	/* Store BIST */
	142	movl %eax, %edx
	143	addl $GD_BIST, %edx
	144	movl %ebp, (%edx)
8d61625d GR	145
8d61625d GR	146	/* Set second parameter to setup_gdt */
76f90f30	147	movl %ecx, %edx
8d61625d	148
8d61625d GR	149	/* Setup global descriptor table so gd->xyz works */
8d61625d GR	150	call setup_gdt
9e6c572f	151
96cd6642	152	/* Set parameter to board_init_f() to boot flags */
d1cd0459	153	post_code(POST_START_DONE)
dbf7115a	154	xorl %eax, %eax
161b3589	155
dbf7115a GR	156	/* Enter, U-boot! */
dbf7115a GR	157	call board_init_f
2262cfee WD	158
2262cfee WD	159	/* indicate (lack of) progress */
8bde7f77	160	movw $0x85, %ax
fb002908 GR	161	jmp die
fb002908 GR	162
f48dd6fc GR	163	.globl board_init_f_r_trampoline
	164	.type board_init_f_r_trampoline, @function
	165	board_init_f_r_trampoline:
fb002908 GR	166	/*
	167	* SDRAM has been initialised, U-Boot code has been copied into
	168	* RAM, BSS has been cleared and relocation adjustments have been
	169	* made. It is now time to jump into the in-RAM copy of U-Boot
	170	*
f48dd6fc	171	* %eax = Address of top of new stack
fb002908 GR	172	*/
fb002908 GR	173
8d61625d	174	/* Stack grows down from top of SDRAM */
fb002908 GR	175	movl %eax, %esp
fb002908 GR	176
8d61625d GR	177	/* Reserve space on stack for global data */
	178	subl $GENERATED_GBL_DATA_SIZE, %esp
	179
	180	/* Align global data to 16-byte boundary */
	181	andl $0xfffffff0, %esp
	182
	183	/* Setup first parameter to memcpy (and setup_gdt) */
	184	movl %esp, %eax
	185
	186	/* Setup second parameter to memcpy */
	187	fs movl 0, %edx
	188
	189	/* Set third parameter to memcpy */
	190	movl $GENERATED_GBL_DATA_SIZE, %ecx
	191
	192	/* Copy global data from CAR to SDRAM stack */
	193	call memcpy
	194
	195	/* Reserve space for global descriptor table */
	196	subl $X86_GDT_SIZE, %esp
	197
	198	/* Align global descriptor table to 16-byte boundary */
	199	andl $0xfffffff0, %esp
	200
	201	/* Set second parameter to setup_gdt */
	202	movl %esp, %edx
	203
8d61625d GR	204	/* Setup global descriptor table so gd->xyz works */
	205	call setup_gdt
	206
801d70ce SG	207	/* Set if we need to disable CAR */
	208	.weak car_uninit
	209	movl $car_uninit, %eax
	210	cmpl $0, %eax
	211	jz 1f
	212
	213	call car_uninit
	214	1:
f48dd6fc GR	215	/* Re-enter U-Boot by calling board_init_f_r */
f48dd6fc GR	216	call board_init_f_r
fb002908	217
2f0e0cd2 GR	218	die:
2f0e0cd2 GR	219	hlt
2262cfee	220	jmp die
8bde7f77	221	hlt
077e1958 GR	222
	223	blank_idt_ptr:
	224	.word 0 /* limit */
	225	.long 0 /* base */
a206cc23 GR	226
	227	.p2align 2 /* force 4-byte alignment */
	228
	229	multiboot_header:
	230	/* magic */
	231	.long 0x1BADB002
	232	/* flags */
	233	.long (1 << 16)
	234	/* checksum */
	235	.long -0x1BADB002 - (1 << 16)
	236	/* header addr */
	237	.long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE
	238	/* load addr */
	239	.long CONFIG_SYS_TEXT_BASE
	240	/* load end addr */
	241	.long 0
	242	/* bss end addr */
	243	.long 0
	244	/* entry addr */
	245	.long CONFIG_SYS_TEXT_BASE