]> Git Repo - u-boot.git/blame - board/davinci/common/misc.c
Add Ethernet hardware MAC address framework to usbnet
[u-boot.git] / board / davinci / common / misc.c
CommitLineData
264bbdd1
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1/*
2 * Miscelaneous DaVinci functions.
3 *
ca8480d4 4 * Copyright (C) 2009 Nick Thompson, GE Fanuc Ltd, <[email protected]>
264bbdd1
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5 * Copyright (C) 2007 Sergey Kubushyn <[email protected]>
6 * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
7 * Copyright (C) 2004 Texas Instruments.
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#include <common.h>
28#include <i2c.h>
641e0925 29#include <net.h>
264bbdd1 30#include <asm/arch/hardware.h>
ca8480d4 31#include <asm/io.h>
d7f9b503 32#include <asm/arch/davinci_misc.h>
7a4f511b 33
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34DECLARE_GLOBAL_DATA_PTR;
35
6d1c649f 36#ifndef CONFIG_PRELOADER
97003756
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37int dram_init(void)
38{
39 /* dram_init must store complete ramsize in gd->ram_size */
40 gd->ram_size = get_ram_size(
a55d23cc 41 (void *)CONFIG_SYS_SDRAM_BASE,
97003756
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42 CONFIG_MAX_RAM_BANK_SIZE);
43 return 0;
44}
45
46void dram_init_banksize(void)
47{
48 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
49 gd->bd->bi_dram[0].size = gd->ram_size;
50}
6d1c649f 51#endif
264bbdd1 52
641e0925
DB
53#ifdef CONFIG_DRIVER_TI_EMAC
54
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55/* Read ethernet MAC address from EEPROM for DVEVM compatible boards.
56 * Returns 1 if found, 0 otherwise.
57 */
58int dvevm_read_mac_address(uint8_t *buf)
59{
6d0f6bcf 60#ifdef CONFIG_SYS_I2C_EEPROM_ADDR
264bbdd1 61 /* Read MAC address. */
6d0f6bcf 62 if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x7F00, CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
264bbdd1
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63 (uint8_t *) &buf[0], 6))
64 goto i2cerr;
65
641e0925
DB
66 /* Check that MAC address is valid. */
67 if (!is_valid_ether_addr(buf))
264bbdd1
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68 goto err;
69
70 return 1; /* Found */
71
72i2cerr:
6d0f6bcf 73 printf("Read from EEPROM @ 0x%02x failed\n", CONFIG_SYS_I2C_EEPROM_ADDR);
264bbdd1 74err:
6d0f6bcf 75#endif /* CONFIG_SYS_I2C_EEPROM_ADDR */
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76
77 return 0;
78}
79
6d1c649f
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80/*
81 * Set the mii mode as MII or RMII
82 */
99e4c754 83#if defined(CONFIG_SOC_DA8XX)
6d1c649f
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84void davinci_emac_mii_mode_sel(int mode_sel)
85{
86 int val;
87
88 val = readl(&davinci_syscfg_regs->cfgchip3);
89 if (mode_sel == 0)
90 val &= ~(1 << 8);
91 else
92 val |= (1 << 8);
93 writel(val, &davinci_syscfg_regs->cfgchip3);
94}
95#endif
7b37a27e 96/*
264bbdd1 97 * If there is no MAC address in the environment, then it will be initialized
641e0925 98 * (silently) from the value in the EEPROM.
264bbdd1 99 */
7b37a27e 100void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr)
264bbdd1 101{
7b37a27e 102 uint8_t env_enetaddr[6];
264bbdd1 103
7616e785 104 eth_getenv_enetaddr_by_index("eth", 0, env_enetaddr);
7b37a27e 105 if (!memcmp(env_enetaddr, "\0\0\0\0\0\0", 6)) {
264bbdd1 106 /* There is no MAC address in the environment, so we initialize
641e0925 107 * it from the value in the EEPROM. */
7b37a27e
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108 debug("### Setting environment from EEPROM MAC address = "
109 "\"%pM\"\n",
110 env_enetaddr);
111 eth_setenv_enetaddr("ethaddr", rom_enetaddr);
264bbdd1
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112 }
113}
641e0925 114
6d1c649f
SB
115#endif /* CONFIG_DRIVER_TI_EMAC */
116
117#if defined(CONFIG_SOC_DA8XX)
118#ifndef CONFIG_USE_IRQ
119void irq_init(void)
120{
121 /*
122 * Mask all IRQs by clearing the global enable and setting
123 * the enable clear for all the 90 interrupts.
124 */
125
126 writel(0, &davinci_aintc_regs->ger);
127
128 writel(0, &davinci_aintc_regs->hier);
129
130 writel(0xffffffff, &davinci_aintc_regs->ecr1);
131 writel(0xffffffff, &davinci_aintc_regs->ecr2);
132 writel(0xffffffff, &davinci_aintc_regs->ecr3);
133}
134#endif
135
136/*
137 * Enable PSC for various peripherals.
138 */
139int da8xx_configure_lpsc_items(const struct lpsc_resource *item,
140 const int n_items)
141{
142 int i;
143
144 for (i = 0; i < n_items; i++)
145 lpsc_on(item[i].lpsc_no);
146
147 return 0;
148}
149#endif
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