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83d290c5 1# SPDX-License-Identifier: GPL-2.0+
c609719b 2#
eca3aeb3 3# (C) Copyright 2000 - 2013
c609719b 4# Wolfgang Denk, DENX Software Engineering, [email protected].
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5
6Summary:
7========
8
24ee89b9 9This directory contains the source code for U-Boot, a boot loader for
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10Embedded boards based on PowerPC, ARM, MIPS and several other
11processors, which can be installed in a boot ROM and used to
12initialize and test the hardware or to download and run application
13code.
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14
15The development of U-Boot is closely related to Linux: some parts of
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16the source code originate in the Linux source tree, we have some
17header files in common, and special provision has been made to
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18support booting of Linux images.
19
20Some attention has been paid to make this software easily
21configurable and extendable. For instance, all monitor commands are
22implemented with the same call interface, so that it's very easy to
23add new commands. Also, instead of permanently adding rarely used
24code (for instance hardware test utilities) to the monitor, you can
25load and run it dynamically.
26
27
28Status:
29=======
30
31In general, all boards for which a configuration option exists in the
24ee89b9 32Makefile have been tested to some extent and can be considered
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33"working". In fact, many of them are used in production systems.
34
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35In case of problems see the CHANGELOG file to find out who contributed
36the specific port. In addition, there are various MAINTAINERS files
37scattered throughout the U-Boot source identifying the people or
38companies responsible for various boards and subsystems.
c609719b 39
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40Note: As of August, 2010, there is no longer a CHANGELOG file in the
41actual U-Boot source tree; however, it can be created dynamically
42from the Git log using:
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43
44 make CHANGELOG
45
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46
47Where to get help:
48==================
49
24ee89b9 50In case you have questions about, problems with or contributions for
7207b366 51U-Boot, you should send a message to the U-Boot mailing list at
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52<[email protected]>. There is also an archive of previous traffic
53on the mailing list - please search the archive before asking FAQ's.
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54Please see https://lists.denx.de/pipermail/u-boot and
55https://marc.info/?l=u-boot
c609719b 56
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57Where to get source code:
58=========================
59
7207b366 60The U-Boot source code is maintained in the Git repository at
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61https://source.denx.de/u-boot/u-boot.git ; you can browse it online at
62https://source.denx.de/u-boot/u-boot
218ca724 63
c4bd51e2 64The "Tags" links on this page allow you to download tarballs of
11ccc33f 65any version you might be interested in. Official releases are also
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66available from the DENX file server through HTTPS or FTP.
67https://ftp.denx.de/pub/u-boot/
68ftp://ftp.denx.de/pub/u-boot/
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69
70
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71Where we come from:
72===================
73
74- start from 8xxrom sources
047f6ec0 75- create PPCBoot project (https://sourceforge.net/projects/ppcboot)
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76- clean up code
77- make it easier to add custom boards
78- make it possible to add other [PowerPC] CPUs
79- extend functions, especially:
80 * Provide extended interface to Linux boot loader
81 * S-Record download
82 * network boot
9e5616de 83 * ATA disk / SCSI ... boot
047f6ec0 84- create ARMBoot project (https://sourceforge.net/projects/armboot)
c609719b 85- add other CPU families (starting with ARM)
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86- create U-Boot project (https://sourceforge.net/projects/u-boot)
87- current project page: see https://www.denx.de/wiki/U-Boot
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88
89
90Names and Spelling:
91===================
92
93The "official" name of this project is "Das U-Boot". The spelling
94"U-Boot" shall be used in all written text (documentation, comments
95in source files etc.). Example:
96
97 This is the README file for the U-Boot project.
98
99File names etc. shall be based on the string "u-boot". Examples:
100
101 include/asm-ppc/u-boot.h
102
103 #include <asm/u-boot.h>
104
105Variable names, preprocessor constants etc. shall be either based on
106the string "u_boot" or on "U_BOOT". Example:
107
108 U_BOOT_VERSION u_boot_logo
109 IH_OS_U_BOOT u_boot_hush_start
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110
111
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112Versioning:
113===========
114
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115Starting with the release in October 2008, the names of the releases
116were changed from numerical release numbers without deeper meaning
117into a time stamp based numbering. Regular releases are identified by
118names consisting of the calendar year and month of the release date.
119Additional fields (if present) indicate release candidates or bug fix
120releases in "stable" maintenance trees.
121
122Examples:
c0f40859 123 U-Boot v2009.11 - Release November 2009
360d883a 124 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
0de21ecb 125 U-Boot v2010.09-rc1 - Release candidate 1 for September 2010 release
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126
127
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128Directory Hierarchy:
129====================
130
6e73ed00 131/arch Architecture-specific files
6eae68e4 132 /arc Files generic to ARC architecture
8d321b81 133 /arm Files generic to ARM architecture
8d321b81 134 /m68k Files generic to m68k architecture
8d321b81 135 /microblaze Files generic to microblaze architecture
8d321b81 136 /mips Files generic to MIPS architecture
afc1ce82 137 /nds32 Files generic to NDS32 architecture
8d321b81 138 /nios2 Files generic to Altera NIOS2 architecture
a47a12be 139 /powerpc Files generic to PowerPC architecture
3fafced7 140 /riscv Files generic to RISC-V architecture
7207b366 141 /sandbox Files generic to HW-independent "sandbox"
8d321b81 142 /sh Files generic to SH architecture
33c7731b 143 /x86 Files generic to x86 architecture
e4eb313a 144 /xtensa Files generic to Xtensa architecture
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145/api Machine/arch-independent API for external apps
146/board Board-dependent files
19a91f24 147/boot Support for images and booting
740f7e5c 148/cmd U-Boot commands functions
6e73ed00 149/common Misc architecture-independent functions
7207b366 150/configs Board default configuration files
8d321b81 151/disk Code for disk drive partition handling
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152/doc Documentation (a mix of ReST and READMEs)
153/drivers Device drivers
154/dts Makefile for building internal U-Boot fdt.
155/env Environment support
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156/examples Example code for standalone applications, etc.
157/fs Filesystem code (cramfs, ext2, jffs2, etc.)
158/include Header Files
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159/lib Library routines generic to all architectures
160/Licenses Various license files
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161/net Networking code
162/post Power On Self Test
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163/scripts Various build scripts and Makefiles
164/test Various unit test files
6e73ed00 165/tools Tools to build and sign FIT images, etc.
c609719b 166
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167Software Configuration:
168=======================
169
170Configuration is usually done using C preprocessor defines; the
171rationale behind that is to avoid dead code whenever possible.
172
173There are two classes of configuration variables:
174
175* Configuration _OPTIONS_:
176 These are selectable by the user and have names beginning with
177 "CONFIG_".
178
179* Configuration _SETTINGS_:
180 These depend on the hardware etc. and should not be meddled with if
181 you don't know what you're doing; they have names beginning with
6d0f6bcf 182 "CONFIG_SYS_".
c609719b 183
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184Previously, all configuration was done by hand, which involved creating
185symbolic links and editing configuration files manually. More recently,
186U-Boot has added the Kbuild infrastructure used by the Linux kernel,
187allowing you to use the "make menuconfig" command to configure your
188build.
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189
190
191Selection of Processor Architecture and Board Type:
192---------------------------------------------------
193
194For all supported boards there are ready-to-use default
ab584d67 195configurations available; just type "make <board_name>_defconfig".
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196
197Example: For a TQM823L module type:
198
199 cd u-boot
ab584d67 200 make TQM823L_defconfig
c609719b 201
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202Note: If you're looking for the default configuration file for a board
203you're sure used to be there but is now missing, check the file
204doc/README.scrapyard for a list of no longer supported boards.
c609719b 205
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206Sandbox Environment:
207--------------------
208
209U-Boot can be built natively to run on a Linux host using the 'sandbox'
210board. This allows feature development which is not board- or architecture-
211specific to be undertaken on a native platform. The sandbox is also used to
212run some of U-Boot's tests.
213
bbb140ed 214See doc/arch/sandbox.rst for more details.
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215
216
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217Board Initialisation Flow:
218--------------------------
219
220This is the intended start-up flow for boards. This should apply for both
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221SPL and U-Boot proper (i.e. they both follow the same rules).
222
223Note: "SPL" stands for "Secondary Program Loader," which is explained in
224more detail later in this file.
225
226At present, SPL mostly uses a separate code path, but the function names
227and roles of each function are the same. Some boards or architectures
228may not conform to this. At least most ARM boards which use
229CONFIG_SPL_FRAMEWORK conform to this.
230
231Execution typically starts with an architecture-specific (and possibly
232CPU-specific) start.S file, such as:
233
234 - arch/arm/cpu/armv7/start.S
235 - arch/powerpc/cpu/mpc83xx/start.S
236 - arch/mips/cpu/start.S
db910353 237
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238and so on. From there, three functions are called; the purpose and
239limitations of each of these functions are described below.
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240
241lowlevel_init():
242 - purpose: essential init to permit execution to reach board_init_f()
243 - no global_data or BSS
244 - there is no stack (ARMv7 may have one but it will soon be removed)
245 - must not set up SDRAM or use console
246 - must only do the bare minimum to allow execution to continue to
247 board_init_f()
248 - this is almost never needed
249 - return normally from this function
250
251board_init_f():
252 - purpose: set up the machine ready for running board_init_r():
253 i.e. SDRAM and serial UART
254 - global_data is available
255 - stack is in SRAM
256 - BSS is not available, so you cannot use global/static variables,
257 only stack variables and global_data
258
259 Non-SPL-specific notes:
260 - dram_init() is called to set up DRAM. If already done in SPL this
261 can do nothing
262
263 SPL-specific notes:
264 - you can override the entire board_init_f() function with your own
265 version as needed.
266 - preloader_console_init() can be called here in extremis
267 - should set up SDRAM, and anything needed to make the UART work
499696e4 268 - there is no need to clear BSS, it will be done by crt0.S
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269 - for specific scenarios on certain architectures an early BSS *can*
270 be made available (via CONFIG_SPL_EARLY_BSS by moving the clearing
271 of BSS prior to entering board_init_f()) but doing so is discouraged.
272 Instead it is strongly recommended to architect any code changes
273 or additions such to not depend on the availability of BSS during
274 board_init_f() as indicated in other sections of this README to
275 maintain compatibility and consistency across the entire code base.
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276 - must return normally from this function (don't call board_init_r()
277 directly)
278
279Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at
280this point the stack and global_data are relocated to below
281CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of
282memory.
283
284board_init_r():
285 - purpose: main execution, common code
286 - global_data is available
287 - SDRAM is available
288 - BSS is available, all static/global variables can be used
289 - execution eventually continues to main_loop()
290
291 Non-SPL-specific notes:
292 - U-Boot is relocated to the top of memory and is now running from
293 there.
294
295 SPL-specific notes:
296 - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
297 CONFIG_SPL_STACK_R_ADDR points into SDRAM
298 - preloader_console_init() can be called here - typically this is
0680f1b1 299 done by selecting CONFIG_SPL_BOARD_INIT and then supplying a
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300 spl_board_init() function containing this call
301 - loads U-Boot or (in falcon mode) Linux
302
303
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304Configuration Options:
305----------------------
306
307Configuration depends on the combination of board and CPU type; all
308such information is kept in a configuration file
309"include/configs/<board_name>.h".
310
311Example: For a TQM823L module, all configuration settings are in
312"include/configs/TQM823L.h".
313
314
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315Many of the options are named exactly as the corresponding Linux
316kernel configuration options. The intention is to make it easier to
317build a config tool - later.
318
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319- ARM Platform Bus Type(CCI):
320 CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which
321 provides full cache coherency between two clusters of multi-core
322 CPUs and I/O coherency for devices and I/O masters
323
324 CONFIG_SYS_FSL_HAS_CCI400
325
326 Defined For SoC that has cache coherent interconnect
327 CCN-400
7f6c2cbc 328
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329 CONFIG_SYS_FSL_HAS_CCN504
330
331 Defined for SoC that has cache coherent interconnect CCN-504
332
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333The following options need to be configured:
334
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335- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
336
337- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
6ccec449 338
66412c63 339- 85xx CPU Options:
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340 CONFIG_SYS_PPC64
341
342 Specifies that the core is a 64-bit PowerPC implementation (implements
343 the "64" category of the Power ISA). This is necessary for ePAPR
344 compliance, among other possible reasons.
345
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346 CONFIG_SYS_FSL_TBCLK_DIV
347
348 Defines the core time base clock divider ratio compared to the
349 system clock. On most PQ3 devices this is 8, on newer QorIQ
350 devices it can be 16 or 32. The ratio varies from SoC to Soc.
351
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352 CONFIG_SYS_FSL_PCIE_COMPAT
353
354 Defines the string to utilize when trying to match PCIe device
355 tree nodes for the given platform.
356
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357 CONFIG_SYS_FSL_ERRATUM_A004510
358
359 Enables a workaround for erratum A004510. If set,
360 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
361 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
362
363 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
364 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
365
366 Defines one or two SoC revisions (low 8 bits of SVR)
367 for which the A004510 workaround should be applied.
368
369 The rest of SVR is either not relevant to the decision
370 of whether the erratum is present (e.g. p2040 versus
371 p2041) or is implied by the build target, which controls
372 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
373
374 See Freescale App Note 4493 for more information about
375 this erratum.
376
377 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
378
379 This is the value to write into CCSR offset 0x18600
380 according to the A004510 workaround.
381
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382 CONFIG_SYS_FSL_DSP_DDR_ADDR
383 This value denotes start offset of DDR memory which is
384 connected exclusively to the DSP cores.
385
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386 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
387 This value denotes start offset of M2 memory
388 which is directly connected to the DSP core.
389
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390 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
391 This value denotes start offset of M3 memory which is directly
392 connected to the DSP core.
393
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394 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
395 This value denotes start offset of DSP CCSR space.
396
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397 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
398 Single Source Clock is clocking mode present in some of FSL SoC's.
399 In this mode, a single differential clock is used to supply
400 clocks to the sysclock, ddrclock and usbclock.
401
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402 CONFIG_SYS_CPC_REINIT_F
403 This CONFIG is defined when the CPC is configured as SRAM at the
a187559e 404 time of U-Boot entry and is required to be re-initialized.
fb4a2409 405
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406- Generic CPU options:
407 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
408
409 Defines the endianess of the CPU. Implementation of those
410 values is arch specific.
411
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412 CONFIG_SYS_FSL_DDR
413 Freescale DDR driver in use. This type of DDR controller is
1c58857a 414 found in mpc83xx, mpc85xx as well as some ARM core SoCs.
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415
416 CONFIG_SYS_FSL_DDR_ADDR
417 Freescale DDR memory-mapped register base.
418
419 CONFIG_SYS_FSL_DDR_EMU
420 Specify emulator support for DDR. Some DDR features such as
421 deskew training are not available.
422
423 CONFIG_SYS_FSL_DDRC_GEN1
424 Freescale DDR1 controller.
425
426 CONFIG_SYS_FSL_DDRC_GEN2
427 Freescale DDR2 controller.
428
429 CONFIG_SYS_FSL_DDRC_GEN3
430 Freescale DDR3 controller.
431
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432 CONFIG_SYS_FSL_DDRC_GEN4
433 Freescale DDR4 controller.
434
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435 CONFIG_SYS_FSL_DDRC_ARM_GEN3
436 Freescale DDR3 controller for ARM-based SoCs.
437
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438 CONFIG_SYS_FSL_DDR1
439 Board config to use DDR1. It can be enabled for SoCs with
440 Freescale DDR1 or DDR2 controllers, depending on the board
441 implemetation.
442
443 CONFIG_SYS_FSL_DDR2
62a3b7dd 444 Board config to use DDR2. It can be enabled for SoCs with
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445 Freescale DDR2 or DDR3 controllers, depending on the board
446 implementation.
447
448 CONFIG_SYS_FSL_DDR3
449 Board config to use DDR3. It can be enabled for SoCs with
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450 Freescale DDR3 or DDR3L controllers.
451
452 CONFIG_SYS_FSL_DDR3L
453 Board config to use DDR3L. It can be enabled for SoCs with
454 DDR3L controllers.
5614e71b 455
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456 CONFIG_SYS_FSL_IFC_BE
457 Defines the IFC controller register space as Big Endian
458
459 CONFIG_SYS_FSL_IFC_LE
460 Defines the IFC controller register space as Little Endian
461
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462 CONFIG_SYS_FSL_IFC_CLK_DIV
463 Defines divider of platform clock(clock input to IFC controller).
464
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465 CONFIG_SYS_FSL_LBC_CLK_DIV
466 Defines divider of platform clock(clock input to eLBC controller).
467
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468 CONFIG_SYS_FSL_DDR_BE
469 Defines the DDR controller register space as Big Endian
470
471 CONFIG_SYS_FSL_DDR_LE
472 Defines the DDR controller register space as Little Endian
473
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474 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
475 Physical address from the view of DDR controllers. It is the
476 same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
477 it could be different for ARM SoCs.
478
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479 CONFIG_SYS_FSL_DDR_INTLV_256B
480 DDR controller interleaving on 256-byte. This is a special
481 interleaving mode, handled by Dickens for Freescale layerscape
482 SoCs with ARM core.
483
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484 CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
485 Number of controllers used as main memory.
486
487 CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
488 Number of controllers used for other than main memory.
489
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490 CONFIG_SYS_FSL_HAS_DP_DDR
491 Defines the SoC has DP-DDR used for DPAA.
492
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493 CONFIG_SYS_FSL_SEC_BE
494 Defines the SEC controller register space as Big Endian
495
496 CONFIG_SYS_FSL_SEC_LE
497 Defines the SEC controller register space as Little Endian
498
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499- MIPS CPU options:
500 CONFIG_SYS_INIT_SP_OFFSET
501
502 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
503 pointer. This is needed for the temporary stack before
504 relocation.
505
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506 CONFIG_XWAY_SWAP_BYTES
507
508 Enable compilation of tools/xway-swap-bytes needed for Lantiq
509 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
510 be swapped if a flash programmer is used.
511
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512- ARM options:
513 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
514
515 Select high exception vectors of the ARM core, e.g., do not
516 clear the V bit of the c1 register of CP15.
517
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518 COUNTER_FREQUENCY
519 Generic timer clock source frequency.
520
521 COUNTER_FREQUENCY_REAL
522 Generic timer clock source frequency if the real clock is
523 different from COUNTER_FREQUENCY, and can only be determined
524 at run time.
525
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526- Tegra SoC options:
527 CONFIG_TEGRA_SUPPORT_NON_SECURE
528
529 Support executing U-Boot in non-secure (NS) mode. Certain
530 impossible actions will be skipped if the CPU is in NS mode,
531 such as ARM architectural timer initialization.
532
5da627a4 533- Linux Kernel Interface:
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534 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
535
b445bbb4 536 When transferring memsize parameter to Linux, some versions
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537 expect it to be in bytes, others in MB.
538 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
539
fec6d9ee 540 CONFIG_OF_LIBFDT
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541
542 New kernel versions are expecting firmware settings to be
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543 passed using flattened device trees (based on open firmware
544 concepts).
545
546 CONFIG_OF_LIBFDT
547 * New libfdt-based support
548 * Adds the "fdt" command
3bb342fc 549 * The bootm command automatically updates the fdt
213bf8c8 550
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551 OF_TBCLK - The timebase frequency.
552
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553 boards with QUICC Engines require OF_QE to set UCC MAC
554 addresses
3bb342fc 555
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556 CONFIG_OF_IDE_FIXUP
557
558 U-Boot can detect if an IDE device is present or not.
559 If not, and this new config option is activated, U-Boot
560 removes the ATA node from the DTS before booting Linux,
561 so the Linux IDE driver does not probe the device and
562 crash. This is needed for buggy hardware (uc101) where
563 no pull down resistor is connected to the signal IDE5V_DD7.
564
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565- vxWorks boot parameters:
566
567 bootvx constructs a valid bootline using the following
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568 environments variables: bootdev, bootfile, ipaddr, netmask,
569 serverip, gatewayip, hostname, othbootargs.
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570 It loads the vxWorks image pointed bootfile.
571
81a05d9b 572 Note: If a "bootargs" environment is defined, it will override
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573 the defaults discussed just above.
574
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575- Cache Configuration for ARM:
576 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
577 controller
578 CONFIG_SYS_PL310_BASE - Physical base address of PL310
579 controller register space
580
6705d81e 581- Serial Ports:
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582 CONFIG_PL011_CLOCK
583
584 If you have Amba PrimeCell PL011 UARTs, set this variable to
585 the clock speed of the UARTs.
586
587 CONFIG_PL01x_PORTS
588
589 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
590 define this to a list of base addresses for each (supported)
591 port. See e.g. include/configs/versatile.h
592
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593 CONFIG_SERIAL_HW_FLOW_CONTROL
594
595 Define this variable to enable hw flow control in serial driver.
596 Current user of this option is drivers/serial/nsl16550.c driver
6705d81e 597
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598- Serial Download Echo Mode:
599 CONFIG_LOADS_ECHO
600 If defined to 1, all characters received during a
601 serial download (using the "loads" command) are
602 echoed back. This might be needed by some terminal
603 emulations (like "cu"), but may as well just take
604 time on others. This setting #define's the initial
605 value of the "loads_echo" environment variable.
606
302a6487
SG
607- Removal of commands
608 If no commands are needed to boot, you can disable
609 CONFIG_CMDLINE to remove them. In this case, the command line
610 will not be available, and when U-Boot wants to execute the
611 boot command (on start-up) it will call board_run_command()
612 instead. This can reduce image size significantly for very
613 simple boot procedures.
614
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615- Regular expression support:
616 CONFIG_REGEX
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617 If this variable is defined, U-Boot is linked against
618 the SLRE (Super Light Regular Expression) library,
619 which adds regex support to some commands, as for
620 example "env grep" and "setexpr".
a5ecbe62 621
c609719b 622- Watchdog:
933ada56
RV
623 CONFIG_SYS_WATCHDOG_FREQ
624 Some platforms automatically call WATCHDOG_RESET()
625 from the timer interrupt handler every
626 CONFIG_SYS_WATCHDOG_FREQ interrupts. If not set by the
627 board configuration file, a default of CONFIG_SYS_HZ/2
628 (i.e. 500) is used. Setting CONFIG_SYS_WATCHDOG_FREQ
629 to 0 disables calling WATCHDOG_RESET() from the timer
630 interrupt.
631
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632- Real-Time Clock:
633
602ad3b3 634 When CONFIG_CMD_DATE is selected, the type of the RTC
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635 has to be selected, too. Define exactly one of the
636 following options:
637
c609719b 638 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
4e8b7544 639 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
c609719b 640 CONFIG_RTC_MC146818 - use MC146818 RTC
1cb8e980 641 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
c609719b 642 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
7f70e853 643 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
412921d2 644 CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC
3bac3513 645 CONFIG_RTC_DS164x - use Dallas DS164x RTC
9536dfcc 646 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
4c0d4c3b 647 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
2bd3cab3 648 CONFIG_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
71d19f30
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649 CONFIG_SYS_RV3029_TCR - enable trickle charger on
650 RV3029 RTC.
c609719b 651
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652 Note that if the RTC uses I2C, then the I2C interface
653 must also be configured. See I2C Support, below.
654
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655- GPIO Support:
656 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
e92739d3 657
5dec49ca
CP
658 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
659 chip-ngpio pairs that tell the PCA953X driver the number of
660 pins supported by a particular chip.
661
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PT
662 Note that if the GPIO device uses I2C, then the I2C interface
663 must also be configured. See I2C Support, below.
664
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SG
665- I/O tracing:
666 When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
667 accesses and can checksum them or write a list of them out
668 to memory. See the 'iotrace' command for details. This is
669 useful for testing device drivers since it can confirm that
670 the driver behaves the same way before and after a code
671 change. Currently this is supported on sandbox and arm. To
672 add support for your architecture, add '#include <iotrace.h>'
673 to the bottom of arch/<arch>/include/asm/io.h and test.
674
675 Example output from the 'iotrace stats' command is below.
676 Note that if the trace buffer is exhausted, the checksum will
677 still continue to operate.
678
679 iotrace is enabled
680 Start: 10000000 (buffer start address)
681 Size: 00010000 (buffer size)
682 Offset: 00000120 (current buffer offset)
683 Output: 10000120 (start + offset)
684 Count: 00000018 (number of trace records)
685 CRC32: 9526fb66 (CRC32 of all trace records)
686
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687- Timestamp Support:
688
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689 When CONFIG_TIMESTAMP is selected, the timestamp
690 (date and time) of an image is printed by image
691 commands like bootm or iminfo. This option is
602ad3b3 692 automatically enabled when you select CONFIG_CMD_DATE .
c609719b 693
923c46f9
KP
694- Partition Labels (disklabels) Supported:
695 Zero or more of the following:
696 CONFIG_MAC_PARTITION Apple's MacOS partition table.
923c46f9
KP
697 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
698 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
699 bootloader. Note 2TB partition limit; see
700 disk/part_efi.c
c649e3c9 701 CONFIG_SCSI) you must configure support for at
923c46f9 702 least one non-MTD partition type as well.
c609719b 703
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704- LBA48 Support
705 CONFIG_LBA48
706
707 Set this to enable support for disks larger than 137GB
4b142feb 708 Also look at CONFIG_SYS_64BIT_LBA.
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709 Whithout these , LBA48 support uses 32bit variables and will 'only'
710 support disks up to 2.1TB.
711
6d0f6bcf 712 CONFIG_SYS_64BIT_LBA:
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713 When enabled, makes the IDE subsystem use 64bit sector addresses.
714 Default is 32bit.
715
c609719b 716- NETWORK Support (PCI):
ce5207e1
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717 CONFIG_E1000_SPI
718 Utility code for direct access to the SPI bus on Intel 8257x.
719 This does not do anything useful unless you set at least one
720 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
721
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722 CONFIG_NATSEMI
723 Support for National dp83815 chips.
724
725 CONFIG_NS8382X
726 Support for National dp8382[01] gigabit chips.
727
45219c46 728- NETWORK Support (other):
efdd7319
RH
729 CONFIG_CALXEDA_XGMAC
730 Support for the Calxeda XGMAC device
731
3bb46d23 732 CONFIG_LAN91C96
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733 Support for SMSC's LAN91C96 chips.
734
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735 CONFIG_LAN91C96_USE_32_BIT
736 Define this to enable 32 bit addressing
737
3bb46d23 738 CONFIG_SMC91111
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739 Support for SMSC's LAN91C111 chip
740
741 CONFIG_SMC91111_BASE
742 Define this to hold the physical address
743 of the device (I/O space)
744
745 CONFIG_SMC_USE_32_BIT
746 Define this if data bus is 32 bits
747
748 CONFIG_SMC_USE_IOFUNCS
749 Define this to use i/o functions instead of macros
750 (some hardware wont work with macros)
751
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HS
752 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
753 Define this if you have more then 3 PHYs.
754
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ML
755 CONFIG_FTGMAC100
756 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
757
758 CONFIG_FTGMAC100_EGIGA
759 Define this to use GE link update with gigabit PHY.
760 Define this if FTGMAC100 is connected to gigabit PHY.
761 If your system has 10/100 PHY only, it might not occur
762 wrong behavior. Because PHY usually return timeout or
763 useless data when polling gigabit status and gigabit
764 control registers. This behavior won't affect the
765 correctnessof 10/100 link speed update.
766
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767 CONFIG_SH_ETHER
768 Support for Renesas on-chip Ethernet controller
769
770 CONFIG_SH_ETHER_USE_PORT
771 Define the number of ports to be used
772
773 CONFIG_SH_ETHER_PHY_ADDR
774 Define the ETH PHY's address
775
68260aab
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776 CONFIG_SH_ETHER_CACHE_WRITEBACK
777 If this option is set, the driver enables cache flush.
778
5e124724 779- TPM Support:
90899cc0
CC
780 CONFIG_TPM
781 Support TPM devices.
782
0766ad2f
CR
783 CONFIG_TPM_TIS_INFINEON
784 Support for Infineon i2c bus TPM devices. Only one device
1b393db5
TWHT
785 per system is supported at this time.
786
1b393db5
TWHT
787 CONFIG_TPM_TIS_I2C_BURST_LIMITATION
788 Define the burst count bytes upper limit
789
3aa74088
CR
790 CONFIG_TPM_ST33ZP24
791 Support for STMicroelectronics TPM devices. Requires DM_TPM support.
792
793 CONFIG_TPM_ST33ZP24_I2C
794 Support for STMicroelectronics ST33ZP24 I2C devices.
795 Requires TPM_ST33ZP24 and I2C.
796
b75fdc11
CR
797 CONFIG_TPM_ST33ZP24_SPI
798 Support for STMicroelectronics ST33ZP24 SPI devices.
799 Requires TPM_ST33ZP24 and SPI.
800
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DE
801 CONFIG_TPM_ATMEL_TWI
802 Support for Atmel TWI TPM device. Requires I2C support.
803
90899cc0 804 CONFIG_TPM_TIS_LPC
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VB
805 Support for generic parallel port TPM devices. Only one device
806 per system is supported at this time.
807
808 CONFIG_TPM_TIS_BASE_ADDRESS
809 Base address where the generic TPM device is mapped
810 to. Contemporary x86 systems usually map it at
811 0xfed40000.
812
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RP
813 CONFIG_TPM
814 Define this to enable the TPM support library which provides
815 functional interfaces to some TPM commands.
816 Requires support for a TPM device.
817
818 CONFIG_TPM_AUTH_SESSIONS
819 Define this to enable authorized functions in the TPM library.
820 Requires CONFIG_TPM and CONFIG_SHA1.
821
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822- USB Support:
823 At the moment only the UHCI host controller is
064b55cf 824 supported (PIP405, MIP405); define
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825 CONFIG_USB_UHCI to enable it.
826 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
30d56fae 827 and define CONFIG_USB_STORAGE to enable the USB
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WD
828 storage devices.
829 Note:
830 Supported are USB Keyboards and USB Floppy drives
831 (TEAC FD-05PUB).
4d13cbad 832
9ab4ce22
SG
833 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
834 txfilltuning field in the EHCI controller on reset.
835
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OT
836 CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
837 HW module registers.
838
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WD
839- USB Device:
840 Define the below if you wish to use the USB console.
841 Once firmware is rebuilt from a serial console issue the
842 command "setenv stdin usbtty; setenv stdout usbtty" and
11ccc33f 843 attach your USB cable. The Unix command "dmesg" should print
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WD
844 it has found a new device. The environment variable usbtty
845 can be set to gserial or cdc_acm to enable your device to
386eda02 846 appear to a USB host as a Linux gserial device or a
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WD
847 Common Device Class Abstract Control Model serial device.
848 If you select usbtty = gserial you should be able to enumerate
849 a Linux host by
850 # modprobe usbserial vendor=0xVendorID product=0xProductID
851 else if using cdc_acm, simply setting the environment
852 variable usbtty to be cdc_acm should suffice. The following
853 might be defined in YourBoardName.h
386eda02 854
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WD
855 CONFIG_USB_DEVICE
856 Define this to build a UDC device
857
858 CONFIG_USB_TTY
859 Define this to have a tty type of device available to
860 talk to the UDC device
386eda02 861
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VK
862 CONFIG_USBD_HS
863 Define this to enable the high speed support for usb
864 device and usbtty. If this feature is enabled, a routine
865 int is_usbd_high_speed(void)
866 also needs to be defined by the driver to dynamically poll
867 whether the enumeration has succeded at high speed or full
868 speed.
869
386eda02 870 If you have a USB-IF assigned VendorID then you may wish to
16c8d5e7 871 define your own vendor specific values either in BoardName.h
386eda02 872 or directly in usbd_vendor_info.h. If you don't define
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WD
873 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
874 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
875 should pretend to be a Linux device to it's target host.
876
877 CONFIG_USBD_MANUFACTURER
878 Define this string as the name of your company for
879 - CONFIG_USBD_MANUFACTURER "my company"
386eda02 880
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WD
881 CONFIG_USBD_PRODUCT_NAME
882 Define this string as the name of your product
883 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
884
885 CONFIG_USBD_VENDORID
886 Define this as your assigned Vendor ID from the USB
887 Implementors Forum. This *must* be a genuine Vendor ID
888 to avoid polluting the USB namespace.
889 - CONFIG_USBD_VENDORID 0xFFFF
386eda02 890
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WD
891 CONFIG_USBD_PRODUCTID
892 Define this as the unique Product ID
893 for your device
894 - CONFIG_USBD_PRODUCTID 0xFFFF
4d13cbad 895
d70a560f
IG
896- ULPI Layer Support:
897 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
898 the generic ULPI layer. The generic layer accesses the ULPI PHY
899 via the platform viewport, so you need both the genric layer and
900 the viewport enabled. Currently only Chipidea/ARC based
901 viewport is supported.
902 To enable the ULPI layer support, define CONFIG_USB_ULPI and
903 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
6d365ea0
LS
904 If your ULPI phy needs a different reference clock than the
905 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
906 the appropriate value in Hz.
c609719b 907
71f95118 908- MMC Support:
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WD
909 The MMC controller on the Intel PXA is supported. To
910 enable this define CONFIG_MMC. The MMC can be
911 accessed from the boot prompt by mapping the device
71f95118 912 to physical memory similar to flash. Command line is
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JL
913 enabled with CONFIG_CMD_MMC. The MMC driver also works with
914 the FAT fs. This is enabled with CONFIG_CMD_FAT.
71f95118 915
afb35666
YS
916 CONFIG_SH_MMCIF
917 Support for Renesas on-chip MMCIF controller
918
919 CONFIG_SH_MMCIF_ADDR
920 Define the base address of MMCIF registers
921
922 CONFIG_SH_MMCIF_CLK
923 Define the clock frequency for MMCIF
924
b3ba6e94 925- USB Device Firmware Update (DFU) class support:
bb4059a5 926 CONFIG_DFU_OVER_USB
b3ba6e94
TR
927 This enables the USB portion of the DFU USB class
928
c6631764
PA
929 CONFIG_DFU_NAND
930 This enables support for exposing NAND devices via DFU.
931
a9479f04
AM
932 CONFIG_DFU_RAM
933 This enables support for exposing RAM via DFU.
934 Note: DFU spec refer to non-volatile memory usage, but
935 allow usages beyond the scope of spec - here RAM usage,
936 one that would help mostly the developer.
937
e7e75c70
HS
938 CONFIG_SYS_DFU_DATA_BUF_SIZE
939 Dfu transfer uses a buffer before writing data to the
940 raw storage device. Make the size (in bytes) of this buffer
941 configurable. The size of this buffer is also configurable
942 through the "dfu_bufsiz" environment variable.
943
ea2453d5
PA
944 CONFIG_SYS_DFU_MAX_FILE_SIZE
945 When updating files rather than the raw storage device,
946 we use a static buffer to copy the file into and then write
947 the buffer once we've been given the whole file. Define
948 this to the maximum filesize (in bytes) for the buffer.
949 Default is 4 MiB if undefined.
950
001a8319
HS
951 DFU_DEFAULT_POLL_TIMEOUT
952 Poll timeout [ms], is the timeout a device can send to the
953 host. The host must wait for this timeout before sending
954 a subsequent DFU_GET_STATUS request to the device.
955
956 DFU_MANIFEST_POLL_TIMEOUT
957 Poll timeout [ms], which the device sends to the host when
958 entering dfuMANIFEST state. Host waits this timeout, before
959 sending again an USB request to the device.
960
6705d81e 961- Journaling Flash filesystem support:
6d0f6bcf
JCPV
962 CONFIG_SYS_JFFS2_FIRST_SECTOR,
963 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
6705d81e
WD
964 Define these for a default partition on a NOR device
965
c609719b 966- Keyboard Support:
39f615ed
SG
967 See Kconfig help for available keyboard drivers.
968
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WD
969- LCD Support: CONFIG_LCD
970
971 Define this to enable LCD support (for output to LCD
972 display); also select one of the supported displays
973 by defining one of these:
974
fd3103bb 975 CONFIG_NEC_NL6448AC33:
c609719b 976
fd3103bb 977 NEC NL6448AC33-18. Active, color, single scan.
c609719b 978
fd3103bb 979 CONFIG_NEC_NL6448BC20
c609719b 980
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WD
981 NEC NL6448BC20-08. 6.5", 640x480.
982 Active, color, single scan.
983
984 CONFIG_NEC_NL6448BC33_54
985
986 NEC NL6448BC33-54. 10.4", 640x480.
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987 Active, color, single scan.
988
989 CONFIG_SHARP_16x9
990
991 Sharp 320x240. Active, color, single scan.
992 It isn't 16x9, and I am not sure what it is.
993
994 CONFIG_SHARP_LQ64D341
995
996 Sharp LQ64D341 display, 640x480.
997 Active, color, single scan.
998
999 CONFIG_HLD1045
1000
1001 HLD1045 display, 640x480.
1002 Active, color, single scan.
1003
1004 CONFIG_OPTREX_BW
1005
1006 Optrex CBL50840-2 NF-FW 99 22 M5
1007 or
1008 Hitachi LMG6912RPFC-00T
1009 or
1010 Hitachi SP14Q002
1011
1012 320x240. Black & white.
1013
676d319e
SG
1014 CONFIG_LCD_ALIGNMENT
1015
b445bbb4 1016 Normally the LCD is page-aligned (typically 4KB). If this is
676d319e
SG
1017 defined then the LCD will be aligned to this value instead.
1018 For ARM it is sometimes useful to use MMU_SECTION_SIZE
1019 here, since it is cheaper to change data cache settings on
1020 a per-section basis.
1021
1022
604c7d4a
HP
1023 CONFIG_LCD_ROTATION
1024
1025 Sometimes, for example if the display is mounted in portrait
1026 mode or even if it's mounted landscape but rotated by 180degree,
1027 we need to rotate our content of the display relative to the
1028 framebuffer, so that user can read the messages which are
1029 printed out.
1030 Once CONFIG_LCD_ROTATION is defined, the lcd_console will be
1031 initialized with a given rotation from "vl_rot" out of
1032 "vidinfo_t" which is provided by the board specific code.
1033 The value for vl_rot is coded as following (matching to
1034 fbcon=rotate:<n> linux-kernel commandline):
1035 0 = no rotation respectively 0 degree
1036 1 = 90 degree rotation
1037 2 = 180 degree rotation
1038 3 = 270 degree rotation
1039
1040 If CONFIG_LCD_ROTATION is not defined, the console will be
1041 initialized with 0degree rotation.
1042
17ea1177 1043- MII/PHY support:
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WD
1044 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1045
1046 The clock frequency of the MII bus
1047
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WD
1048 CONFIG_PHY_CMD_DELAY (ppc4xx)
1049
1050 Some PHY like Intel LXT971A need extra delay after
1051 command issued before MII status register can be read
1052
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1053- IP address:
1054 CONFIG_IPADDR
1055
1056 Define a default value for the IP address to use for
11ccc33f 1057 the default Ethernet interface, in case this is not
c609719b 1058 determined through e.g. bootp.
1ebcd654 1059 (Environment variable "ipaddr")
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1060
1061- Server IP address:
1062 CONFIG_SERVERIP
1063
11ccc33f 1064 Defines a default value for the IP address of a TFTP
c609719b 1065 server to contact when using the "tftboot" command.
1ebcd654 1066 (Environment variable "serverip")
c609719b 1067
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WD
1068- Gateway IP address:
1069 CONFIG_GATEWAYIP
1070
1071 Defines a default value for the IP address of the
1072 default router where packets to other networks are
1073 sent to.
1074 (Environment variable "gatewayip")
1075
1076- Subnet mask:
1077 CONFIG_NETMASK
1078
1079 Defines a default value for the subnet mask (or
1080 routing prefix) which is used to determine if an IP
1081 address belongs to the local subnet or needs to be
1082 forwarded through a router.
1083 (Environment variable "netmask")
1084
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1085- BOOTP Recovery Mode:
1086 CONFIG_BOOTP_RANDOM_DELAY
1087
1088 If you have many targets in a network that try to
1089 boot using BOOTP, you may want to avoid that all
1090 systems send out BOOTP requests at precisely the same
1091 moment (which would happen for instance at recovery
1092 from a power failure, when all systems will try to
1093 boot, thus flooding the BOOTP server. Defining
1094 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
1095 inserted before sending out BOOTP requests. The
6c33c785 1096 following delays are inserted then:
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1097
1098 1st BOOTP request: delay 0 ... 1 sec
1099 2nd BOOTP request: delay 0 ... 2 sec
1100 3rd BOOTP request: delay 0 ... 4 sec
1101 4th and following
1102 BOOTP requests: delay 0 ... 8 sec
1103
92ac8acc
TR
1104 CONFIG_BOOTP_ID_CACHE_SIZE
1105
1106 BOOTP packets are uniquely identified using a 32-bit ID. The
1107 server will copy the ID from client requests to responses and
1108 U-Boot will use this to determine if it is the destination of
1109 an incoming response. Some servers will check that addresses
1110 aren't in use before handing them out (usually using an ARP
1111 ping) and therefore take up to a few hundred milliseconds to
1112 respond. Network congestion may also influence the time it
1113 takes for a response to make it back to the client. If that
1114 time is too long, U-Boot will retransmit requests. In order
1115 to allow earlier responses to still be accepted after these
1116 retransmissions, U-Boot's BOOTP client keeps a small cache of
1117 IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this
1118 cache. The default is to keep IDs for up to four outstanding
1119 requests. Increasing this will allow U-Boot to accept offers
1120 from a BOOTP client in networks with unusually high latency.
1121
fe389a82 1122- DHCP Advanced Options:
2c00e099 1123
d22c338e
JH
1124 - Link-local IP address negotiation:
1125 Negotiate with other link-local clients on the local network
1126 for an address that doesn't require explicit configuration.
1127 This is especially useful if a DHCP server cannot be guaranteed
1128 to exist in all environments that the device must operate.
1129
1130 See doc/README.link-local for more information.
1131
24acb83d
PK
1132 - MAC address from environment variables
1133
1134 FDT_SEQ_MACADDR_FROM_ENV
1135
1136 Fix-up device tree with MAC addresses fetched sequentially from
1137 environment variables. This config work on assumption that
1138 non-usable ethernet node of device-tree are either not present
1139 or their status has been marked as "disabled".
1140
a3d991bd 1141 - CDP Options:
6e592385 1142 CONFIG_CDP_DEVICE_ID
a3d991bd
WD
1143
1144 The device id used in CDP trigger frames.
1145
1146 CONFIG_CDP_DEVICE_ID_PREFIX
1147
1148 A two character string which is prefixed to the MAC address
1149 of the device.
1150
1151 CONFIG_CDP_PORT_ID
1152
1153 A printf format string which contains the ascii name of
1154 the port. Normally is set to "eth%d" which sets
11ccc33f 1155 eth0 for the first Ethernet, eth1 for the second etc.
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WD
1156
1157 CONFIG_CDP_CAPABILITIES
1158
1159 A 32bit integer which indicates the device capabilities;
1160 0x00000010 for a normal host which does not forwards.
1161
1162 CONFIG_CDP_VERSION
1163
1164 An ascii string containing the version of the software.
1165
1166 CONFIG_CDP_PLATFORM
1167
1168 An ascii string containing the name of the platform.
1169
1170 CONFIG_CDP_TRIGGER
1171
1172 A 32bit integer sent on the trigger.
1173
1174 CONFIG_CDP_POWER_CONSUMPTION
1175
1176 A 16bit integer containing the power consumption of the
1177 device in .1 of milliwatts.
1178
1179 CONFIG_CDP_APPLIANCE_VLAN_TYPE
1180
1181 A byte containing the id of the VLAN.
1182
79267edd 1183- Status LED: CONFIG_LED_STATUS
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1184
1185 Several configurations allow to display the current
1186 status using a LED. For instance, the LED will blink
1187 fast while running U-Boot code, stop blinking as
1188 soon as a reply to a BOOTP request was received, and
1189 start blinking slow once the Linux kernel is running
1190 (supported by a status LED driver in the Linux
79267edd 1191 kernel). Defining CONFIG_LED_STATUS enables this
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WD
1192 feature in U-Boot.
1193
1df7bbba
IG
1194 Additional options:
1195
79267edd 1196 CONFIG_LED_STATUS_GPIO
1df7bbba
IG
1197 The status LED can be connected to a GPIO pin.
1198 In such cases, the gpio_led driver can be used as a
79267edd 1199 status LED backend implementation. Define CONFIG_LED_STATUS_GPIO
1df7bbba
IG
1200 to include the gpio_led driver in the U-Boot binary.
1201
9dfdcdfe
IG
1202 CONFIG_GPIO_LED_INVERTED_TABLE
1203 Some GPIO connected LEDs may have inverted polarity in which
1204 case the GPIO high value corresponds to LED off state and
1205 GPIO low value corresponds to LED on state.
1206 In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
1207 with a list of GPIO LEDs that have inverted polarity.
1208
55dabcc8 1209- I2C Support:
3f4978c7 1210 CONFIG_SYS_NUM_I2C_BUSES
945a18e6 1211 Hold the number of i2c buses you want to use.
3f4978c7
HS
1212
1213 CONFIG_SYS_I2C_DIRECT_BUS
1214 define this, if you don't use i2c muxes on your hardware.
1215 if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
1216 omit this define.
1217
1218 CONFIG_SYS_I2C_MAX_HOPS
1219 define how many muxes are maximal consecutively connected
1220 on one i2c bus. If you not use i2c muxes, omit this
1221 define.
1222
1223 CONFIG_SYS_I2C_BUSES
b445bbb4 1224 hold a list of buses you want to use, only used if
3f4978c7
HS
1225 CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
1226 a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
1227 CONFIG_SYS_NUM_I2C_BUSES = 9:
1228
1229 CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
1230 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
1231 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
1232 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
1233 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
1234 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
1235 {1, {I2C_NULL_HOP}}, \
1236 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
1237 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
1238 }
1239
1240 which defines
1241 bus 0 on adapter 0 without a mux
ea818dbb
HS
1242 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
1243 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
1244 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
1245 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
1246 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
3f4978c7 1247 bus 6 on adapter 1 without a mux
ea818dbb
HS
1248 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
1249 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
3f4978c7
HS
1250
1251 If you do not have i2c muxes on your board, omit this define.
1252
ce3b5d69 1253- Legacy I2C Support:
ea818dbb 1254 If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
b37c7e5e
WD
1255 then the following macros need to be defined (examples are
1256 from include/configs/lwmon.h):
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WD
1257
1258 I2C_INIT
1259
b37c7e5e 1260 (Optional). Any commands necessary to enable the I2C
43d9616c 1261 controller or configure ports.
c609719b 1262
ba56f625 1263 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
b37c7e5e 1264
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WD
1265 I2C_ACTIVE
1266
1267 The code necessary to make the I2C data line active
1268 (driven). If the data line is open collector, this
1269 define can be null.
1270
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WD
1271 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
1272
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WD
1273 I2C_TRISTATE
1274
1275 The code necessary to make the I2C data line tri-stated
1276 (inactive). If the data line is open collector, this
1277 define can be null.
1278
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WD
1279 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
1280
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WD
1281 I2C_READ
1282
472d5460
YS
1283 Code that returns true if the I2C data line is high,
1284 false if it is low.
c609719b 1285
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WD
1286 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
1287
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WD
1288 I2C_SDA(bit)
1289
472d5460
YS
1290 If <bit> is true, sets the I2C data line high. If it
1291 is false, it clears it (low).
c609719b 1292
b37c7e5e 1293 eg: #define I2C_SDA(bit) \
2535d602 1294 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
ba56f625 1295 else immr->im_cpm.cp_pbdat &= ~PB_SDA
b37c7e5e 1296
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WD
1297 I2C_SCL(bit)
1298
472d5460
YS
1299 If <bit> is true, sets the I2C clock line high. If it
1300 is false, it clears it (low).
c609719b 1301
b37c7e5e 1302 eg: #define I2C_SCL(bit) \
2535d602 1303 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
ba56f625 1304 else immr->im_cpm.cp_pbdat &= ~PB_SCL
b37c7e5e 1305
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WD
1306 I2C_DELAY
1307
1308 This delay is invoked four times per clock cycle so this
1309 controls the rate of data transfer. The data rate thus
b37c7e5e 1310 is 1 / (I2C_DELAY * 4). Often defined to be something
945af8d7
WD
1311 like:
1312
b37c7e5e 1313 #define I2C_DELAY udelay(2)
c609719b 1314
793b5726
MF
1315 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
1316
1317 If your arch supports the generic GPIO framework (asm/gpio.h),
1318 then you may alternatively define the two GPIOs that are to be
1319 used as SCL / SDA. Any of the previous I2C_xxx macros will
1320 have GPIO-based defaults assigned to them as appropriate.
1321
1322 You should define these to the GPIO value as given directly to
1323 the generic GPIO functions.
1324
6d0f6bcf 1325 CONFIG_SYS_I2C_INIT_BOARD
47cd00fa 1326
8bde7f77
WD
1327 When a board is reset during an i2c bus transfer
1328 chips might think that the current transfer is still
1329 in progress. On some boards it is possible to access
1330 the i2c SCLK line directly, either by using the
1331 processor pin as a GPIO or by having a second pin
1332 connected to the bus. If this option is defined a
1333 custom i2c_init_board() routine in boards/xxx/board.c
1334 is run early in the boot sequence.
47cd00fa 1335
bb99ad6d
BW
1336 CONFIG_I2C_MULTI_BUS
1337
1338 This option allows the use of multiple I2C buses, each of which
c0f40859
WD
1339 must have a controller. At any point in time, only one bus is
1340 active. To switch to a different bus, use the 'i2c dev' command.
bb99ad6d
BW
1341 Note that bus numbering is zero-based.
1342
6d0f6bcf 1343 CONFIG_SYS_I2C_NOPROBES
bb99ad6d
BW
1344
1345 This option specifies a list of I2C devices that will be skipped
c0f40859 1346 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
0f89c54b
PT
1347 is set, specify a list of bus-device pairs. Otherwise, specify
1348 a 1D array of device addresses
bb99ad6d
BW
1349
1350 e.g.
1351 #undef CONFIG_I2C_MULTI_BUS
c0f40859 1352 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
bb99ad6d
BW
1353
1354 will skip addresses 0x50 and 0x68 on a board with one I2C bus
1355
c0f40859 1356 #define CONFIG_I2C_MULTI_BUS
945a18e6 1357 #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
bb99ad6d
BW
1358
1359 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
1360
6d0f6bcf 1361 CONFIG_SYS_SPD_BUS_NUM
be5e6181
TT
1362
1363 If defined, then this indicates the I2C bus number for DDR SPD.
1364 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
1365
6d0f6bcf 1366 CONFIG_SYS_RTC_BUS_NUM
0dc018ec
SR
1367
1368 If defined, then this indicates the I2C bus number for the RTC.
1369 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
1370
2ac6985a
AD
1371 CONFIG_SOFT_I2C_READ_REPEATED_START
1372
1373 defining this will force the i2c_read() function in
1374 the soft_i2c driver to perform an I2C repeated start
1375 between writing the address pointer and reading the
1376 data. If this define is omitted the default behaviour
1377 of doing a stop-start sequence will be used. Most I2C
1378 devices can use either method, but some require one or
1379 the other.
be5e6181 1380
c609719b
WD
1381- SPI Support: CONFIG_SPI
1382
1383 Enables SPI driver (so far only tested with
1384 SPI EEPROM, also an instance works with Crystal A/D and
1385 D/As on the SACSng board)
1386
f659b573
HS
1387 CONFIG_SYS_SPI_MXC_WAIT
1388 Timeout for waiting until spi transfer completed.
1389 default: (CONFIG_SYS_HZ/100) /* 10 ms */
1390
0133502e 1391- FPGA Support: CONFIG_FPGA
c609719b 1392
0133502e
MF
1393 Enables FPGA subsystem.
1394
1395 CONFIG_FPGA_<vendor>
1396
1397 Enables support for specific chip vendors.
1398 (ALTERA, XILINX)
c609719b 1399
0133502e 1400 CONFIG_FPGA_<family>
c609719b 1401
0133502e
MF
1402 Enables support for FPGA family.
1403 (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
1404
1405 CONFIG_FPGA_COUNT
1406
1407 Specify the number of FPGA devices to support.
c609719b 1408
6d0f6bcf 1409 CONFIG_SYS_FPGA_PROG_FEEDBACK
c609719b 1410
8bde7f77 1411 Enable printing of hash marks during FPGA configuration.
c609719b 1412
6d0f6bcf 1413 CONFIG_SYS_FPGA_CHECK_BUSY
c609719b 1414
43d9616c
WD
1415 Enable checks on FPGA configuration interface busy
1416 status by the configuration function. This option
1417 will require a board or device specific function to
1418 be written.
c609719b
WD
1419
1420 CONFIG_FPGA_DELAY
1421
1422 If defined, a function that provides delays in the FPGA
1423 configuration driver.
1424
6d0f6bcf 1425 CONFIG_SYS_FPGA_CHECK_CTRLC
c609719b
WD
1426 Allow Control-C to interrupt FPGA configuration
1427
6d0f6bcf 1428 CONFIG_SYS_FPGA_CHECK_ERROR
c609719b 1429
43d9616c
WD
1430 Check for configuration errors during FPGA bitfile
1431 loading. For example, abort during Virtex II
1432 configuration if the INIT_B line goes low (which
1433 indicated a CRC error).
c609719b 1434
6d0f6bcf 1435 CONFIG_SYS_FPGA_WAIT_INIT
c609719b 1436
b445bbb4
JM
1437 Maximum time to wait for the INIT_B line to de-assert
1438 after PROB_B has been de-asserted during a Virtex II
43d9616c 1439 FPGA configuration sequence. The default time is 500
11ccc33f 1440 ms.
c609719b 1441
6d0f6bcf 1442 CONFIG_SYS_FPGA_WAIT_BUSY
c609719b 1443
b445bbb4 1444 Maximum time to wait for BUSY to de-assert during
11ccc33f 1445 Virtex II FPGA configuration. The default is 5 ms.
c609719b 1446
6d0f6bcf 1447 CONFIG_SYS_FPGA_WAIT_CONFIG
c609719b 1448
43d9616c 1449 Time to wait after FPGA configuration. The default is
11ccc33f 1450 200 ms.
c609719b 1451
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WD
1452- Vendor Parameter Protection:
1453
43d9616c
WD
1454 U-Boot considers the values of the environment
1455 variables "serial#" (Board Serial Number) and
7152b1d0 1456 "ethaddr" (Ethernet Address) to be parameters that
43d9616c
WD
1457 are set once by the board vendor / manufacturer, and
1458 protects these variables from casual modification by
1459 the user. Once set, these variables are read-only,
1460 and write or delete attempts are rejected. You can
11ccc33f 1461 change this behaviour:
c609719b
WD
1462
1463 If CONFIG_ENV_OVERWRITE is #defined in your config
1464 file, the write protection for vendor parameters is
47cd00fa 1465 completely disabled. Anybody can change or delete
c609719b
WD
1466 these parameters.
1467
92ac5208
JH
1468 Alternatively, if you define _both_ an ethaddr in the
1469 default env _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
11ccc33f 1470 Ethernet address is installed in the environment,
c609719b
WD
1471 which can be changed exactly ONCE by the user. [The
1472 serial# is unaffected by this, i. e. it remains
1473 read-only.]
1474
2598090b
JH
1475 The same can be accomplished in a more flexible way
1476 for any variable by configuring the type of access
1477 to allow for those variables in the ".flags" variable
1478 or define CONFIG_ENV_FLAGS_LIST_STATIC.
1479
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WD
1480- Protected RAM:
1481 CONFIG_PRAM
1482
1483 Define this variable to enable the reservation of
1484 "protected RAM", i. e. RAM which is not overwritten
1485 by U-Boot. Define CONFIG_PRAM to hold the number of
1486 kB you want to reserve for pRAM. You can overwrite
1487 this default value by defining an environment
1488 variable "pram" to the number of kB you want to
1489 reserve. Note that the board info structure will
1490 still show the full amount of RAM. If pRAM is
1491 reserved, a new environment variable "mem" will
1492 automatically be defined to hold the amount of
1493 remaining RAM in a form that can be passed as boot
1494 argument to Linux, for instance like that:
1495
fe126d8b 1496 setenv bootargs ... mem=\${mem}
c609719b
WD
1497 saveenv
1498
1499 This way you can tell Linux not to use this memory,
1500 either, which results in a memory region that will
1501 not be affected by reboots.
1502
1503 *WARNING* If your board configuration uses automatic
1504 detection of the RAM size, you must make sure that
1505 this memory test is non-destructive. So far, the
1506 following board configurations are known to be
1507 "pRAM-clean":
1508
5b8e76c3 1509 IVMS8, IVML24, SPD8xx,
1b0757ec 1510 HERMES, IP860, RPXlite, LWMON,
2eb48ff7 1511 FLAGADM
c609719b
WD
1512
1513- Error Recovery:
c609719b
WD
1514 Note:
1515
8bde7f77
WD
1516 In the current implementation, the local variables
1517 space and global environment variables space are
1518 separated. Local variables are those you define by
1519 simply typing `name=value'. To access a local
1520 variable later on, you have write `$name' or
1521 `${name}'; to execute the contents of a variable
1522 directly type `$name' at the command prompt.
c609719b 1523
43d9616c
WD
1524 Global environment variables are those you use
1525 setenv/printenv to work with. To run a command stored
1526 in such a variable, you need to use the run command,
1527 and you must not use the '$' sign to access them.
c609719b
WD
1528
1529 To store commands and special characters in a
1530 variable, please use double quotation marks
1531 surrounding the whole text of the variable, instead
1532 of the backslashes before semicolons and special
1533 symbols.
1534
b445bbb4 1535- Command Line Editing and History:
f3b267b3
MV
1536 CONFIG_CMDLINE_PS_SUPPORT
1537
1538 Enable support for changing the command prompt string
1539 at run-time. Only static string is supported so far.
1540 The string is obtained from environment variables PS1
1541 and PS2.
1542
a8c7c708 1543- Default Environment:
c609719b
WD
1544 CONFIG_EXTRA_ENV_SETTINGS
1545
43d9616c
WD
1546 Define this to contain any number of null terminated
1547 strings (variable = value pairs) that will be part of
7152b1d0 1548 the default environment compiled into the boot image.
2262cfee 1549
43d9616c
WD
1550 For example, place something like this in your
1551 board's config file:
c609719b
WD
1552
1553 #define CONFIG_EXTRA_ENV_SETTINGS \
1554 "myvar1=value1\0" \
1555 "myvar2=value2\0"
1556
43d9616c
WD
1557 Warning: This method is based on knowledge about the
1558 internal format how the environment is stored by the
1559 U-Boot code. This is NOT an official, exported
1560 interface! Although it is unlikely that this format
7152b1d0 1561 will change soon, there is no guarantee either.
c609719b
WD
1562 You better know what you are doing here.
1563
43d9616c
WD
1564 Note: overly (ab)use of the default environment is
1565 discouraged. Make sure to check other ways to preset
74de7aef 1566 the environment like the "source" command or the
43d9616c 1567 boot command first.
c609719b 1568
06fd8538
SG
1569 CONFIG_DELAY_ENVIRONMENT
1570
1571 Normally the environment is loaded when the board is
b445bbb4 1572 initialised so that it is available to U-Boot. This inhibits
06fd8538
SG
1573 that so that the environment is not available until
1574 explicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL
1575 this is instead controlled by the value of
1576 /config/load-environment.
1577
4cf2609b
WD
1578 CONFIG_STANDALONE_LOAD_ADDR
1579
6feff899
WD
1580 This option defines a board specific value for the
1581 address where standalone program gets loaded, thus
1582 overwriting the architecture dependent default
4cf2609b
WD
1583 settings.
1584
1585- Frame Buffer Address:
1586 CONFIG_FB_ADDR
1587
1588 Define CONFIG_FB_ADDR if you want to use specific
44a53b57
WD
1589 address for frame buffer. This is typically the case
1590 when using a graphics controller has separate video
1591 memory. U-Boot will then place the frame buffer at
1592 the given address instead of dynamically reserving it
1593 in system RAM by calling lcd_setmem(), which grabs
1594 the memory for the frame buffer depending on the
1595 configured panel size.
4cf2609b
WD
1596
1597 Please see board_init_f function.
1598
cccfc2ab
DZ
1599- Automatic software updates via TFTP server
1600 CONFIG_UPDATE_TFTP
1601 CONFIG_UPDATE_TFTP_CNT_MAX
1602 CONFIG_UPDATE_TFTP_MSEC_MAX
1603
1604 These options enable and control the auto-update feature;
1605 for a more detailed description refer to doc/README.update.
1606
1607- MTD Support (mtdparts command, UBI support)
ff94bc40
HS
1608 CONFIG_MTD_UBI_WL_THRESHOLD
1609 This parameter defines the maximum difference between the highest
1610 erase counter value and the lowest erase counter value of eraseblocks
1611 of UBI devices. When this threshold is exceeded, UBI starts performing
1612 wear leveling by means of moving data from eraseblock with low erase
1613 counter to eraseblocks with high erase counter.
1614
1615 The default value should be OK for SLC NAND flashes, NOR flashes and
1616 other flashes which have eraseblock life-cycle 100000 or more.
1617 However, in case of MLC NAND flashes which typically have eraseblock
1618 life-cycle less than 10000, the threshold should be lessened (e.g.,
1619 to 128 or 256, although it does not have to be power of 2).
1620
1621 default: 4096
c654b517 1622
ff94bc40
HS
1623 CONFIG_MTD_UBI_BEB_LIMIT
1624 This option specifies the maximum bad physical eraseblocks UBI
1625 expects on the MTD device (per 1024 eraseblocks). If the
1626 underlying flash does not admit of bad eraseblocks (e.g. NOR
1627 flash), this value is ignored.
1628
1629 NAND datasheets often specify the minimum and maximum NVM
1630 (Number of Valid Blocks) for the flashes' endurance lifetime.
1631 The maximum expected bad eraseblocks per 1024 eraseblocks
1632 then can be calculated as "1024 * (1 - MinNVB / MaxNVB)",
1633 which gives 20 for most NANDs (MaxNVB is basically the total
1634 count of eraseblocks on the chip).
1635
1636 To put it differently, if this value is 20, UBI will try to
1637 reserve about 1.9% of physical eraseblocks for bad blocks
1638 handling. And that will be 1.9% of eraseblocks on the entire
1639 NAND chip, not just the MTD partition UBI attaches. This means
1640 that if you have, say, a NAND flash chip admits maximum 40 bad
1641 eraseblocks, and it is split on two MTD partitions of the same
1642 size, UBI will reserve 40 eraseblocks when attaching a
1643 partition.
1644
1645 default: 20
1646
1647 CONFIG_MTD_UBI_FASTMAP
1648 Fastmap is a mechanism which allows attaching an UBI device
1649 in nearly constant time. Instead of scanning the whole MTD device it
1650 only has to locate a checkpoint (called fastmap) on the device.
1651 The on-flash fastmap contains all information needed to attach
1652 the device. Using fastmap makes only sense on large devices where
1653 attaching by scanning takes long. UBI will not automatically install
1654 a fastmap on old images, but you can set the UBI parameter
1655 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT to 1 if you want so. Please note
1656 that fastmap-enabled images are still usable with UBI implementations
1657 without fastmap support. On typical flash devices the whole fastmap
1658 fits into one PEB. UBI will reserve PEBs to hold two fastmaps.
1659
1660 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT
1661 Set this parameter to enable fastmap automatically on images
1662 without a fastmap.
1663 default: 0
1664
0195a7bb
HS
1665 CONFIG_MTD_UBI_FM_DEBUG
1666 Enable UBI fastmap debug
1667 default: 0
1668
6a11cf48 1669- SPL framework
04e5ae79
WD
1670 CONFIG_SPL
1671 Enable building of SPL globally.
6a11cf48 1672
6ebc3461
AA
1673 CONFIG_SPL_MAX_FOOTPRINT
1674 Maximum size in memory allocated to the SPL, BSS included.
1675 When defined, the linker checks that the actual memory
1676 used by SPL from _start to __bss_end does not exceed it.
8960af8b 1677 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
6ebc3461
AA
1678 must not be both defined at the same time.
1679
95579793 1680 CONFIG_SPL_MAX_SIZE
6ebc3461
AA
1681 Maximum size of the SPL image (text, data, rodata, and
1682 linker lists sections), BSS excluded.
1683 When defined, the linker checks that the actual size does
1684 not exceed it.
95579793 1685
94a45bb1
SW
1686 CONFIG_SPL_RELOC_TEXT_BASE
1687 Address to relocate to. If unspecified, this is equal to
1688 CONFIG_SPL_TEXT_BASE (i.e. no relocation is done).
1689
95579793
TR
1690 CONFIG_SPL_BSS_START_ADDR
1691 Link address for the BSS within the SPL binary.
1692
1693 CONFIG_SPL_BSS_MAX_SIZE
6ebc3461
AA
1694 Maximum size in memory allocated to the SPL BSS.
1695 When defined, the linker checks that the actual memory used
1696 by SPL from __bss_start to __bss_end does not exceed it.
8960af8b 1697 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
6ebc3461 1698 must not be both defined at the same time.
95579793
TR
1699
1700 CONFIG_SPL_STACK
1701 Adress of the start of the stack SPL will use
1702
8c80eb3b
AA
1703 CONFIG_SPL_PANIC_ON_RAW_IMAGE
1704 When defined, SPL will panic() if the image it has
1705 loaded does not have a signature.
1706 Defining this is useful when code which loads images
1707 in SPL cannot guarantee that absolutely all read errors
1708 will be caught.
1709 An example is the LPC32XX MLC NAND driver, which will
1710 consider that a completely unreadable NAND block is bad,
1711 and thus should be skipped silently.
1712
94a45bb1
SW
1713 CONFIG_SPL_RELOC_STACK
1714 Adress of the start of the stack SPL will use after
1715 relocation. If unspecified, this is equal to
1716 CONFIG_SPL_STACK.
1717
95579793
TR
1718 CONFIG_SYS_SPL_MALLOC_START
1719 Starting address of the malloc pool used in SPL.
9ac4fc82
FE
1720 When this option is set the full malloc is used in SPL and
1721 it is set up by spl_init() and before that, the simple malloc()
1722 can be used if CONFIG_SYS_MALLOC_F is defined.
95579793
TR
1723
1724 CONFIG_SYS_SPL_MALLOC_SIZE
1725 The size of the malloc pool used in SPL.
6a11cf48 1726
861a86f4
TR
1727 CONFIG_SPL_DISPLAY_PRINT
1728 For ARM, enable an optional function to print more information
1729 about the running system.
1730
4b919725
SW
1731 CONFIG_SPL_INIT_MINIMAL
1732 Arch init code should be built for a very small image
1733
2b75b0ad
PK
1734 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
1735 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
1736 Sector and number of sectors to load kernel argument
1737 parameters from when MMC is being used in raw mode
1738 (for falcon mode)
1739
fae81c72
GG
1740 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
1741 Filename to read to load U-Boot when reading from filesystem
1742
1743 CONFIG_SPL_FS_LOAD_KERNEL_NAME
7ad2cc79 1744 Filename to read to load kernel uImage when reading
fae81c72 1745 from filesystem (for Falcon mode)
7ad2cc79 1746
fae81c72 1747 CONFIG_SPL_FS_LOAD_ARGS_NAME
7ad2cc79 1748 Filename to read to load kernel argument parameters
fae81c72 1749 when reading from filesystem (for Falcon mode)
7ad2cc79 1750
06f60ae3
SW
1751 CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
1752 Set this for NAND SPL on PPC mpc83xx targets, so that
1753 start.S waits for the rest of the SPL to load before
1754 continuing (the hardware starts execution after just
1755 loading the first page rather than the full 4K).
1756
651fcf60
PK
1757 CONFIG_SPL_SKIP_RELOCATE
1758 Avoid SPL relocation
1759
6f4e7d3c
TG
1760 CONFIG_SPL_UBI
1761 Support for a lightweight UBI (fastmap) scanner and
1762 loader
1763
0c3117b1
HS
1764 CONFIG_SPL_NAND_RAW_ONLY
1765 Support to boot only raw u-boot.bin images. Use this only
1766 if you need to save space.
1767
7c8eea59
YZ
1768 CONFIG_SPL_COMMON_INIT_DDR
1769 Set for common ddr init with serial presence detect in
1770 SPL binary.
1771
95579793
TR
1772 CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
1773 CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
1774 CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
1775 CONFIG_SYS_NAND_ECCPOS, CONFIG_SYS_NAND_ECCSIZE,
1776 CONFIG_SYS_NAND_ECCBYTES
1777 Defines the size and behavior of the NAND that SPL uses
7d4b7955 1778 to read U-Boot
95579793 1779
7d4b7955
SW
1780 CONFIG_SYS_NAND_U_BOOT_DST
1781 Location in memory to load U-Boot to
1782
1783 CONFIG_SYS_NAND_U_BOOT_SIZE
1784 Size of image to load
95579793
TR
1785
1786 CONFIG_SYS_NAND_U_BOOT_START
7d4b7955 1787 Entry point in loaded image to jump to
95579793
TR
1788
1789 CONFIG_SYS_NAND_HW_ECC_OOBFIRST
1790 Define this if you need to first read the OOB and then the
b445bbb4 1791 data. This is used, for example, on davinci platforms.
95579793 1792
c57b953d
PM
1793 CONFIG_SPL_RAM_DEVICE
1794 Support for running image already present in ram, in SPL binary
6a11cf48 1795
74752baa 1796 CONFIG_SPL_PAD_TO
6113d3f2
BT
1797 Image offset to which the SPL should be padded before appending
1798 the SPL payload. By default, this is defined as
1799 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
1800 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
1801 payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
74752baa 1802
ca2fca22
SW
1803 CONFIG_SPL_TARGET
1804 Final target image containing SPL and payload. Some SPLs
1805 use an arch-specific makefile fragment instead, for
1806 example if more than one image needs to be produced.
1807
b527b9c6 1808 CONFIG_SPL_FIT_PRINT
87ebee39
SG
1809 Printing information about a FIT image adds quite a bit of
1810 code to SPL. So this is normally disabled in SPL. Use this
1811 option to re-enable it. This will affect the output of the
1812 bootm command when booting a FIT image.
1813
3aa29de0
YZ
1814- TPL framework
1815 CONFIG_TPL
1816 Enable building of TPL globally.
1817
1818 CONFIG_TPL_PAD_TO
1819 Image offset to which the TPL should be padded before appending
1820 the TPL payload. By default, this is defined as
93e14596
WD
1821 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
1822 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
1823 payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
3aa29de0 1824
a8c7c708
WD
1825- Interrupt support (PPC):
1826
d4ca31c4
WD
1827 There are common interrupt_init() and timer_interrupt()
1828 for all PPC archs. interrupt_init() calls interrupt_init_cpu()
11ccc33f 1829 for CPU specific initialization. interrupt_init_cpu()
d4ca31c4 1830 should set decrementer_count to appropriate value. If
11ccc33f 1831 CPU resets decrementer automatically after interrupt
d4ca31c4 1832 (ppc4xx) it should set decrementer_count to zero.
11ccc33f 1833 timer_interrupt() calls timer_interrupt_cpu() for CPU
d4ca31c4
WD
1834 specific handling. If board has watchdog / status_led
1835 / other_activity_monitor it works automatically from
1836 general timer_interrupt().
a8c7c708 1837
c609719b 1838
9660e442
HR
1839Board initialization settings:
1840------------------------------
1841
1842During Initialization u-boot calls a number of board specific functions
1843to allow the preparation of board specific prerequisites, e.g. pin setup
1844before drivers are initialized. To enable these callbacks the
1845following configuration macros have to be defined. Currently this is
1846architecture specific, so please check arch/your_architecture/lib/board.c
1847typically in board_init_f() and board_init_r().
1848
1849- CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f()
1850- CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r()
1851- CONFIG_BOARD_LATE_INIT: Call board_late_init()
c609719b 1852
c609719b
WD
1853Configuration Settings:
1854-----------------------
1855
4d979bfd 1856- MEM_SUPPORT_64BIT_DATA: Defined automatically if compiled as 64-bit.
4d1fd7f1
YS
1857 Optionally it can be defined to support 64-bit memory commands.
1858
6d0f6bcf 1859- CONFIG_SYS_LONGHELP: Defined when you want long help messages included;
c609719b
WD
1860 undefine this when you're short of memory.
1861
2fb2604d
PT
1862- CONFIG_SYS_HELP_CMD_WIDTH: Defined when you want to override the default
1863 width of the commands listed in the 'help' command output.
1864
6d0f6bcf 1865- CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to
c609719b
WD
1866 prompt for user input.
1867
6d0f6bcf 1868- CONFIG_SYS_CBSIZE: Buffer size for input from the Console
c609719b 1869
6d0f6bcf 1870- CONFIG_SYS_PBSIZE: Buffer size for Console output
c609719b 1871
6d0f6bcf 1872- CONFIG_SYS_MAXARGS: max. Number of arguments accepted for monitor commands
c609719b 1873
6d0f6bcf 1874- CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to
c609719b
WD
1875 the application (usually a Linux kernel) when it is
1876 booted
1877
6d0f6bcf 1878- CONFIG_SYS_BAUDRATE_TABLE:
c609719b
WD
1879 List of legal baudrate settings for this board.
1880
e8149522 1881- CONFIG_SYS_MEM_RESERVE_SECURE
e61a7534 1882 Only implemented for ARMv8 for now.
e8149522
YS
1883 If defined, the size of CONFIG_SYS_MEM_RESERVE_SECURE memory
1884 is substracted from total RAM and won't be reported to OS.
1885 This memory can be used as secure memory. A variable
e61a7534 1886 gd->arch.secure_ram is used to track the location. In systems
e8149522
YS
1887 the RAM base is not zero, or RAM is divided into banks,
1888 this variable needs to be recalcuated to get the address.
1889
aabd7ddb 1890- CONFIG_SYS_MEM_TOP_HIDE:
6d0f6bcf 1891 If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header,
14f73ca6 1892 this specified memory area will get subtracted from the top
11ccc33f 1893 (end) of RAM and won't get "touched" at all by U-Boot. By
14f73ca6
SR
1894 fixing up gd->ram_size the Linux kernel should gets passed
1895 the now "corrected" memory size and won't touch it either.
1896 This should work for arch/ppc and arch/powerpc. Only Linux
5e12e75d 1897 board ports in arch/powerpc with bootwrapper support that
14f73ca6 1898 recalculate the memory size from the SDRAM controller setup
5e12e75d 1899 will have to get fixed in Linux additionally.
14f73ca6
SR
1900
1901 This option can be used as a workaround for the 440EPx/GRx
1902 CHIP 11 errata where the last 256 bytes in SDRAM shouldn't
1903 be touched.
1904
1905 WARNING: Please make sure that this value is a multiple of
1906 the Linux page size (normally 4k). If this is not the case,
1907 then the end address of the Linux memory will be located at a
1908 non page size aligned address and this could cause major
1909 problems.
1910
6d0f6bcf 1911- CONFIG_SYS_LOADS_BAUD_CHANGE:
c609719b
WD
1912 Enable temporary baudrate change while serial download
1913
6d0f6bcf 1914- CONFIG_SYS_SDRAM_BASE:
c609719b
WD
1915 Physical start address of SDRAM. _Must_ be 0 here.
1916
6d0f6bcf 1917- CONFIG_SYS_FLASH_BASE:
c609719b
WD
1918 Physical start address of Flash memory.
1919
6d0f6bcf 1920- CONFIG_SYS_MONITOR_LEN:
8bde7f77
WD
1921 Size of memory reserved for monitor code, used to
1922 determine _at_compile_time_ (!) if the environment is
1923 embedded within the U-Boot image, or in a separate
1924 flash sector.
c609719b 1925
6d0f6bcf 1926- CONFIG_SYS_MALLOC_LEN:
c609719b
WD
1927 Size of DRAM reserved for malloc() use.
1928
d59476b6
SG
1929- CONFIG_SYS_MALLOC_F_LEN
1930 Size of the malloc() pool for use before relocation. If
1931 this is defined, then a very simple malloc() implementation
1932 will become available before relocation. The address is just
1933 below the global data, and the stack is moved down to make
1934 space.
1935
1936 This feature allocates regions with increasing addresses
1937 within the region. calloc() is supported, but realloc()
1938 is not available. free() is supported but does nothing.
b445bbb4 1939 The memory will be freed (or in fact just forgotten) when
d59476b6
SG
1940 U-Boot relocates itself.
1941
38687ae6
SG
1942- CONFIG_SYS_MALLOC_SIMPLE
1943 Provides a simple and small malloc() and calloc() for those
1944 boards which do not use the full malloc in SPL (which is
1945 enabled with CONFIG_SYS_SPL_MALLOC_START).
1946
1dfdd9ba
TR
1947- CONFIG_SYS_NONCACHED_MEMORY:
1948 Size of non-cached memory area. This area of memory will be
1949 typically located right below the malloc() area and mapped
1950 uncached in the MMU. This is useful for drivers that would
1951 otherwise require a lot of explicit cache maintenance. For
1952 some drivers it's also impossible to properly maintain the
1953 cache. For example if the regions that need to be flushed
1954 are not a multiple of the cache-line size, *and* padding
1955 cannot be allocated between the regions to align them (i.e.
1956 if the HW requires a contiguous array of regions, and the
1957 size of each region is not cache-aligned), then a flush of
1958 one region may result in overwriting data that hardware has
1959 written to another region in the same cache-line. This can
1960 happen for example in network drivers where descriptors for
1961 buffers are typically smaller than the CPU cache-line (e.g.
1962 16 bytes vs. 32 or 64 bytes).
1963
1964 Non-cached memory is only supported on 32-bit ARM at present.
1965
6d0f6bcf 1966- CONFIG_SYS_BOOTM_LEN:
15940c9a
SR
1967 Normally compressed uImages are limited to an
1968 uncompressed size of 8 MBytes. If this is not enough,
6d0f6bcf 1969 you can define CONFIG_SYS_BOOTM_LEN in your board config file
15940c9a
SR
1970 to adjust this setting to your needs.
1971
6d0f6bcf 1972- CONFIG_SYS_BOOTMAPSZ:
c609719b
WD
1973 Maximum size of memory mapped by the startup code of
1974 the Linux kernel; all data that must be processed by
7d721e34
BS
1975 the Linux kernel (bd_info, boot arguments, FDT blob if
1976 used) must be put below this limit, unless "bootm_low"
1bce2aeb 1977 environment variable is defined and non-zero. In such case
7d721e34 1978 all data for the Linux kernel must be between "bootm_low"
c0f40859 1979 and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. The environment
c3624e6e
GL
1980 variable "bootm_mapsize" will override the value of
1981 CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined,
1982 then the value in "bootm_size" will be used instead.
c609719b 1983
fca43cc8
JR
1984- CONFIG_SYS_BOOT_RAMDISK_HIGH:
1985 Enable initrd_high functionality. If defined then the
1986 initrd_high feature is enabled and the bootm ramdisk subcommand
1987 is enabled.
1988
1989- CONFIG_SYS_BOOT_GET_CMDLINE:
1990 Enables allocating and saving kernel cmdline in space between
1991 "bootm_low" and "bootm_low" + BOOTMAPSZ.
1992
1993- CONFIG_SYS_BOOT_GET_KBD:
1994 Enables allocating and saving a kernel copy of the bd_info in
1995 space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
1996
6d0f6bcf 1997- CONFIG_SYS_MAX_FLASH_SECT:
c609719b
WD
1998 Max number of sectors on a Flash chip
1999
6d0f6bcf 2000- CONFIG_SYS_FLASH_ERASE_TOUT:
c609719b
WD
2001 Timeout for Flash erase operations (in ms)
2002
6d0f6bcf 2003- CONFIG_SYS_FLASH_WRITE_TOUT:
c609719b
WD
2004 Timeout for Flash write operations (in ms)
2005
6d0f6bcf 2006- CONFIG_SYS_FLASH_LOCK_TOUT
8564acf9
WD
2007 Timeout for Flash set sector lock bit operation (in ms)
2008
6d0f6bcf 2009- CONFIG_SYS_FLASH_UNLOCK_TOUT
8564acf9
WD
2010 Timeout for Flash clear lock bits operation (in ms)
2011
6d0f6bcf 2012- CONFIG_SYS_FLASH_PROTECTION
8564acf9
WD
2013 If defined, hardware flash sectors protection is used
2014 instead of U-Boot software protection.
2015
6d0f6bcf 2016- CONFIG_SYS_DIRECT_FLASH_TFTP:
c609719b
WD
2017
2018 Enable TFTP transfers directly to flash memory;
2019 without this option such a download has to be
2020 performed in two steps: (1) download to RAM, and (2)
2021 copy from RAM to flash.
2022
2023 The two-step approach is usually more reliable, since
2024 you can check if the download worked before you erase
11ccc33f
MZ
2025 the flash, but in some situations (when system RAM is
2026 too limited to allow for a temporary copy of the
c609719b
WD
2027 downloaded image) this option may be very useful.
2028
6d0f6bcf 2029- CONFIG_SYS_FLASH_CFI:
43d9616c 2030 Define if the flash driver uses extra elements in the
5653fc33
WD
2031 common flash structure for storing flash geometry.
2032
00b1883a 2033- CONFIG_FLASH_CFI_DRIVER
5653fc33
WD
2034 This option also enables the building of the cfi_flash driver
2035 in the drivers directory
c609719b 2036
91809ed5
PZ
2037- CONFIG_FLASH_CFI_MTD
2038 This option enables the building of the cfi_mtd driver
2039 in the drivers directory. The driver exports CFI flash
2040 to the MTD layer.
2041
6d0f6bcf 2042- CONFIG_SYS_FLASH_USE_BUFFER_WRITE
96ef831f
GL
2043 Use buffered writes to flash.
2044
2045- CONFIG_FLASH_SPANSION_S29WS_N
2046 s29ws-n MirrorBit flash has non-standard addresses for buffered
2047 write commands.
2048
6d0f6bcf 2049- CONFIG_SYS_FLASH_QUIET_TEST
5568e613
SR
2050 If this option is defined, the common CFI flash doesn't
2051 print it's warning upon not recognized FLASH banks. This
2052 is useful, if some of the configured banks are only
2053 optionally available.
2054
9a042e9c
JVB
2055- CONFIG_FLASH_SHOW_PROGRESS
2056 If defined (must be an integer), print out countdown
2057 digits and dots. Recommended value: 45 (9..1) for 80
2058 column displays, 15 (3..1) for 40 column displays.
2059
352ef3f1
SR
2060- CONFIG_FLASH_VERIFY
2061 If defined, the content of the flash (destination) is compared
2062 against the source after the write operation. An error message
2063 will be printed when the contents are not identical.
2064 Please note that this option is useless in nearly all cases,
2065 since such flash programming errors usually are detected earlier
2066 while unprotecting/erasing/programming. Please only enable
2067 this option if you really know what you are doing.
2068
ea882baf
WD
2069- CONFIG_ENV_MAX_ENTRIES
2070
071bc923
WD
2071 Maximum number of entries in the hash table that is used
2072 internally to store the environment settings. The default
2073 setting is supposed to be generous and should work in most
2074 cases. This setting can be used to tune behaviour; see
2075 lib/hashtable.c for details.
ea882baf 2076
2598090b
JH
2077- CONFIG_ENV_FLAGS_LIST_DEFAULT
2078- CONFIG_ENV_FLAGS_LIST_STATIC
1bce2aeb 2079 Enable validation of the values given to environment variables when
2598090b
JH
2080 calling env set. Variables can be restricted to only decimal,
2081 hexadecimal, or boolean. If CONFIG_CMD_NET is also defined,
2082 the variables can also be restricted to IP address or MAC address.
2083
2084 The format of the list is:
2085 type_attribute = [s|d|x|b|i|m]
b445bbb4
JM
2086 access_attribute = [a|r|o|c]
2087 attributes = type_attribute[access_attribute]
2598090b
JH
2088 entry = variable_name[:attributes]
2089 list = entry[,list]
2090
2091 The type attributes are:
2092 s - String (default)
2093 d - Decimal
2094 x - Hexadecimal
2095 b - Boolean ([1yYtT|0nNfF])
2096 i - IP address
2097 m - MAC address
2098
267541f7
JH
2099 The access attributes are:
2100 a - Any (default)
2101 r - Read-only
2102 o - Write-once
2103 c - Change-default
2104
2598090b
JH
2105 - CONFIG_ENV_FLAGS_LIST_DEFAULT
2106 Define this to a list (string) to define the ".flags"
b445bbb4 2107 environment variable in the default or embedded environment.
2598090b
JH
2108
2109 - CONFIG_ENV_FLAGS_LIST_STATIC
2110 Define this to a list (string) to define validation that
2111 should be done if an entry is not found in the ".flags"
2112 environment variable. To override a setting in the static
2113 list, simply add an entry for the same variable name to the
2114 ".flags" variable.
2115
bdf1fe4e
JH
2116 If CONFIG_REGEX is defined, the variable_name above is evaluated as a
2117 regular expression. This allows multiple variables to define the same
2118 flags without explicitly listing them for each variable.
2119
c609719b
WD
2120The following definitions that deal with the placement and management
2121of environment data (variable area); in general, we support the
2122following configurations:
2123
c3eb3fe4
MF
2124- CONFIG_BUILD_ENVCRC:
2125
2126 Builds up envcrc with the target environment so that external utils
2127 may easily extract it and embed it in final U-Boot images.
2128
c609719b 2129BE CAREFUL! The first access to the environment happens quite early
b445bbb4 2130in U-Boot initialization (when we try to get the setting of for the
11ccc33f 2131console baudrate). You *MUST* have mapped your NVRAM area then, or
c609719b
WD
2132U-Boot will hang.
2133
2134Please note that even with NVRAM we still use a copy of the
2135environment in RAM: we could work on NVRAM directly, but we want to
2136keep settings there always unmodified except somebody uses "saveenv"
2137to save the current settings.
2138
0a85a9e7
LG
2139BE CAREFUL! For some special cases, the local device can not use
2140"saveenv" command. For example, the local device will get the
fc54c7fa
LG
2141environment stored in a remote NOR flash by SRIO or PCIE link,
2142but it can not erase, write this NOR flash by SRIO or PCIE interface.
0a85a9e7 2143
b74ab737
GL
2144- CONFIG_NAND_ENV_DST
2145
2146 Defines address in RAM to which the nand_spl code should copy the
2147 environment. If redundant environment is used, it will be copied to
2148 CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE.
2149
e881cb56 2150Please note that the environment is read-only until the monitor
c609719b 2151has been relocated to RAM and a RAM copy of the environment has been
00caae6d 2152created; also, when using EEPROM you will have to use env_get_f()
c609719b
WD
2153until then to read environment variables.
2154
85ec0bcc
WD
2155The environment is protected by a CRC32 checksum. Before the monitor
2156is relocated into RAM, as a result of a bad CRC you will be working
2157with the compiled-in default environment - *silently*!!! [This is
2158necessary, because the first environment variable we need is the
2159"baudrate" setting for the console - if we have a bad CRC, we don't
2160have any device yet where we could complain.]
c609719b
WD
2161
2162Note: once the monitor has been relocated, then it will complain if
2163the default environment is used; a new CRC is computed as soon as you
85ec0bcc 2164use the "saveenv" command to store a valid environment.
c609719b 2165
6d0f6bcf 2166- CONFIG_SYS_FAULT_MII_ADDR:
42d1f039 2167 MII address of the PHY to check for the Ethernet link state.
c609719b 2168
f5675aa5
RM
2169- CONFIG_NS16550_MIN_FUNCTIONS:
2170 Define this if you desire to only have use of the NS16550_init
2171 and NS16550_putc functions for the serial driver located at
2172 drivers/serial/ns16550.c. This option is useful for saving
2173 space for already greatly restricted images, including but not
2174 limited to NAND_SPL configurations.
2175
b2b92f53
SG
2176- CONFIG_DISPLAY_BOARDINFO
2177 Display information about the board that U-Boot is running on
2178 when U-Boot starts up. The board function checkboard() is called
2179 to do this.
2180
e2e3e2b1
SG
2181- CONFIG_DISPLAY_BOARDINFO_LATE
2182 Similar to the previous option, but display this information
2183 later, once stdio is running and output goes to the LCD, if
2184 present.
2185
feb85801
SS
2186- CONFIG_BOARD_SIZE_LIMIT:
2187 Maximum size of the U-Boot image. When defined, the
2188 build system checks that the actual size does not
2189 exceed it.
2190
c609719b 2191Low Level (hardware related) configuration options:
dc7c9a1a 2192---------------------------------------------------
c609719b 2193
6d0f6bcf 2194- CONFIG_SYS_CACHELINE_SIZE:
c609719b
WD
2195 Cache Line Size of the CPU.
2196
e46fedfe
TT
2197- CONFIG_SYS_CCSRBAR_DEFAULT:
2198 Default (power-on reset) physical address of CCSR on Freescale
2199 PowerPC SOCs.
2200
2201- CONFIG_SYS_CCSRBAR:
2202 Virtual address of CCSR. On a 32-bit build, this is typically
2203 the same value as CONFIG_SYS_CCSRBAR_DEFAULT.
2204
e46fedfe
TT
2205- CONFIG_SYS_CCSRBAR_PHYS:
2206 Physical address of CCSR. CCSR can be relocated to a new
2207 physical address, if desired. In this case, this macro should
c0f40859 2208 be set to that address. Otherwise, it should be set to the
e46fedfe
TT
2209 same value as CONFIG_SYS_CCSRBAR_DEFAULT. For example, CCSR
2210 is typically relocated on 36-bit builds. It is recommended
2211 that this macro be defined via the _HIGH and _LOW macros:
2212
2213 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH
2214 * 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW)
2215
2216- CONFIG_SYS_CCSRBAR_PHYS_HIGH:
4cf2609b
WD
2217 Bits 33-36 of CONFIG_SYS_CCSRBAR_PHYS. This value is typically
2218 either 0 (32-bit build) or 0xF (36-bit build). This macro is
e46fedfe
TT
2219 used in assembly code, so it must not contain typecasts or
2220 integer size suffixes (e.g. "ULL").
2221
2222- CONFIG_SYS_CCSRBAR_PHYS_LOW:
2223 Lower 32-bits of CONFIG_SYS_CCSRBAR_PHYS. This macro is
2224 used in assembly code, so it must not contain typecasts or
2225 integer size suffixes (e.g. "ULL").
2226
2227- CONFIG_SYS_CCSR_DO_NOT_RELOCATE:
2228 If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be
2229 forced to a value that ensures that CCSR is not relocated.
2230
6d0f6bcf 2231- CONFIG_SYS_IMMR: Physical address of the Internal Memory.
efe2a4d5 2232 DO NOT CHANGE unless you know exactly what you're
907208c4 2233 doing! (11-4) [MPC8xx systems only]
c609719b 2234
6d0f6bcf 2235- CONFIG_SYS_INIT_RAM_ADDR:
c609719b 2236
7152b1d0 2237 Start address of memory area that can be used for
c609719b
WD
2238 initial data and stack; please note that this must be
2239 writable memory that is working WITHOUT special
2240 initialization, i. e. you CANNOT use normal RAM which
2241 will become available only after programming the
2242 memory controller and running certain initialization
2243 sequences.
2244
2245 U-Boot uses the following memory types:
907208c4 2246 - MPC8xx: IMMR (internal memory of the CPU)
c609719b 2247
6d0f6bcf 2248- CONFIG_SYS_GBL_DATA_OFFSET:
c609719b
WD
2249
2250 Offset of the initial data structure in the memory
6d0f6bcf
JCPV
2251 area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually
2252 CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial
c609719b 2253 data is located at the end of the available space
553f0982 2254 (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE -
acd51f9d 2255 GENERATED_GBL_DATA_SIZE), and the initial stack is just
6d0f6bcf
JCPV
2256 below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +
2257 CONFIG_SYS_GBL_DATA_OFFSET) downward.
c609719b
WD
2258
2259 Note:
2260 On the MPC824X (or other systems that use the data
2261 cache for initial memory) the address chosen for
6d0f6bcf 2262 CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must
c609719b
WD
2263 point to an otherwise UNUSED address space between
2264 the top of RAM and the start of the PCI space.
2265
6d0f6bcf 2266- CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27)
c609719b 2267
6d0f6bcf 2268- CONFIG_SYS_OR_TIMING_SDRAM:
c609719b
WD
2269 SDRAM timing
2270
6d0f6bcf 2271- CONFIG_SYS_MAMR_PTA:
c609719b
WD
2272 periodic timer for refresh
2273
a09b9b68
KG
2274- CONFIG_SYS_SRIO:
2275 Chip has SRIO or not
2276
2277- CONFIG_SRIO1:
2278 Board has SRIO 1 port available
2279
2280- CONFIG_SRIO2:
2281 Board has SRIO 2 port available
2282
c8b28152
LG
2283- CONFIG_SRIO_PCIE_BOOT_MASTER
2284 Board can support master function for Boot from SRIO and PCIE
2285
a09b9b68
KG
2286- CONFIG_SYS_SRIOn_MEM_VIRT:
2287 Virtual Address of SRIO port 'n' memory region
2288
62f9b654 2289- CONFIG_SYS_SRIOn_MEM_PHYxS:
a09b9b68
KG
2290 Physical Address of SRIO port 'n' memory region
2291
2292- CONFIG_SYS_SRIOn_MEM_SIZE:
2293 Size of SRIO port 'n' memory region
2294
66bd1846
FE
2295- CONFIG_SYS_NAND_BUSWIDTH_16BIT
2296 Defined to tell the NAND controller that the NAND chip is using
2297 a 16 bit bus.
2298 Not all NAND drivers use this symbol.
a430e916 2299 Example of drivers that use it:
a430fa06
MR
2300 - drivers/mtd/nand/raw/ndfc.c
2301 - drivers/mtd/nand/raw/mxc_nand.c
eced4626
AW
2302
2303- CONFIG_SYS_NDFC_EBC0_CFG
2304 Sets the EBC0_CFG register for the NDFC. If not defined
2305 a default value will be used.
2306
bb99ad6d 2307- CONFIG_SPD_EEPROM
218ca724
WD
2308 Get DDR timing information from an I2C EEPROM. Common
2309 with pluggable memory modules such as SODIMMs
2310
bb99ad6d
BW
2311 SPD_EEPROM_ADDRESS
2312 I2C address of the SPD EEPROM
2313
6d0f6bcf 2314- CONFIG_SYS_SPD_BUS_NUM
218ca724
WD
2315 If SPD EEPROM is on an I2C bus other than the first
2316 one, specify here. Note that the value must resolve
2317 to something your driver can deal with.
bb99ad6d 2318
1b3e3c4f
YS
2319- CONFIG_SYS_DDR_RAW_TIMING
2320 Get DDR timing information from other than SPD. Common with
2321 soldered DDR chips onboard without SPD. DDR raw timing
2322 parameters are extracted from datasheet and hard-coded into
2323 header files or board specific files.
2324
6f5e1dc5
YS
2325- CONFIG_FSL_DDR_INTERACTIVE
2326 Enable interactive DDR debugging. See doc/README.fsl-ddr.
2327
e32d59a2
YS
2328- CONFIG_FSL_DDR_SYNC_REFRESH
2329 Enable sync of refresh for multiple controllers.
2330
4516ff81
YS
2331- CONFIG_FSL_DDR_BIST
2332 Enable built-in memory test for Freescale DDR controllers.
2333
6d0f6bcf 2334- CONFIG_SYS_83XX_DDR_USES_CS0
218ca724
WD
2335 Only for 83xx systems. If specified, then DDR should
2336 be configured using CS0 and CS1 instead of CS2 and CS3.
2ad6b513 2337
c26e454d
WD
2338- CONFIG_RMII
2339 Enable RMII mode for all FECs.
2340 Note that this is a global option, we can't
2341 have one FEC in standard MII mode and another in RMII mode.
2342
5cf91d6b
WD
2343- CONFIG_CRC32_VERIFY
2344 Add a verify option to the crc32 command.
2345 The syntax is:
2346
2347 => crc32 -v <address> <count> <crc32>
2348
2349 Where address/count indicate a memory area
2350 and crc32 is the correct crc32 which the
2351 area should have.
2352
56523f12
WD
2353- CONFIG_LOOPW
2354 Add the "loopw" memory command. This only takes effect if
493f420e 2355 the memory commands are activated globally (CONFIG_CMD_MEMORY).
56523f12 2356
72732318 2357- CONFIG_CMD_MX_CYCLIC
7b466641
SR
2358 Add the "mdc" and "mwc" memory commands. These are cyclic
2359 "md/mw" commands.
2360 Examples:
2361
efe2a4d5 2362 => mdc.b 10 4 500
7b466641
SR
2363 This command will print 4 bytes (10,11,12,13) each 500 ms.
2364
efe2a4d5 2365 => mwc.l 100 12345678 10
7b466641
SR
2366 This command will write 12345678 to address 100 all 10 ms.
2367
efe2a4d5 2368 This only takes effect if the memory commands are activated
493f420e 2369 globally (CONFIG_CMD_MEMORY).
7b466641 2370
401bb30b 2371- CONFIG_SPL_BUILD
32f2ca2a
TH
2372 Set when the currently-running compilation is for an artifact
2373 that will end up in the SPL (as opposed to the TPL or U-Boot
2374 proper). Code that needs stage-specific behavior should check
2375 this.
400558b5 2376
3aa29de0 2377- CONFIG_TPL_BUILD
32f2ca2a
TH
2378 Set when the currently-running compilation is for an artifact
2379 that will end up in the TPL (as opposed to the SPL or U-Boot
2380 proper). Code that needs stage-specific behavior should check
2381 this.
3aa29de0 2382
5df572f0
YZ
2383- CONFIG_SYS_MPC85XX_NO_RESETVEC
2384 Only for 85xx systems. If this variable is specified, the section
2385 .resetvec is not kept and the section .bootpg is placed in the
2386 previous 4k of the .text section.
2387
4213fc29
SG
2388- CONFIG_ARCH_MAP_SYSMEM
2389 Generally U-Boot (and in particular the md command) uses
2390 effective address. It is therefore not necessary to regard
2391 U-Boot address as virtual addresses that need to be translated
2392 to physical addresses. However, sandbox requires this, since
2393 it maintains its own little RAM buffer which contains all
2394 addressable memory. This option causes some memory accesses
2395 to be mapped through map_sysmem() / unmap_sysmem().
2396
588a13f7
SG
2397- CONFIG_X86_RESET_VECTOR
2398 If defined, the x86 reset vector code is included. This is not
2399 needed when U-Boot is running from Coreboot.
b16f521a 2400
999d7d32
KM
2401- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
2402 Option to disable subpage write in NAND driver
2403 driver that uses this:
a430fa06 2404 drivers/mtd/nand/raw/davinci_nand.c
999d7d32 2405
f2717b47
TT
2406Freescale QE/FMAN Firmware Support:
2407-----------------------------------
2408
2409The Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the
2410loading of "firmware", which is encoded in the QE firmware binary format.
2411This firmware often needs to be loaded during U-Boot booting, so macros
2412are used to identify the storage device (NOR flash, SPI, etc) and the address
2413within that device.
2414
dcf1d774
ZQ
2415- CONFIG_SYS_FMAN_FW_ADDR
2416 The address in the storage device where the FMAN microcode is located. The
cc1e98b5 2417 meaning of this address depends on which CONFIG_SYS_QE_FMAN_FW_IN_xxx macro
dcf1d774
ZQ
2418 is also specified.
2419
2420- CONFIG_SYS_QE_FW_ADDR
2421 The address in the storage device where the QE microcode is located. The
cc1e98b5 2422 meaning of this address depends on which CONFIG_SYS_QE_FMAN_FW_IN_xxx macro
f2717b47
TT
2423 is also specified.
2424
2425- CONFIG_SYS_QE_FMAN_FW_LENGTH
2426 The maximum possible size of the firmware. The firmware binary format
2427 has a field that specifies the actual size of the firmware, but it
2428 might not be possible to read any part of the firmware unless some
2429 local storage is allocated to hold the entire firmware first.
2430
2431- CONFIG_SYS_QE_FMAN_FW_IN_NOR
2432 Specifies that QE/FMAN firmware is located in NOR flash, mapped as
2433 normal addressable memory via the LBC. CONFIG_SYS_FMAN_FW_ADDR is the
2434 virtual address in NOR flash.
2435
2436- CONFIG_SYS_QE_FMAN_FW_IN_NAND
2437 Specifies that QE/FMAN firmware is located in NAND flash.
2438 CONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash.
2439
2440- CONFIG_SYS_QE_FMAN_FW_IN_MMC
2441 Specifies that QE/FMAN firmware is located on the primary SD/MMC
2442 device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
2443
292dc6c5
LG
2444- CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
2445 Specifies that QE/FMAN firmware is located in the remote (master)
2446 memory space. CONFIG_SYS_FMAN_FW_ADDR is a virtual address which
fc54c7fa
LG
2447 can be mapped from slave TLB->slave LAW->slave SRIO or PCIE outbound
2448 window->master inbound window->master LAW->the ucode address in
2449 master's memory space.
f2717b47 2450
b940ca64
GR
2451Freescale Layerscape Management Complex Firmware Support:
2452---------------------------------------------------------
2453The Freescale Layerscape Management Complex (MC) supports the loading of
2454"firmware".
2455This firmware often needs to be loaded during U-Boot booting, so macros
2456are used to identify the storage device (NOR flash, SPI, etc) and the address
2457within that device.
2458
2459- CONFIG_FSL_MC_ENET
2460 Enable the MC driver for Layerscape SoCs.
2461
5c055089
PK
2462Freescale Layerscape Debug Server Support:
2463-------------------------------------------
2464The Freescale Layerscape Debug Server Support supports the loading of
2465"Debug Server firmware" and triggering SP boot-rom.
2466This firmware often needs to be loaded during U-Boot booting.
2467
c0492141
YS
2468- CONFIG_SYS_MC_RSV_MEM_ALIGN
2469 Define alignment of reserved memory MC requires
5c055089 2470
f3f431a7
PK
2471Reproducible builds
2472-------------------
2473
2474In order to achieve reproducible builds, timestamps used in the U-Boot build
2475process have to be set to a fixed value.
2476
2477This is done using the SOURCE_DATE_EPOCH environment variable.
2478SOURCE_DATE_EPOCH is to be set on the build host's shell, not as a configuration
2479option for U-Boot or an environment variable in U-Boot.
2480
2481SOURCE_DATE_EPOCH should be set to a number of seconds since the epoch, in UTC.
2482
c609719b
WD
2483Building the Software:
2484======================
2485
218ca724
WD
2486Building U-Boot has been tested in several native build environments
2487and in many different cross environments. Of course we cannot support
2488all possibly existing versions of cross development tools in all
2489(potentially obsolete) versions. In case of tool chain problems we
047f6ec0 2490recommend to use the ELDK (see https://www.denx.de/wiki/DULG/ELDK)
218ca724 2491which is extensively used to build and test U-Boot.
c609719b 2492
218ca724
WD
2493If you are not using a native environment, it is assumed that you
2494have GNU cross compiling tools available in your path. In this case,
2495you must set the environment variable CROSS_COMPILE in your shell.
2496Note that no changes to the Makefile or any other source files are
2497necessary. For example using the ELDK on a 4xx CPU, please enter:
c609719b 2498
218ca724
WD
2499 $ CROSS_COMPILE=ppc_4xx-
2500 $ export CROSS_COMPILE
c609719b 2501
218ca724
WD
2502U-Boot is intended to be simple to build. After installing the
2503sources you must configure U-Boot for one specific board type. This
c609719b
WD
2504is done by typing:
2505
ab584d67 2506 make NAME_defconfig
c609719b 2507
ab584d67 2508where "NAME_defconfig" is the name of one of the existing configu-
ecb3a0a1 2509rations; see configs/*_defconfig for supported names.
db01a2ea 2510
ecb3a0a1 2511Note: for some boards special configuration names may exist; check if
2729af9d
WD
2512 additional information is available from the board vendor; for
2513 instance, the TQM823L systems are available without (standard)
2514 or with LCD support. You can select such additional "features"
11ccc33f 2515 when choosing the configuration, i. e.
2729af9d 2516
ab584d67 2517 make TQM823L_defconfig
2729af9d
WD
2518 - will configure for a plain TQM823L, i. e. no LCD support
2519
ab584d67 2520 make TQM823L_LCD_defconfig
2729af9d
WD
2521 - will configure for a TQM823L with U-Boot console on LCD
2522
2523 etc.
2524
2525
2526Finally, type "make all", and you should get some working U-Boot
2527images ready for download to / installation on your system:
2528
2529- "u-boot.bin" is a raw binary image
2530- "u-boot" is an image in ELF binary format
2531- "u-boot.srec" is in Motorola S-Record format
2532
baf31249
MB
2533By default the build is performed locally and the objects are saved
2534in the source directory. One of the two methods can be used to change
2535this behavior and build U-Boot to some external directory:
2536
25371. Add O= to the make command line invocations:
2538
2539 make O=/tmp/build distclean
ab584d67 2540 make O=/tmp/build NAME_defconfig
baf31249
MB
2541 make O=/tmp/build all
2542
adbba996 25432. Set environment variable KBUILD_OUTPUT to point to the desired location:
baf31249 2544
adbba996 2545 export KBUILD_OUTPUT=/tmp/build
baf31249 2546 make distclean
ab584d67 2547 make NAME_defconfig
baf31249
MB
2548 make all
2549
adbba996 2550Note that the command line "O=" setting overrides the KBUILD_OUTPUT environment
baf31249
MB
2551variable.
2552
215bb1c1
DS
2553User specific CPPFLAGS, AFLAGS and CFLAGS can be passed to the compiler by
2554setting the according environment variables KCPPFLAGS, KAFLAGS and KCFLAGS.
2555For example to treat all compiler warnings as errors:
2556
2557 make KCFLAGS=-Werror
2729af9d
WD
2558
2559Please be aware that the Makefiles assume you are using GNU make, so
2560for instance on NetBSD you might need to use "gmake" instead of
2561native "make".
2562
2563
2564If the system board that you have is not listed, then you will need
2565to port U-Boot to your hardware platform. To do this, follow these
2566steps:
2567
3c1496cd 25681. Create a new directory to hold your board specific code. Add any
2729af9d 2569 files you need. In your board directory, you will need at least
3c1496cd
PS
2570 the "Makefile" and a "<board>.c".
25712. Create a new configuration file "include/configs/<board>.h" for
2572 your board.
2729af9d
WD
25733. If you're porting U-Boot to a new CPU, then also create a new
2574 directory to hold your CPU specific code. Add any files you need.
ab584d67 25754. Run "make <board>_defconfig" with your new name.
2729af9d
WD
25765. Type "make", and you should get a working "u-boot.srec" file
2577 to be installed on your target system.
25786. Debug and solve any problems that might arise.
2579 [Of course, this last step is much harder than it sounds.]
2580
2581
2582Testing of U-Boot Modifications, Ports to New Hardware, etc.:
2583==============================================================
2584
218ca724
WD
2585If you have modified U-Boot sources (for instance added a new board
2586or support for new devices, a new CPU, etc.) you are expected to
2729af9d 2587provide feedback to the other developers. The feedback normally takes
32f2ca2a 2588the form of a "patch", i.e. a context diff against a certain (latest
218ca724 2589official or latest in the git repository) version of U-Boot sources.
2729af9d 2590
218ca724
WD
2591But before you submit such a patch, please verify that your modifi-
2592cation did not break existing code. At least make sure that *ALL* of
2729af9d 2593the supported boards compile WITHOUT ANY compiler warnings. To do so,
6de80f21
SG
2594just run the buildman script (tools/buildman/buildman), which will
2595configure and build U-Boot for ALL supported system. Be warned, this
2596will take a while. Please see the buildman README, or run 'buildman -H'
2597for documentation.
baf31249
MB
2598
2599
2729af9d
WD
2600See also "U-Boot Porting Guide" below.
2601
2602
2603Monitor Commands - Overview:
2604============================
2605
2606go - start application at address 'addr'
2607run - run commands in an environment variable
2608bootm - boot application image from memory
2609bootp - boot image via network using BootP/TFTP protocol
44f074c7 2610bootz - boot zImage from memory
2729af9d
WD
2611tftpboot- boot image via network using TFTP protocol
2612 and env variables "ipaddr" and "serverip"
2613 (and eventually "gatewayip")
1fb7cd49 2614tftpput - upload a file via network using TFTP protocol
2729af9d
WD
2615rarpboot- boot image via network using RARP/TFTP protocol
2616diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd'
2617loads - load S-Record file over serial line
2618loadb - load binary file over serial line (kermit mode)
2619md - memory display
2620mm - memory modify (auto-incrementing)
2621nm - memory modify (constant address)
2622mw - memory write (fill)
bdded201 2623ms - memory search
2729af9d
WD
2624cp - memory copy
2625cmp - memory compare
2626crc32 - checksum calculation
0f89c54b 2627i2c - I2C sub-system
2729af9d
WD
2628sspi - SPI utility commands
2629base - print or set address offset
2630printenv- print environment variables
9e9a530a 2631pwm - control pwm channels
2729af9d
WD
2632setenv - set environment variables
2633saveenv - save environment variables to persistent storage
2634protect - enable or disable FLASH write protection
2635erase - erase FLASH memory
2636flinfo - print FLASH memory information
10635afa 2637nand - NAND memory operations (see doc/README.nand)
2729af9d
WD
2638bdinfo - print Board Info structure
2639iminfo - print header information for application image
2640coninfo - print console devices and informations
2641ide - IDE sub-system
2642loop - infinite loop on address range
56523f12 2643loopw - infinite write loop on address range
2729af9d
WD
2644mtest - simple RAM test
2645icache - enable or disable instruction cache
2646dcache - enable or disable data cache
2647reset - Perform RESET of the CPU
2648echo - echo args to console
2649version - print monitor version
2650help - print online help
2651? - alias for 'help'
2652
2653
2654Monitor Commands - Detailed Description:
2655========================================
2656
2657TODO.
2658
2659For now: just type "help <command>".
2660
2661
2729af9d
WD
2662Note for Redundant Ethernet Interfaces:
2663=======================================
c609719b 2664
11ccc33f 2665Some boards come with redundant Ethernet interfaces; U-Boot supports
2729af9d
WD
2666such configurations and is capable of automatic selection of a
2667"working" interface when needed. MAC assignment works as follows:
c609719b 2668
2729af9d
WD
2669Network interfaces are numbered eth0, eth1, eth2, ... Corresponding
2670MAC addresses can be stored in the environment as "ethaddr" (=>eth0),
2671"eth1addr" (=>eth1), "eth2addr", ...
c609719b 2672
2729af9d
WD
2673If the network interface stores some valid MAC address (for instance
2674in SROM), this is used as default address if there is NO correspon-
2675ding setting in the environment; if the corresponding environment
2676variable is set, this overrides the settings in the card; that means:
c609719b 2677
2729af9d
WD
2678o If the SROM has a valid MAC address, and there is no address in the
2679 environment, the SROM's address is used.
c609719b 2680
2729af9d
WD
2681o If there is no valid address in the SROM, and a definition in the
2682 environment exists, then the value from the environment variable is
2683 used.
c609719b 2684
2729af9d
WD
2685o If both the SROM and the environment contain a MAC address, and
2686 both addresses are the same, this MAC address is used.
c609719b 2687
2729af9d
WD
2688o If both the SROM and the environment contain a MAC address, and the
2689 addresses differ, the value from the environment is used and a
2690 warning is printed.
c609719b 2691
2729af9d 2692o If neither SROM nor the environment contain a MAC address, an error
bef1014b
JH
2693 is raised. If CONFIG_NET_RANDOM_ETHADDR is defined, then in this case
2694 a random, locally-assigned MAC is used.
c609719b 2695
ecee9324 2696If Ethernet drivers implement the 'write_hwaddr' function, valid MAC addresses
c0f40859 2697will be programmed into hardware as part of the initialization process. This
ecee9324
BW
2698may be skipped by setting the appropriate 'ethmacskip' environment variable.
2699The naming convention is as follows:
2700"ethmacskip" (=>eth0), "eth1macskip" (=>eth1) etc.
c609719b 2701
2729af9d
WD
2702Image Formats:
2703==============
c609719b 2704
3310c549
MB
2705U-Boot is capable of booting (and performing other auxiliary operations on)
2706images in two formats:
2707
2708New uImage format (FIT)
2709-----------------------
2710
2711Flexible and powerful format based on Flattened Image Tree -- FIT (similar
2712to Flattened Device Tree). It allows the use of images with multiple
2713components (several kernels, ramdisks, etc.), with contents protected by
2714SHA1, MD5 or CRC32. More details are found in the doc/uImage.FIT directory.
2715
2716
2717Old uImage format
2718-----------------
2719
2720Old image format is based on binary files which can be basically anything,
2721preceded by a special header; see the definitions in include/image.h for
2722details; basically, the header defines the following image properties:
c609719b 2723
2729af9d
WD
2724* Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
2725 4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
f5ed9e39 2726 LynxOS, pSOS, QNX, RTEMS, INTEGRITY;
0797e736 2727 Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, INTEGRITY).
daab59ac 2728* Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,
afc1ce82 2729 IA64, MIPS, NDS32, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
daab59ac 2730 Currently supported: ARM, Intel x86, MIPS, NDS32, Nios II, PowerPC).
2729af9d
WD
2731* Compression Type (uncompressed, gzip, bzip2)
2732* Load Address
2733* Entry Point
2734* Image Name
2735* Image Timestamp
c609719b 2736
2729af9d
WD
2737The header is marked by a special Magic Number, and both the header
2738and the data portions of the image are secured against corruption by
2739CRC32 checksums.
c609719b
WD
2740
2741
2729af9d
WD
2742Linux Support:
2743==============
c609719b 2744
2729af9d
WD
2745Although U-Boot should support any OS or standalone application
2746easily, the main focus has always been on Linux during the design of
2747U-Boot.
c609719b 2748
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WD
2749U-Boot includes many features that so far have been part of some
2750special "boot loader" code within the Linux kernel. Also, any
2751"initrd" images to be used are no longer part of one big Linux image;
2752instead, kernel and "initrd" are separate images. This implementation
2753serves several purposes:
c609719b 2754
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WD
2755- the same features can be used for other OS or standalone
2756 applications (for instance: using compressed images to reduce the
2757 Flash memory footprint)
c609719b 2758
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2759- it becomes much easier to port new Linux kernel versions because
2760 lots of low-level, hardware dependent stuff are done by U-Boot
c609719b 2761
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WD
2762- the same Linux kernel image can now be used with different "initrd"
2763 images; of course this also means that different kernel images can
2764 be run with the same "initrd". This makes testing easier (you don't
2765 have to build a new "zImage.initrd" Linux image when you just
2766 change a file in your "initrd"). Also, a field-upgrade of the
2767 software is easier now.
c609719b 2768
c609719b 2769
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WD
2770Linux HOWTO:
2771============
c609719b 2772
2729af9d
WD
2773Porting Linux to U-Boot based systems:
2774---------------------------------------
c609719b 2775
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2776U-Boot cannot save you from doing all the necessary modifications to
2777configure the Linux device drivers for use with your target hardware
2778(no, we don't intend to provide a full virtual machine interface to
2779Linux :-).
c609719b 2780
a47a12be 2781But now you can ignore ALL boot loader code (in arch/powerpc/mbxboot).
24ee89b9 2782
2729af9d
WD
2783Just make sure your machine specific header file (for instance
2784include/asm-ppc/tqm8xx.h) includes the same definition of the Board
1dc30693
MH
2785Information structure as we define in include/asm-<arch>/u-boot.h,
2786and make sure that your definition of IMAP_ADDR uses the same value
6d0f6bcf 2787as your U-Boot configuration in CONFIG_SYS_IMMR.
24ee89b9 2788
2eb31b13
SG
2789Note that U-Boot now has a driver model, a unified model for drivers.
2790If you are adding a new driver, plumb it into driver model. If there
2791is no uclass available, you are encouraged to create one. See
2792doc/driver-model.
2793
c609719b 2794
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WD
2795Configuring the Linux kernel:
2796-----------------------------
c609719b 2797
2729af9d
WD
2798No specific requirements for U-Boot. Make sure you have some root
2799device (initial ramdisk, NFS) for your target system.
2800
2801
2802Building a Linux Image:
2803-----------------------
c609719b 2804
2729af9d
WD
2805With U-Boot, "normal" build targets like "zImage" or "bzImage" are
2806not used. If you use recent kernel source, a new build target
2807"uImage" will exist which automatically builds an image usable by
2808U-Boot. Most older kernels also have support for a "pImage" target,
2809which was introduced for our predecessor project PPCBoot and uses a
2810100% compatible format.
2811
2812Example:
2813
ab584d67 2814 make TQM850L_defconfig
2729af9d
WD
2815 make oldconfig
2816 make dep
2817 make uImage
2818
2819The "uImage" build target uses a special tool (in 'tools/mkimage') to
2820encapsulate a compressed Linux kernel image with header information,
2821CRC32 checksum etc. for use with U-Boot. This is what we are doing:
2822
2823* build a standard "vmlinux" kernel image (in ELF binary format):
2824
2825* convert the kernel into a raw binary image:
2826
2827 ${CROSS_COMPILE}-objcopy -O binary \
2828 -R .note -R .comment \
2829 -S vmlinux linux.bin
2830
2831* compress the binary image:
2832
2833 gzip -9 linux.bin
2834
2835* package compressed binary image for U-Boot:
2836
2837 mkimage -A ppc -O linux -T kernel -C gzip \
2838 -a 0 -e 0 -n "Linux Kernel Image" \
2839 -d linux.bin.gz uImage
c609719b 2840
c609719b 2841
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WD
2842The "mkimage" tool can also be used to create ramdisk images for use
2843with U-Boot, either separated from the Linux kernel image, or
2844combined into one file. "mkimage" encapsulates the images with a 64
2845byte header containing information about target architecture,
2846operating system, image type, compression method, entry points, time
2847stamp, CRC32 checksums, etc.
2848
2849"mkimage" can be called in two ways: to verify existing images and
2850print the header information, or to build new images.
2851
2852In the first form (with "-l" option) mkimage lists the information
2853contained in the header of an existing U-Boot image; this includes
2854checksum verification:
c609719b 2855
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2856 tools/mkimage -l image
2857 -l ==> list image header information
2858
2859The second form (with "-d" option) is used to build a U-Boot image
2860from a "data file" which is used as image payload:
2861
2862 tools/mkimage -A arch -O os -T type -C comp -a addr -e ep \
2863 -n name -d data_file image
2864 -A ==> set architecture to 'arch'
2865 -O ==> set operating system to 'os'
2866 -T ==> set image type to 'type'
2867 -C ==> set compression type 'comp'
2868 -a ==> set load address to 'addr' (hex)
2869 -e ==> set entry point to 'ep' (hex)
2870 -n ==> set image name to 'name'
2871 -d ==> use image data from 'datafile'
2872
69459791
WD
2873Right now, all Linux kernels for PowerPC systems use the same load
2874address (0x00000000), but the entry point address depends on the
2875kernel version:
2729af9d
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2876
2877- 2.2.x kernels have the entry point at 0x0000000C,
2878- 2.3.x and later kernels have the entry point at 0x00000000.
2879
2880So a typical call to build a U-Boot image would read:
2881
2882 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
2883 > -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \
a47a12be 2884 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz \
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2885 > examples/uImage.TQM850L
2886 Image Name: 2.4.4 kernel for TQM850L
2887 Created: Wed Jul 19 02:34:59 2000
2888 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2889 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
2890 Load Address: 0x00000000
2891 Entry Point: 0x00000000
2892
2893To verify the contents of the image (or check for corruption):
2894
2895 -> tools/mkimage -l examples/uImage.TQM850L
2896 Image Name: 2.4.4 kernel for TQM850L
2897 Created: Wed Jul 19 02:34:59 2000
2898 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2899 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
2900 Load Address: 0x00000000
2901 Entry Point: 0x00000000
2902
2903NOTE: for embedded systems where boot time is critical you can trade
2904speed for memory and install an UNCOMPRESSED image instead: this
2905needs more space in Flash, but boots much faster since it does not
2906need to be uncompressed:
2907
a47a12be 2908 -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz
2729af9d
WD
2909 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
2910 > -A ppc -O linux -T kernel -C none -a 0 -e 0 \
a47a12be 2911 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux \
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2912 > examples/uImage.TQM850L-uncompressed
2913 Image Name: 2.4.4 kernel for TQM850L
2914 Created: Wed Jul 19 02:34:59 2000
2915 Image Type: PowerPC Linux Kernel Image (uncompressed)
2916 Data Size: 792160 Bytes = 773.59 kB = 0.76 MB
2917 Load Address: 0x00000000
2918 Entry Point: 0x00000000
2919
2920
2921Similar you can build U-Boot images from a 'ramdisk.image.gz' file
2922when your kernel is intended to use an initial ramdisk:
2923
2924 -> tools/mkimage -n 'Simple Ramdisk Image' \
2925 > -A ppc -O linux -T ramdisk -C gzip \
2926 > -d /LinuxPPC/images/SIMPLE-ramdisk.image.gz examples/simple-initrd
2927 Image Name: Simple Ramdisk Image
2928 Created: Wed Jan 12 14:01:50 2000
2929 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
2930 Data Size: 566530 Bytes = 553.25 kB = 0.54 MB
2931 Load Address: 0x00000000
2932 Entry Point: 0x00000000
2933
e157a111
TH
2934The "dumpimage" tool can be used to disassemble or list the contents of images
2935built by mkimage. See dumpimage's help output (-h) for details.
2729af9d
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2936
2937Installing a Linux Image:
2938-------------------------
2939
2940To downloading a U-Boot image over the serial (console) interface,
2941you must convert the image to S-Record format:
2942
2943 objcopy -I binary -O srec examples/image examples/image.srec
2944
2945The 'objcopy' does not understand the information in the U-Boot
2946image header, so the resulting S-Record file will be relative to
2947address 0x00000000. To load it to a given address, you need to
2948specify the target address as 'offset' parameter with the 'loads'
2949command.
2950
2951Example: install the image to address 0x40100000 (which on the
2952TQM8xxL is in the first Flash bank):
2953
2954 => erase 40100000 401FFFFF
2955
2956 .......... done
2957 Erased 8 sectors
2958
2959 => loads 40100000
2960 ## Ready for S-Record download ...
2961 ~>examples/image.srec
2962 1 2 3 4 5 6 7 8 9 10 11 12 13 ...
2963 ...
2964 15989 15990 15991 15992
2965 [file transfer complete]
2966 [connected]
2967 ## Start Addr = 0x00000000
2968
2969
2970You can check the success of the download using the 'iminfo' command;
218ca724 2971this includes a checksum verification so you can be sure no data
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WD
2972corruption happened:
2973
2974 => imi 40100000
2975
2976 ## Checking Image at 40100000 ...
2977 Image Name: 2.2.13 for initrd on TQM850L
2978 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2979 Data Size: 335725 Bytes = 327 kB = 0 MB
2980 Load Address: 00000000
2981 Entry Point: 0000000c
2982 Verifying Checksum ... OK
2983
2984
2985Boot Linux:
2986-----------
2987
2988The "bootm" command is used to boot an application that is stored in
2989memory (RAM or Flash). In case of a Linux kernel image, the contents
2990of the "bootargs" environment variable is passed to the kernel as
2991parameters. You can check and modify this variable using the
2992"printenv" and "setenv" commands:
2993
2994
2995 => printenv bootargs
2996 bootargs=root=/dev/ram
2997
2998 => setenv bootargs root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
2999
3000 => printenv bootargs
3001 bootargs=root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
3002
3003 => bootm 40020000
3004 ## Booting Linux kernel at 40020000 ...
3005 Image Name: 2.2.13 for NFS on TQM850L
3006 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3007 Data Size: 381681 Bytes = 372 kB = 0 MB
3008 Load Address: 00000000
3009 Entry Point: 0000000c
3010 Verifying Checksum ... OK
3011 Uncompressing Kernel Image ... OK
3012 Linux version 2.2.13 ([email protected]) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:35:17 MEST 2000
3013 Boot arguments: root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
3014 time_init: decrementer frequency = 187500000/60
3015 Calibrating delay loop... 49.77 BogoMIPS
3016 Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000]
3017 ...
3018
11ccc33f 3019If you want to boot a Linux kernel with initial RAM disk, you pass
2729af9d
WD
3020the memory addresses of both the kernel and the initrd image (PPBCOOT
3021format!) to the "bootm" command:
3022
3023 => imi 40100000 40200000
3024
3025 ## Checking Image at 40100000 ...
3026 Image Name: 2.2.13 for initrd on TQM850L
3027 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3028 Data Size: 335725 Bytes = 327 kB = 0 MB
3029 Load Address: 00000000
3030 Entry Point: 0000000c
3031 Verifying Checksum ... OK
3032
3033 ## Checking Image at 40200000 ...
3034 Image Name: Simple Ramdisk Image
3035 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
3036 Data Size: 566530 Bytes = 553 kB = 0 MB
3037 Load Address: 00000000
3038 Entry Point: 00000000
3039 Verifying Checksum ... OK
3040
3041 => bootm 40100000 40200000
3042 ## Booting Linux kernel at 40100000 ...
3043 Image Name: 2.2.13 for initrd on TQM850L
3044 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3045 Data Size: 335725 Bytes = 327 kB = 0 MB
3046 Load Address: 00000000
3047 Entry Point: 0000000c
3048 Verifying Checksum ... OK
3049 Uncompressing Kernel Image ... OK
3050 ## Loading RAMDisk Image at 40200000 ...
3051 Image Name: Simple Ramdisk Image
3052 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
3053 Data Size: 566530 Bytes = 553 kB = 0 MB
3054 Load Address: 00000000
3055 Entry Point: 00000000
3056 Verifying Checksum ... OK
3057 Loading Ramdisk ... OK
3058 Linux version 2.2.13 ([email protected]) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:32:08 MEST 2000
3059 Boot arguments: root=/dev/ram
3060 time_init: decrementer frequency = 187500000/60
3061 Calibrating delay loop... 49.77 BogoMIPS
3062 ...
3063 RAMDISK: Compressed image found at block 0
3064 VFS: Mounted root (ext2 filesystem).
3065
3066 bash#
3067
0267768e
MM
3068Boot Linux and pass a flat device tree:
3069-----------
3070
3071First, U-Boot must be compiled with the appropriate defines. See the section
3072titled "Linux Kernel Interface" above for a more in depth explanation. The
3073following is an example of how to start a kernel and pass an updated
3074flat device tree:
3075
3076=> print oftaddr
3077oftaddr=0x300000
3078=> print oft
3079oft=oftrees/mpc8540ads.dtb
3080=> tftp $oftaddr $oft
3081Speed: 1000, full duplex
3082Using TSEC0 device
3083TFTP from server 192.168.1.1; our IP address is 192.168.1.101
3084Filename 'oftrees/mpc8540ads.dtb'.
3085Load address: 0x300000
3086Loading: #
3087done
3088Bytes transferred = 4106 (100a hex)
3089=> tftp $loadaddr $bootfile
3090Speed: 1000, full duplex
3091Using TSEC0 device
3092TFTP from server 192.168.1.1; our IP address is 192.168.1.2
3093Filename 'uImage'.
3094Load address: 0x200000
3095Loading:############
3096done
3097Bytes transferred = 1029407 (fb51f hex)
3098=> print loadaddr
3099loadaddr=200000
3100=> print oftaddr
3101oftaddr=0x300000
3102=> bootm $loadaddr - $oftaddr
3103## Booting image at 00200000 ...
a9398e01
WD
3104 Image Name: Linux-2.6.17-dirty
3105 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3106 Data Size: 1029343 Bytes = 1005.2 kB
0267768e 3107 Load Address: 00000000
a9398e01 3108 Entry Point: 00000000
0267768e
MM
3109 Verifying Checksum ... OK
3110 Uncompressing Kernel Image ... OK
3111Booting using flat device tree at 0x300000
3112Using MPC85xx ADS machine description
3113Memory CAM mapping: CAM0=256Mb, CAM1=256Mb, CAM2=0Mb residual: 0Mb
3114[snip]
3115
3116
2729af9d
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3117More About U-Boot Image Types:
3118------------------------------
3119
3120U-Boot supports the following image types:
3121
3122 "Standalone Programs" are directly runnable in the environment
3123 provided by U-Boot; it is expected that (if they behave
3124 well) you can continue to work in U-Boot after return from
3125 the Standalone Program.
3126 "OS Kernel Images" are usually images of some Embedded OS which
3127 will take over control completely. Usually these programs
3128 will install their own set of exception handlers, device
3129 drivers, set up the MMU, etc. - this means, that you cannot
3130 expect to re-enter U-Boot except by resetting the CPU.
3131 "RAMDisk Images" are more or less just data blocks, and their
3132 parameters (address, size) are passed to an OS kernel that is
3133 being started.
3134 "Multi-File Images" contain several images, typically an OS
3135 (Linux) kernel image and one or more data images like
3136 RAMDisks. This construct is useful for instance when you want
3137 to boot over the network using BOOTP etc., where the boot
3138 server provides just a single image file, but you want to get
3139 for instance an OS kernel and a RAMDisk image.
3140
3141 "Multi-File Images" start with a list of image sizes, each
3142 image size (in bytes) specified by an "uint32_t" in network
3143 byte order. This list is terminated by an "(uint32_t)0".
3144 Immediately after the terminating 0 follow the images, one by
3145 one, all aligned on "uint32_t" boundaries (size rounded up to
3146 a multiple of 4 bytes).
3147
3148 "Firmware Images" are binary images containing firmware (like
3149 U-Boot or FPGA images) which usually will be programmed to
3150 flash memory.
3151
3152 "Script files" are command sequences that will be executed by
3153 U-Boot's command interpreter; this feature is especially
3154 useful when you configure U-Boot to use a real shell (hush)
3155 as command interpreter.
3156
44f074c7
MV
3157Booting the Linux zImage:
3158-------------------------
3159
3160On some platforms, it's possible to boot Linux zImage. This is done
3161using the "bootz" command. The syntax of "bootz" command is the same
3162as the syntax of "bootm" command.
3163
8ac28563 3164Note, defining the CONFIG_SUPPORT_RAW_INITRD allows user to supply
017e1f3f
MV
3165kernel with raw initrd images. The syntax is slightly different, the
3166address of the initrd must be augmented by it's size, in the following
3167format: "<initrd addres>:<initrd size>".
3168
2729af9d
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3169
3170Standalone HOWTO:
3171=================
3172
3173One of the features of U-Boot is that you can dynamically load and
3174run "standalone" applications, which can use some resources of
3175U-Boot like console I/O functions or interrupt services.
3176
3177Two simple examples are included with the sources:
3178
3179"Hello World" Demo:
3180-------------------
3181
3182'examples/hello_world.c' contains a small "Hello World" Demo
3183application; it is automatically compiled when you build U-Boot.
3184It's configured to run at address 0x00040004, so you can play with it
3185like that:
3186
3187 => loads
3188 ## Ready for S-Record download ...
3189 ~>examples/hello_world.srec
3190 1 2 3 4 5 6 7 8 9 10 11 ...
3191 [file transfer complete]
3192 [connected]
3193 ## Start Addr = 0x00040004
3194
3195 => go 40004 Hello World! This is a test.
3196 ## Starting application at 0x00040004 ...
3197 Hello World
3198 argc = 7
3199 argv[0] = "40004"
3200 argv[1] = "Hello"
3201 argv[2] = "World!"
3202 argv[3] = "This"
3203 argv[4] = "is"
3204 argv[5] = "a"
3205 argv[6] = "test."
3206 argv[7] = "<NULL>"
3207 Hit any key to exit ...
3208
3209 ## Application terminated, rc = 0x0
3210
3211Another example, which demonstrates how to register a CPM interrupt
3212handler with the U-Boot code, can be found in 'examples/timer.c'.
3213Here, a CPM timer is set up to generate an interrupt every second.
3214The interrupt service routine is trivial, just printing a '.'
3215character, but this is just a demo program. The application can be
3216controlled by the following keys:
3217
3218 ? - print current values og the CPM Timer registers
3219 b - enable interrupts and start timer
3220 e - stop timer and disable interrupts
3221 q - quit application
3222
3223 => loads
3224 ## Ready for S-Record download ...
3225 ~>examples/timer.srec
3226 1 2 3 4 5 6 7 8 9 10 11 ...
3227 [file transfer complete]
3228 [connected]
3229 ## Start Addr = 0x00040004
3230
3231 => go 40004
3232 ## Starting application at 0x00040004 ...
3233 TIMERS=0xfff00980
3234 Using timer 1
3235 tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0xfff009b0
3236
3237Hit 'b':
3238 [q, b, e, ?] Set interval 1000000 us
3239 Enabling timer
3240Hit '?':
3241 [q, b, e, ?] ........
3242 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0
3243Hit '?':
3244 [q, b, e, ?] .
3245 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0
3246Hit '?':
3247 [q, b, e, ?] .
3248 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0
3249Hit '?':
3250 [q, b, e, ?] .
3251 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0
3252Hit 'e':
3253 [q, b, e, ?] ...Stopping timer
3254Hit 'q':
3255 [q, b, e, ?] ## Application terminated, rc = 0x0
3256
3257
3258Minicom warning:
3259================
3260
3261Over time, many people have reported problems when trying to use the
3262"minicom" terminal emulation program for serial download. I (wd)
3263consider minicom to be broken, and recommend not to use it. Under
3264Unix, I recommend to use C-Kermit for general purpose use (and
3265especially for kermit binary protocol download ("loadb" command), and
e53515a2 3266use "cu" for S-Record download ("loads" command). See
047f6ec0 3267https://www.denx.de/wiki/view/DULG/SystemSetup#Section_4.3.
e53515a2
KP
3268for help with kermit.
3269
2729af9d
WD
3270
3271Nevertheless, if you absolutely want to use it try adding this
3272configuration to your "File transfer protocols" section:
3273
3274 Name Program Name U/D FullScr IO-Red. Multi
3275 X kermit /usr/bin/kermit -i -l %l -s Y U Y N N
3276 Y kermit /usr/bin/kermit -i -l %l -r N D Y N N
3277
3278
3279NetBSD Notes:
3280=============
3281
3282Starting at version 0.9.2, U-Boot supports NetBSD both as host
3283(build U-Boot) and target system (boots NetBSD/mpc8xx).
3284
3285Building requires a cross environment; it is known to work on
3286NetBSD/i386 with the cross-powerpc-netbsd-1.3 package (you will also
3287need gmake since the Makefiles are not compatible with BSD make).
3288Note that the cross-powerpc package does not install include files;
3289attempting to build U-Boot will fail because <machine/ansi.h> is
3290missing. This file has to be installed and patched manually:
3291
3292 # cd /usr/pkg/cross/powerpc-netbsd/include
3293 # mkdir powerpc
3294 # ln -s powerpc machine
3295 # cp /usr/src/sys/arch/powerpc/include/ansi.h powerpc/ansi.h
3296 # ${EDIT} powerpc/ansi.h ## must remove __va_list, _BSD_VA_LIST
3297
3298Native builds *don't* work due to incompatibilities between native
3299and U-Boot include files.
3300
3301Booting assumes that (the first part of) the image booted is a
3302stage-2 loader which in turn loads and then invokes the kernel
3303proper. Loader sources will eventually appear in the NetBSD source
3304tree (probably in sys/arc/mpc8xx/stand/u-boot_stage2/); in the
2a8af187 3305meantime, see ftp://ftp.denx.de/pub/u-boot/ppcboot_stage2.tar.gz
2729af9d
WD
3306
3307
3308Implementation Internals:
3309=========================
3310
3311The following is not intended to be a complete description of every
3312implementation detail. However, it should help to understand the
3313inner workings of U-Boot and make it easier to port it to custom
3314hardware.
3315
3316
3317Initial Stack, Global Data:
3318---------------------------
3319
3320The implementation of U-Boot is complicated by the fact that U-Boot
3321starts running out of ROM (flash memory), usually without access to
3322system RAM (because the memory controller is not initialized yet).
3323This means that we don't have writable Data or BSS segments, and BSS
3324is not initialized as zero. To be able to get a C environment working
3325at all, we have to allocate at least a minimal stack. Implementation
3326options for this are defined and restricted by the CPU used: Some CPU
3327models provide on-chip memory (like the IMMR area on MPC8xx and
3328MPC826x processors), on others (parts of) the data cache can be
3329locked as (mis-) used as memory, etc.
3330
218ca724 3331 Chris Hallinan posted a good summary of these issues to the
0668236b 3332 U-Boot mailing list:
2729af9d
WD
3333
3334 Subject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)?
3335 From: "Chris Hallinan" <[email protected]>
3336 Date: Mon, 10 Feb 2003 16:43:46 -0500 (22:43 MET)
3337 ...
3338
3339 Correct me if I'm wrong, folks, but the way I understand it
3340 is this: Using DCACHE as initial RAM for Stack, etc, does not
3341 require any physical RAM backing up the cache. The cleverness
3342 is that the cache is being used as a temporary supply of
3343 necessary storage before the SDRAM controller is setup. It's
11ccc33f 3344 beyond the scope of this list to explain the details, but you
2729af9d
WD
3345 can see how this works by studying the cache architecture and
3346 operation in the architecture and processor-specific manuals.
3347
3348 OCM is On Chip Memory, which I believe the 405GP has 4K. It
3349 is another option for the system designer to use as an
11ccc33f 3350 initial stack/RAM area prior to SDRAM being available. Either
2729af9d
WD
3351 option should work for you. Using CS 4 should be fine if your
3352 board designers haven't used it for something that would
3353 cause you grief during the initial boot! It is frequently not
3354 used.
3355
6d0f6bcf 3356 CONFIG_SYS_INIT_RAM_ADDR should be somewhere that won't interfere
2729af9d
WD
3357 with your processor/board/system design. The default value
3358 you will find in any recent u-boot distribution in
8a316c9b 3359 walnut.h should work for you. I'd set it to a value larger
2729af9d
WD
3360 than your SDRAM module. If you have a 64MB SDRAM module, set
3361 it above 400_0000. Just make sure your board has no resources
3362 that are supposed to respond to that address! That code in
3363 start.S has been around a while and should work as is when
3364 you get the config right.
3365
3366 -Chris Hallinan
3367 DS4.COM, Inc.
3368
3369It is essential to remember this, since it has some impact on the C
3370code for the initialization procedures:
3371
3372* Initialized global data (data segment) is read-only. Do not attempt
3373 to write it.
3374
b445bbb4 3375* Do not use any uninitialized global data (or implicitly initialized
2729af9d
WD
3376 as zero data - BSS segment) at all - this is undefined, initiali-
3377 zation is performed later (when relocating to RAM).
3378
3379* Stack space is very limited. Avoid big data buffers or things like
3380 that.
3381
3382Having only the stack as writable memory limits means we cannot use
b445bbb4 3383normal global data to share information between the code. But it
2729af9d
WD
3384turned out that the implementation of U-Boot can be greatly
3385simplified by making a global data structure (gd_t) available to all
3386functions. We could pass a pointer to this data as argument to _all_
3387functions, but this would bloat the code. Instead we use a feature of
3388the GCC compiler (Global Register Variables) to share the data: we
3389place a pointer (gd) to the global data into a register which we
3390reserve for this purpose.
3391
3392When choosing a register for such a purpose we are restricted by the
3393relevant (E)ABI specifications for the current architecture, and by
3394GCC's implementation.
3395
3396For PowerPC, the following registers have specific use:
3397 R1: stack pointer
e7670f6c 3398 R2: reserved for system use
2729af9d
WD
3399 R3-R4: parameter passing and return values
3400 R5-R10: parameter passing
3401 R13: small data area pointer
3402 R30: GOT pointer
3403 R31: frame pointer
3404
e6bee808
JT
3405 (U-Boot also uses R12 as internal GOT pointer. r12
3406 is a volatile register so r12 needs to be reset when
3407 going back and forth between asm and C)
2729af9d 3408
e7670f6c 3409 ==> U-Boot will use R2 to hold a pointer to the global data
2729af9d
WD
3410
3411 Note: on PPC, we could use a static initializer (since the
3412 address of the global data structure is known at compile time),
3413 but it turned out that reserving a register results in somewhat
3414 smaller code - although the code savings are not that big (on
3415 average for all boards 752 bytes for the whole U-Boot image,
3416 624 text + 127 data).
3417
3418On ARM, the following registers are used:
3419
3420 R0: function argument word/integer result
3421 R1-R3: function argument word
12eba1b4
JH
3422 R9: platform specific
3423 R10: stack limit (used only if stack checking is enabled)
2729af9d
WD
3424 R11: argument (frame) pointer
3425 R12: temporary workspace
3426 R13: stack pointer
3427 R14: link register
3428 R15: program counter
3429
12eba1b4
JH
3430 ==> U-Boot will use R9 to hold a pointer to the global data
3431
3432 Note: on ARM, only R_ARM_RELATIVE relocations are supported.
2729af9d 3433
0df01fd3 3434On Nios II, the ABI is documented here:
047f6ec0 3435 https://www.altera.com/literature/hb/nios2/n2cpu_nii51016.pdf
0df01fd3
TC
3436
3437 ==> U-Boot will use gp to hold a pointer to the global data
3438
3439 Note: on Nios II, we give "-G0" option to gcc and don't use gp
3440 to access small data sections, so gp is free.
3441
afc1ce82
ML
3442On NDS32, the following registers are used:
3443
3444 R0-R1: argument/return
3445 R2-R5: argument
3446 R15: temporary register for assembler
3447 R16: trampoline register
3448 R28: frame pointer (FP)
3449 R29: global pointer (GP)
3450 R30: link register (LP)
3451 R31: stack pointer (SP)
3452 PC: program counter (PC)
3453
3454 ==> U-Boot will use R10 to hold a pointer to the global data
3455
d87080b7
WD
3456NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
3457or current versions of GCC may "optimize" the code too much.
2729af9d 3458
3fafced7
RC
3459On RISC-V, the following registers are used:
3460
3461 x0: hard-wired zero (zero)
3462 x1: return address (ra)
3463 x2: stack pointer (sp)
3464 x3: global pointer (gp)
3465 x4: thread pointer (tp)
3466 x5: link register (t0)
3467 x8: frame pointer (fp)
3468 x10-x11: arguments/return values (a0-1)
3469 x12-x17: arguments (a2-7)
3470 x28-31: temporaries (t3-6)
3471 pc: program counter (pc)
3472
3473 ==> U-Boot will use gp to hold a pointer to the global data
3474
2729af9d
WD
3475Memory Management:
3476------------------
3477
3478U-Boot runs in system state and uses physical addresses, i.e. the
3479MMU is not used either for address mapping nor for memory protection.
3480
3481The available memory is mapped to fixed addresses using the memory
3482controller. In this process, a contiguous block is formed for each
3483memory type (Flash, SDRAM, SRAM), even when it consists of several
3484physical memory banks.
3485
3486U-Boot is installed in the first 128 kB of the first Flash bank (on
3487TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After
3488booting and sizing and initializing DRAM, the code relocates itself
3489to the upper end of DRAM. Immediately below the U-Boot code some
6d0f6bcf 3490memory is reserved for use by malloc() [see CONFIG_SYS_MALLOC_LEN
2729af9d
WD
3491configuration setting]. Below that, a structure with global Board
3492Info data is placed, followed by the stack (growing downward).
3493
3494Additionally, some exception handler code is copied to the low 8 kB
3495of DRAM (0x00000000 ... 0x00001FFF).
3496
3497So a typical memory configuration with 16 MB of DRAM could look like
3498this:
3499
3500 0x0000 0000 Exception Vector code
3501 :
3502 0x0000 1FFF
3503 0x0000 2000 Free for Application Use
3504 :
3505 :
3506
3507 :
3508 :
3509 0x00FB FF20 Monitor Stack (Growing downward)
3510 0x00FB FFAC Board Info Data and permanent copy of global data
3511 0x00FC 0000 Malloc Arena
3512 :
3513 0x00FD FFFF
3514 0x00FE 0000 RAM Copy of Monitor Code
3515 ... eventually: LCD or video framebuffer
3516 ... eventually: pRAM (Protected RAM - unchanged by reset)
3517 0x00FF FFFF [End of RAM]
3518
3519
3520System Initialization:
3521----------------------
c609719b 3522
2729af9d 3523In the reset configuration, U-Boot starts at the reset entry point
11ccc33f 3524(on most PowerPC systems at address 0x00000100). Because of the reset
b445bbb4 3525configuration for CS0# this is a mirror of the on board Flash memory.
2729af9d
WD
3526To be able to re-map memory U-Boot then jumps to its link address.
3527To be able to implement the initialization code in C, a (small!)
3528initial stack is set up in the internal Dual Ported RAM (in case CPUs
2eb48ff7
HS
3529which provide such a feature like), or in a locked part of the data
3530cache. After that, U-Boot initializes the CPU core, the caches and
3531the SIU.
2729af9d
WD
3532
3533Next, all (potentially) available memory banks are mapped using a
3534preliminary mapping. For example, we put them on 512 MB boundaries
3535(multiples of 0x20000000: SDRAM on 0x00000000 and 0x20000000, Flash
3536on 0x40000000 and 0x60000000, SRAM on 0x80000000). Then UPM A is
3537programmed for SDRAM access. Using the temporary configuration, a
3538simple memory test is run that determines the size of the SDRAM
3539banks.
3540
3541When there is more than one SDRAM bank, and the banks are of
3542different size, the largest is mapped first. For equal size, the first
3543bank (CS2#) is mapped first. The first mapping is always for address
35440x00000000, with any additional banks following immediately to create
3545contiguous memory starting from 0.
3546
3547Then, the monitor installs itself at the upper end of the SDRAM area
3548and allocates memory for use by malloc() and for the global Board
3549Info data; also, the exception vector code is copied to the low RAM
3550pages, and the final stack is set up.
3551
3552Only after this relocation will you have a "normal" C environment;
3553until that you are restricted in several ways, mostly because you are
3554running from ROM, and because the code will have to be relocated to a
3555new address in RAM.
3556
3557
3558U-Boot Porting Guide:
3559----------------------
c609719b 3560
2729af9d
WD
3561[Based on messages by Jerry Van Baren in the U-Boot-Users mailing
3562list, October 2002]
c609719b
WD
3563
3564
6c3fef28 3565int main(int argc, char *argv[])
2729af9d
WD
3566{
3567 sighandler_t no_more_time;
c609719b 3568
6c3fef28
JVB
3569 signal(SIGALRM, no_more_time);
3570 alarm(PROJECT_DEADLINE - toSec (3 * WEEK));
c609719b 3571
2729af9d 3572 if (available_money > available_manpower) {
6c3fef28 3573 Pay consultant to port U-Boot;
c609719b
WD
3574 return 0;
3575 }
3576
2729af9d
WD
3577 Download latest U-Boot source;
3578
0668236b 3579 Subscribe to u-boot mailing list;
2729af9d 3580
6c3fef28
JVB
3581 if (clueless)
3582 email("Hi, I am new to U-Boot, how do I get started?");
2729af9d
WD
3583
3584 while (learning) {
3585 Read the README file in the top level directory;
047f6ec0 3586 Read https://www.denx.de/wiki/bin/view/DULG/Manual;
24bcaec7 3587 Read applicable doc/README.*;
2729af9d 3588 Read the source, Luke;
6c3fef28 3589 /* find . -name "*.[chS]" | xargs grep -i <keyword> */
2729af9d
WD
3590 }
3591
6c3fef28
JVB
3592 if (available_money > toLocalCurrency ($2500))
3593 Buy a BDI3000;
3594 else
2729af9d 3595 Add a lot of aggravation and time;
2729af9d 3596
6c3fef28
JVB
3597 if (a similar board exists) { /* hopefully... */
3598 cp -a board/<similar> board/<myboard>
3599 cp include/configs/<similar>.h include/configs/<myboard>.h
3600 } else {
3601 Create your own board support subdirectory;
3602 Create your own board include/configs/<myboard>.h file;
3603 }
3604 Edit new board/<myboard> files
3605 Edit new include/configs/<myboard>.h
3606
3607 while (!accepted) {
3608 while (!running) {
3609 do {
3610 Add / modify source code;
3611 } until (compiles);
3612 Debug;
3613 if (clueless)
3614 email("Hi, I am having problems...");
3615 }
3616 Send patch file to the U-Boot email list;
3617 if (reasonable critiques)
3618 Incorporate improvements from email list code review;
3619 else
3620 Defend code as written;
2729af9d 3621 }
2729af9d
WD
3622
3623 return 0;
3624}
3625
3626void no_more_time (int sig)
3627{
3628 hire_a_guru();
3629}
3630
c609719b 3631
2729af9d
WD
3632Coding Standards:
3633-----------------
c609719b 3634
2729af9d 3635All contributions to U-Boot should conform to the Linux kernel
659208da
BS
3636coding style; see the kernel coding style guide at
3637https://www.kernel.org/doc/html/latest/process/coding-style.html, and the
3638script "scripts/Lindent" in your Linux kernel source directory.
2c051651
DZ
3639
3640Source files originating from a different project (for example the
3641MTD subsystem) are generally exempt from these guidelines and are not
b445bbb4 3642reformatted to ease subsequent migration to newer versions of those
2c051651
DZ
3643sources.
3644
3645Please note that U-Boot is implemented in C (and to some small parts in
3646Assembler); no C++ is used, so please do not use C++ style comments (//)
3647in your code.
c609719b 3648
2729af9d
WD
3649Please also stick to the following formatting rules:
3650- remove any trailing white space
7ca9296e 3651- use TAB characters for indentation and vertical alignment, not spaces
2729af9d 3652- make sure NOT to use DOS '\r\n' line feeds
7ca9296e 3653- do not add more than 2 consecutive empty lines to source files
2729af9d 3654- do not add trailing empty lines to source files
180d3f74 3655
2729af9d
WD
3656Submissions which do not conform to the standards may be returned
3657with a request to reformat the changes.
c609719b
WD
3658
3659
2729af9d
WD
3660Submitting Patches:
3661-------------------
c609719b 3662
2729af9d
WD
3663Since the number of patches for U-Boot is growing, we need to
3664establish some rules. Submissions which do not conform to these rules
3665may be rejected, even when they contain important and valuable stuff.
c609719b 3666
047f6ec0 3667Please see https://www.denx.de/wiki/U-Boot/Patches for details.
218ca724 3668
0668236b 3669Patches shall be sent to the u-boot mailing list <[email protected]>;
1dade18e 3670see https://lists.denx.de/listinfo/u-boot
0668236b 3671
2729af9d
WD
3672When you send a patch, please include the following information with
3673it:
c609719b 3674
2729af9d
WD
3675* For bug fixes: a description of the bug and how your patch fixes
3676 this bug. Please try to include a way of demonstrating that the
3677 patch actually fixes something.
c609719b 3678
2729af9d
WD
3679* For new features: a description of the feature and your
3680 implementation.
c609719b 3681
7207b366
RD
3682* For major contributions, add a MAINTAINERS file with your
3683 information and associated file and directory references.
c609719b 3684
27af930e
AA
3685* When you add support for a new board, don't forget to add a
3686 maintainer e-mail address to the boards.cfg file, too.
c609719b 3687
2729af9d
WD
3688* If your patch adds new configuration options, don't forget to
3689 document these in the README file.
c609719b 3690
218ca724
WD
3691* The patch itself. If you are using git (which is *strongly*
3692 recommended) you can easily generate the patch using the
7ca9296e 3693 "git format-patch". If you then use "git send-email" to send it to
218ca724
WD
3694 the U-Boot mailing list, you will avoid most of the common problems
3695 with some other mail clients.
3696
3697 If you cannot use git, use "diff -purN OLD NEW". If your version of
3698 diff does not support these options, then get the latest version of
3699 GNU diff.
c609719b 3700
218ca724
WD
3701 The current directory when running this command shall be the parent
3702 directory of the U-Boot source tree (i. e. please make sure that
3703 your patch includes sufficient directory information for the
3704 affected files).
6dff5529 3705
218ca724
WD
3706 We prefer patches as plain text. MIME attachments are discouraged,
3707 and compressed attachments must not be used.
c609719b 3708
2729af9d
WD
3709* If one logical set of modifications affects or creates several
3710 files, all these changes shall be submitted in a SINGLE patch file.
52f52c14 3711
2729af9d
WD
3712* Changesets that contain different, unrelated modifications shall be
3713 submitted as SEPARATE patches, one patch per changeset.
8bde7f77 3714
52f52c14 3715
2729af9d 3716Notes:
c609719b 3717
6de80f21 3718* Before sending the patch, run the buildman script on your patched
2729af9d
WD
3719 source tree and make sure that no errors or warnings are reported
3720 for any of the boards.
c609719b 3721
2729af9d
WD
3722* Keep your modifications to the necessary minimum: A patch
3723 containing several unrelated changes or arbitrary reformats will be
3724 returned with a request to re-formatting / split it.
c609719b 3725
2729af9d
WD
3726* If you modify existing code, make sure that your new code does not
3727 add to the memory footprint of the code ;-) Small is beautiful!
3728 When adding new features, these should compile conditionally only
3729 (using #ifdef), and the resulting code with the new feature
3730 disabled must not need more memory than the old code without your
3731 modification.
90dc6704 3732
0668236b
WD
3733* Remember that there is a size limit of 100 kB per message on the
3734 u-boot mailing list. Bigger patches will be moderated. If they are
3735 reasonable and not too big, they will be acknowledged. But patches
3736 bigger than the size limit should be avoided.
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