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a7c81fc8 SA |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* | |
3 | * Copyright (C) 2019-20 Sean Anderson <[email protected]> | |
4 | */ | |
5 | ||
6 | #include <common.h> | |
7 | #include <clk.h> | |
8 | #include <dm.h> | |
9 | #include <fdt_support.h> | |
10 | #include <asm/io.h> | |
11 | ||
12 | phys_size_t get_effective_memsize(void) | |
13 | { | |
14 | return CONFIG_SYS_SDRAM_SIZE; | |
15 | } | |
16 | ||
17 | int board_init(void) | |
18 | { | |
19 | int ret, i; | |
20 | const char * const banks[] = { "sram0", "sram1", "airam" }; | |
21 | ofnode memory; | |
22 | struct clk clk; | |
23 | ||
24 | /* Enable RAM clocks */ | |
25 | memory = ofnode_by_compatible(ofnode_null(), "kendryte,k210-sram"); | |
26 | if (ofnode_equal(memory, ofnode_null())) | |
27 | return -ENOENT; | |
28 | ||
29 | for (i = 0; i < ARRAY_SIZE(banks); i++) { | |
30 | ret = clk_get_by_name_nodev(memory, banks[i], &clk); | |
31 | if (ret) | |
32 | continue; | |
33 | ||
34 | ret = clk_enable(&clk); | |
35 | clk_free(&clk); | |
36 | if (ret) | |
37 | return ret; | |
38 | } | |
39 | ||
40 | return 0; | |
41 | } |