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2d5b561e | 1 | /* |
ba94a1bb WD |
2 | * (C) Copyright 2006 |
3 | * Stefan Roese, DENX Software Engineering, [email protected]. | |
4 | * | |
2d5b561e WD |
5 | * (C) Copyright 2002 |
6 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
7 | * Marius Groeger <[email protected]> | |
8 | * | |
9 | * (C) Copyright 2002 | |
10 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
11 | * Alex Zuepke <[email protected]> | |
12 | * | |
13 | * See file CREDITS for list of people who contributed to this | |
14 | * project. | |
15 | * | |
16 | * This program is free software; you can redistribute it and/or | |
17 | * modify it under the terms of the GNU General Public License as | |
18 | * published by the Free Software Foundation; either version 2 of | |
19 | * the License, or (at your option) any later version. | |
20 | * | |
21 | * This program is distributed in the hope that it will be useful, | |
22 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
23 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
24 | * GNU General Public License for more details. | |
25 | * | |
26 | * You should have received a copy of the GNU General Public License | |
27 | * along with this program; if not, write to the Free Software | |
28 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
29 | * MA 02111-1307 USA | |
30 | */ | |
31 | ||
32 | #include <common.h> | |
33 | #include <asm/arch/ixp425.h> | |
34 | ||
2d5b561e | 35 | #ifdef CONFIG_USE_IRQ |
6d0943a6 AE |
36 | #include <asm/proc-armv/ptrace.h> |
37 | ||
ba94a1bb WD |
38 | /* |
39 | * When interrupts are enabled, use timer 2 for time/delay generation... | |
40 | */ | |
41 | ||
42 | #define FREQ 66666666 | |
6d0f6bcf JCPV |
43 | #define CLOCK_TICK_RATE (((FREQ / CONFIG_SYS_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CONFIG_SYS_HZ) |
44 | #define LATCH ((CLOCK_TICK_RATE + CONFIG_SYS_HZ/2) / CONFIG_SYS_HZ) /* For divider */ | |
ba94a1bb WD |
45 | |
46 | struct _irq_handler { | |
47 | void *m_data; | |
48 | void (*m_func)( void *data); | |
49 | }; | |
50 | ||
51 | static struct _irq_handler IRQ_HANDLER[N_IRQS]; | |
52 | ||
53 | static volatile ulong timestamp; | |
54 | ||
ba94a1bb WD |
55 | static void default_isr(void *data) |
56 | { | |
57 | printf("default_isr(): called for IRQ %d, Interrupt Status=%x PR=%x\n", | |
58 | (int)data, *IXP425_ICIP, *IXP425_ICIH); | |
59 | } | |
60 | ||
61 | static int next_irq(void) | |
62 | { | |
63 | return (((*IXP425_ICIH & 0x000000fc) >> 2) - 1); | |
64 | } | |
65 | ||
66 | static void timer_isr(void *data) | |
67 | { | |
68 | unsigned int *pTime = (unsigned int *)data; | |
69 | ||
70 | (*pTime)++; | |
71 | ||
72 | /* | |
73 | * Reset IRQ source | |
74 | */ | |
75 | *IXP425_OSST = IXP425_OSST_TIMER_2_PEND; | |
76 | } | |
77 | ||
78 | ulong get_timer (ulong base) | |
79 | { | |
80 | return timestamp - base; | |
81 | } | |
82 | ||
83 | void reset_timer (void) | |
84 | { | |
85 | timestamp = 0; | |
86 | } | |
87 | ||
ba94a1bb | 88 | #endif /* #ifdef CONFIG_USE_IRQ */ |
2d5b561e | 89 | |
6d0943a6 | 90 | #ifdef CONFIG_USE_IRQ |
2d5b561e WD |
91 | void do_irq (struct pt_regs *pt_regs) |
92 | { | |
ba94a1bb WD |
93 | int irq = next_irq(); |
94 | ||
95 | IRQ_HANDLER[irq].m_func(IRQ_HANDLER[irq].m_data); | |
2d5b561e | 96 | } |
6d0943a6 | 97 | #endif |
2d5b561e | 98 | |
2d5b561e WD |
99 | int interrupt_init (void) |
100 | { | |
ba94a1bb WD |
101 | #ifdef CONFIG_USE_IRQ |
102 | int i; | |
103 | ||
104 | /* install default interrupt handlers */ | |
105 | for (i = 0; i < N_IRQS; i++) { | |
106 | IRQ_HANDLER[i].m_data = (void *)i; | |
107 | IRQ_HANDLER[i].m_func = default_isr; | |
108 | } | |
109 | ||
110 | /* install interrupt handler for timer */ | |
111 | IRQ_HANDLER[IXP425_TIMER_2_IRQ].m_data = (void *)×tamp; | |
112 | IRQ_HANDLER[IXP425_TIMER_2_IRQ].m_func = timer_isr; | |
113 | ||
114 | /* setup the Timer counter value */ | |
115 | *IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE; | |
116 | ||
117 | /* configure interrupts for IRQ mode */ | |
118 | *IXP425_ICLR = 0x00000000; | |
119 | ||
120 | /* enable timer irq */ | |
121 | *IXP425_ICMR = (1 << IXP425_TIMER_2_IRQ); | |
122 | #endif | |
123 | ||
2d5b561e WD |
124 | return (0); |
125 | } |