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53633a89 TR |
1 | // SPDX-License-Identifier: GPL-2.0-or-later OR MIT |
2 | /* | |
3 | * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. | |
4 | * (http://www.friendlyarm.com) | |
5 | * | |
6 | * Copyright (c) 2021-2023 Tianling Shen <[email protected]> | |
7 | */ | |
8 | ||
9 | /dts-v1/; | |
10 | #include "rk3328-nanopi-r2s.dts" | |
11 | ||
12 | / { | |
13 | model = "FriendlyElec NanoPi R2C"; | |
14 | compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328"; | |
15 | }; | |
16 | ||
17 | &gmac2io { | |
18 | phy-handle = <&yt8521s>; | |
19 | tx_delay = <0x22>; | |
20 | rx_delay = <0x12>; | |
21 | ||
22 | mdio { | |
23 | /delete-node/ ethernet-phy@1; | |
24 | ||
25 | yt8521s: ethernet-phy@3 { | |
26 | compatible = "ethernet-phy-ieee802.3-c22"; | |
27 | reg = <3>; | |
28 | ||
29 | motorcomm,clk-out-frequency-hz = <125000000>; | |
30 | motorcomm,keep-pll-enabled; | |
31 | motorcomm,auto-sleep-disabled; | |
32 | ||
33 | pinctrl-0 = <ð_phy_reset_pin>; | |
34 | pinctrl-names = "default"; | |
35 | reset-assert-us = <10000>; | |
36 | reset-deassert-us = <50000>; | |
37 | reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; | |
38 | }; | |
39 | }; | |
40 | }; |