projects / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 4b6067ae | 1 | CONFIG_PPC=y |
| c0f47562 | 2 | CONFIG_SYS_TEXT_BASE=0x30000000 |
| 77d2f7f5 | 3 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| cc4288ef | 4 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| 052170c6 TR |
5 | CONFIG_ENV_SIZE=0x2000 |
| 6 | CONFIG_ENV_OFFSET=0x100000 | |
| 2bba7807 | 7 | CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" |
| c5a6e9f8 | 8 | CONFIG_SPL_TEXT_BASE=0xFFFD8000 |
| 103c5f18 | 9 | CONFIG_SPL_MMC=y |
| 2a736066 | 10 | CONFIG_SPL_SERIAL=y |
| 9ca00684 | 11 | CONFIG_SPL_DRIVERS_MISC=y |
| c9542eae | 12 | CONFIG_SPL=y |
| 4b6067ae | 13 | CONFIG_MPC85xx=y |
| 319ed24a | 14 | CONFIG_TARGET_T1042D4RDB=y |
| de47ff53 | 15 | CONFIG_SYS_MPC85XX_NO_RESETVEC=y |
| 54c5c2b8 | 16 | CONFIG_MP=y |
| 73223f0e SG |
17 | CONFIG_FIT=y |
| 18 | CONFIG_FIT_VERBOSE=y | |
| 19 | CONFIG_OF_BOARD_SETUP=y | |
| 20 | CONFIG_OF_STDOUT_VIA_ALIAS=y | |
| d8ef01e9 TR |
21 | CONFIG_RAMBOOT_PBL=y |
| 22 | CONFIG_SYS_FSL_PBL_PBI="$(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg" | |
| 23 | CONFIG_SYS_FSL_PBL_RCW="$(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg" | |
| bb597c0e | 24 | CONFIG_BOOTDELAY=10 |
| 970bf860 TR |
25 | CONFIG_USE_BOOTCOMMAND=y |
| 26 | CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" | |
| 98af8799 | 27 | CONFIG_SILENT_CONSOLE=y |
| ef26d603 | 28 | CONFIG_SYS_CONSOLE_IS_IN_ENV=y |
| 42a2d90c | 29 | CONFIG_ARCH_MISC_INIT=y |
| a5d67547 | 30 | CONFIG_BOARD_EARLY_INIT_F=y |
| 02ddc147 | 31 | CONFIG_BOARD_EARLY_INIT_R=y |
| 75670c81 | 32 | # CONFIG_SPL_FRAMEWORK is not set |
| ca8a329a TR |
33 | CONFIG_SPL_MAX_SIZE=0x28000 |
| 34 | CONFIG_SPL_PAD_TO=0x40000 | |
| db4080d5 TR |
35 | CONFIG_SPL_MMC_BOOT=y |
| 36 | CONFIG_SPL_FSL_PBL=y | |
| 6074a536 | 37 | CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y |
| b35316fb TR |
38 | CONFIG_SPL_FLUSH_IMAGE=y |
| 39 | CONFIG_SPL_SKIP_RELOCATE=y | |
| 7f2c91e5 | 40 | CONFIG_SPL_GD_ADDR=0xfffc8000 |
| 55cf860b TR |
41 | CONFIG_SPL_RELOC_STACK=0xfffd8000 |
| 42 | CONFIG_SPL_RELOC_MALLOC=y | |
| 43 | CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 | |
| 44 | CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800 | |
| 8728c97e | 45 | CONFIG_SPL_ENV_SUPPORT=y |
| 975e7cf3 | 46 | CONFIG_SPL_I2C=y |
| 6f004ada | 47 | CONFIG_SPL_MPC8XXX_INIT_DDR=y |
| adad96e6 | 48 | CONFIG_HUSH_PARSER=y |
| d0ee7f29 | 49 | CONFIG_SYS_PBSIZE=276 |
| ad12dc18 | 50 | CONFIG_CMD_IMLS=y |
| 89cb2b5f | 51 | CONFIG_CMD_GREPENV=y |
| 20830d0c | 52 | CONFIG_CMD_DM=y |
| 88663126 | 53 | CONFIG_CMD_I2C=y |
| 89cb2b5f | 54 | CONFIG_CMD_MMC=y |
| 78d1e1d0 TR |
55 | CONFIG_CMD_USB=y |
| 56 | CONFIG_CMD_DHCP=y | |
| 89cb2b5f | 57 | CONFIG_CMD_MII=y |
| 78d1e1d0 | 58 | CONFIG_CMD_PING=y |
| 89cb2b5f TR |
59 | CONFIG_CMD_EXT2=y |
| 60 | CONFIG_CMD_FAT=y | |
| 43ede0bc TR |
61 | CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" |
| 62 | CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)" | |
| fa360285 | 63 | CONFIG_OF_CONTROL=y |
| e91907a1 | 64 | CONFIG_ENV_OVERWRITE=y |
| 5dc4dfd2 | 65 | CONFIG_ENV_IS_IN_MMC=y |
| fdfb17b1 TR |
66 | CONFIG_USE_BOOTFILE=y |
| 67 | CONFIG_BOOTFILE="uImage" | |
| 0e14cdfa TR |
68 | CONFIG_USE_ETHPRIME=y |
| 69 | CONFIG_ETHPRIME="FM1@DTSEC4" | |
| 665c35a7 | 70 | CONFIG_DM=y |
| 28522678 | 71 | CONFIG_FSL_CAAM=y |
| efb5dab7 | 72 | CONFIG_DDR_CLK_FREQ=66666666 |
| f9147d63 | 73 | CONFIG_CHIP_SELECTS_PER_CTRL=2 |
| 95372165 TR |
74 | CONFIG_DDR_ECC=y |
| 75 | CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y | |
| b11dc33e | 76 | CONFIG_DM_I2C=y |
| 55dabcc8 | 77 | CONFIG_SPL_SYS_I2C_LEGACY=y |
| fc8d3b9a | 78 | CONFIG_I2C_SET_DEFAULT_BUS_NUM=y |
| 6d5d0c95 TR |
79 | CONFIG_SYS_I2C_FSL=y |
| 80 | CONFIG_SYS_FSL_I2C_OFFSET=0x118000 | |
| 81 | CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y | |
| 82 | CONFIG_SYS_FSL_I2C2_OFFSET=0x118100 | |
| 83 | CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y | |
| 84 | CONFIG_SYS_FSL_I2C3_OFFSET=0x119000 | |
| 85 | CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y | |
| 86 | CONFIG_SYS_FSL_I2C4_OFFSET=0x119100 | |
| 07dea2e7 | 87 | CONFIG_FSL_ESDHC=y |
| 0cfccb54 | 88 | CONFIG_MTD=y |
| 2fe88d45 AF |
89 | CONFIG_MTD_NOR_FLASH=y |
| 90 | CONFIG_FLASH_CFI_DRIVER=y | |
| 91 | CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y | |
| 92 | CONFIG_FLASH_CFI_MTD=y | |
| 93 | CONFIG_SYS_FLASH_CFI=y | |
| 0f9595b9 | 94 | CONFIG_SYS_MAX_FLASH_BANKS=2 |
| b24550ac | 95 | CONFIG_DM_SPI_FLASH=y |
| 14453fbf | 96 | CONFIG_SF_DEFAULT_SPEED=10000000 |
| 68d53420 | 97 | CONFIG_SPI_FLASH_STMICRO=y |
| 3146f0c0 | 98 | CONFIG_PHYLIB=y |
| 306881a0 TR |
99 | CONFIG_PHY_REALTEK=y |
| 100 | CONFIG_PHY_VITESSE=y | |
| 20830d0c CG |
101 | CONFIG_DM_ETH=y |
| 102 | CONFIG_DM_MDIO=y | |
| 1989374b | 103 | CONFIG_PHY_GIGE=y |
| a77fda1f | 104 | CONFIG_E1000=y |
| 665c35a7 | 105 | CONFIG_FMAN_ENET=y |
| a97a071d | 106 | CONFIG_SYS_FMAN_FW_ADDR=0x10400 |
| 665c35a7 | 107 | CONFIG_MII=y |
| 7a963978 | 108 | CONFIG_PCIE_FSL=y |
| f76750d1 | 109 | CONFIG_U_QE=y |
| 4118a5b1 | 110 | CONFIG_SYS_QE_FW_ADDR=0x124000 |
| cc1e98b5 | 111 | CONFIG_SYS_QE_FMAN_FW_IN_MMC=y |
| b11dc33e | 112 | CONFIG_DM_RTC=y |
| 9e39003e | 113 | CONFIG_SYS_NS16550=y |
| f1b1f770 | 114 | CONFIG_SPI=y |
| b24550ac | 115 | CONFIG_DM_SPI=y |
| e5d5d447 | 116 | CONFIG_FSL_ESPI=y |
| 645176d1 | 117 | CONFIG_USB=y |
| f76750d1 | 118 | CONFIG_USB_EHCI_FSL=y |
| 3371edda | 119 | CONFIG_USB_MAX_CONTROLLER_COUNT=2 |
| b24550ac | 120 | CONFIG_USB_STORAGE=y |
| 69be8fd1 MS |
121 | CONFIG_ADDR_MAP=y |
| 122 | CONFIG_SYS_NUM_ADDR_MAP=64 |