]>
Commit | Line | Data |
---|---|---|
439321b2 | 1 | CONFIG_ARM=y |
439321b2 PF |
2 | CONFIG_ARCH_IMX8M=y |
3 | CONFIG_SYS_TEXT_BASE=0x40200000 | |
9802154a | 4 | CONFIG_SYS_MALLOC_LEN=0x2000000 |
83061dbd | 5 | CONFIG_SPL_GPIO=y |
439321b2 PF |
6 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
7 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | |
556fd590 TR |
8 | CONFIG_ENV_SIZE=0x1000 |
9 | CONFIG_ENV_OFFSET=0x400000 | |
052170c6 TR |
10 | CONFIG_SYS_I2C_MXC_I2C1=y |
11 | CONFIG_SYS_I2C_MXC_I2C2=y | |
12 | CONFIG_SYS_I2C_MXC_I2C3=y | |
439321b2 | 13 | CONFIG_DM_GPIO=y |
2bba7807 | 14 | CONFIG_DEFAULT_DEVICE_TREE="imx8mp-evk" |
c5a6e9f8 | 15 | CONFIG_SPL_TEXT_BASE=0x920000 |
439321b2 | 16 | CONFIG_TARGET_IMX8MP_EVK=y |
103c5f18 | 17 | CONFIG_SPL_MMC=y |
2a736066 | 18 | CONFIG_SPL_SERIAL=y |
9ca00684 | 19 | CONFIG_SPL_DRIVERS_MISC=y |
439321b2 PF |
20 | CONFIG_SPL=y |
21 | CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 | |
49c8ef0e | 22 | CONFIG_SYS_LOAD_ADDR=0x40480000 |
d46e86d2 | 23 | CONFIG_DISTRO_DEFAULTS=y |
439321b2 PF |
24 | CONFIG_FIT=y |
25 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | |
26 | CONFIG_SPL_LOAD_FIT=y | |
1e4ed2d6 | 27 | # CONFIG_USE_SPL_FIT_GENERATOR is not set |
439321b2 | 28 | CONFIG_OF_SYSTEM_SETUP=y |
439321b2 | 29 | CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb" |
0817daa7 | 30 | CONFIG_BOARD_LATE_INIT=y |
ca8a329a | 31 | CONFIG_SPL_MAX_SIZE=0x26000 |
6600b355 TR |
32 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
33 | CONFIG_SPL_BSS_START_ADDR=0x98fc00 | |
9b5f9aeb | 34 | CONFIG_SPL_BSS_MAX_SIZE=0x400 |
439321b2 PF |
35 | CONFIG_SPL_BOARD_INIT=y |
36 | CONFIG_SPL_BOOTROM_SUPPORT=y | |
7635defa | 37 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
f113d7d3 TR |
38 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
39 | CONFIG_SPL_STACK=0x960000 | |
10f6e4dc TR |
40 | CONFIG_SYS_SPL_MALLOC=y |
41 | CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y | |
42 | CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 | |
43 | CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 | |
f76750d1 TR |
44 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y |
45 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 | |
975e7cf3 | 46 | CONFIG_SPL_I2C=y |
933b2f09 | 47 | CONFIG_SPL_POWER=y |
078111b9 | 48 | CONFIG_SPL_WATCHDOG=y |
439321b2 | 49 | CONFIG_SYS_PROMPT="u-boot=> " |
cf493582 | 50 | CONFIG_SYS_MAXARGS=64 |
d31466b3 | 51 | CONFIG_SYS_CBSIZE=2048 |
d0ee7f29 | 52 | CONFIG_SYS_PBSIZE=2074 |
439321b2 PF |
53 | # CONFIG_CMD_EXPORTENV is not set |
54 | # CONFIG_CMD_IMPORTENV is not set | |
55 | # CONFIG_CMD_CRC32 is not set | |
56 | CONFIG_CMD_CLK=y | |
57 | CONFIG_CMD_FUSE=y | |
58 | CONFIG_CMD_GPIO=y | |
59 | CONFIG_CMD_I2C=y | |
60 | CONFIG_CMD_MMC=y | |
61 | CONFIG_CMD_CACHE=y | |
62 | CONFIG_CMD_REGULATOR=y | |
439321b2 | 63 | CONFIG_CMD_EXT4_WRITE=y |
439321b2 PF |
64 | CONFIG_OF_CONTROL=y |
65 | CONFIG_SPL_OF_CONTROL=y | |
e91907a1 | 66 | CONFIG_ENV_OVERWRITE=y |
439321b2 PF |
67 | CONFIG_ENV_IS_IN_MMC=y |
68 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | |
7d080773 | 69 | CONFIG_SYS_MMC_ENV_DEV=1 |
439321b2 | 70 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
0e14cdfa TR |
71 | CONFIG_USE_ETHPRIME=y |
72 | CONFIG_ETHPRIME="eth1" | |
439321b2 PF |
73 | CONFIG_SPL_DM=y |
74 | CONFIG_CLK_COMPOSITE_CCF=y | |
75 | CONFIG_CLK_IMX8MP=y | |
76 | CONFIG_MXC_GPIO=y | |
77 | CONFIG_DM_PCA953X=y | |
78 | CONFIG_DM_I2C=y | |
a907dce8 | 79 | # CONFIG_SPL_DM_I2C is not set |
55dabcc8 | 80 | CONFIG_SPL_SYS_I2C_LEGACY=y |
439321b2 PF |
81 | CONFIG_LED=y |
82 | CONFIG_LED_GPIO=y | |
439321b2 PF |
83 | CONFIG_SUPPORT_EMMC_BOOT=y |
84 | CONFIG_MMC_IO_VOLTAGE=y | |
e601f0f9 AZ |
85 | CONFIG_MMC_UHS_SUPPORT=y |
86 | CONFIG_MMC_HS400_ES_SUPPORT=y | |
87 | CONFIG_MMC_HS400_SUPPORT=y | |
1ed68f92 | 88 | CONFIG_FSL_USDHC=y |
48b90f86 | 89 | CONFIG_PHY_REALTEK=y |
439321b2 | 90 | CONFIG_DM_ETH=y |
b65dc989 | 91 | CONFIG_DM_ETH_PHY=y |
48b90f86 PF |
92 | CONFIG_PHY_GIGE=y |
93 | CONFIG_DWC_ETH_QOS=y | |
b65dc989 | 94 | CONFIG_DWC_ETH_QOS_IMX=y |
48b90f86 PF |
95 | CONFIG_FEC_MXC=y |
96 | CONFIG_MII=y | |
439321b2 PF |
97 | CONFIG_PINCTRL=y |
98 | CONFIG_SPL_PINCTRL=y | |
99 | CONFIG_PINCTRL_IMX8M=y | |
9d8665b7 | 100 | CONFIG_SPL_POWER_LEGACY=y |
439321b2 PF |
101 | CONFIG_DM_REGULATOR=y |
102 | CONFIG_DM_REGULATOR_FIXED=y | |
103 | CONFIG_DM_REGULATOR_GPIO=y | |
9d8665b7 | 104 | CONFIG_SPL_POWER_I2C=y |
ae188eb6 | 105 | CONFIG_DM_SERIAL=y |
439321b2 PF |
106 | CONFIG_MXC_UART=y |
107 | CONFIG_SYSRESET=y | |
f24dea4e | 108 | CONFIG_SPL_SYSRESET=y |
439321b2 | 109 | CONFIG_SYSRESET_PSCI=y |
f24dea4e | 110 | CONFIG_SYSRESET_WATCHDOG=y |
f24dea4e | 111 | CONFIG_IMX_WATCHDOG=y |