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1f045217 | 1 | /* |
385c9ef5 HS |
2 | * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net> |
3 | * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de> | |
4 | * Changes for multibus/multiadapter I2C support. | |
5 | * | |
1f045217 WD |
6 | * (C) Copyright 2001 |
7 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. | |
8 | * | |
1a459660 | 9 | * SPDX-License-Identifier: GPL-2.0+ |
1f045217 WD |
10 | * |
11 | * The original I2C interface was | |
12 | * (C) 2000 by Paolo Scaffardi (arsenio@tin.it) | |
13 | * AIRVENT SAM s.p.a - RIMINI(ITALY) | |
14 | * but has been changed substantially. | |
15 | */ | |
16 | ||
17 | #ifndef _I2C_H_ | |
18 | #define _I2C_H_ | |
19 | ||
c6202d85 SG |
20 | /* |
21 | * For now there are essentially two parts to this file - driver model | |
22 | * here at the top, and the older code below (with CONFIG_SYS_I2C being | |
23 | * most recent). The plan is to migrate everything to driver model. | |
24 | * The driver model structures and API are separate as they are different | |
25 | * enough as to be incompatible for compilation purposes. | |
26 | */ | |
27 | ||
28 | #ifdef CONFIG_DM_I2C | |
29 | ||
30 | enum dm_i2c_chip_flags { | |
31 | DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */ | |
32 | DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */ | |
33 | DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */ | |
34 | }; | |
35 | ||
36 | /** | |
37 | * struct dm_i2c_chip - information about an i2c chip | |
38 | * | |
39 | * An I2C chip is a device on the I2C bus. It sits at a particular address | |
40 | * and normally supports 7-bit or 10-bit addressing. | |
41 | * | |
42 | * To obtain this structure, use dev_get_parentdata(dev) where dev is the | |
43 | * chip to examine. | |
44 | * | |
45 | * @chip_addr: Chip address on bus | |
46 | * @offset_len: Length of offset in bytes. A single byte offset can | |
47 | * represent up to 256 bytes. A value larger than 1 may be | |
48 | * needed for larger devices. | |
49 | * @flags: Flags for this chip (dm_i2c_chip_flags) | |
50 | * @emul: Emulator for this chip address (only used for emulation) | |
51 | */ | |
52 | struct dm_i2c_chip { | |
53 | uint chip_addr; | |
54 | uint offset_len; | |
55 | uint flags; | |
56 | #ifdef CONFIG_SANDBOX | |
57 | struct udevice *emul; | |
58 | #endif | |
59 | }; | |
60 | ||
61 | /** | |
62 | * struct dm_i2c_bus- information about an i2c bus | |
63 | * | |
64 | * An I2C bus contains 0 or more chips on it, each at its own address. The | |
65 | * bus can operate at different speeds (measured in Hz, typically 100KHz | |
66 | * or 400KHz). | |
67 | * | |
68 | * To obtain this structure, use bus->uclass_priv where bus is the I2C | |
69 | * bus udevice. | |
70 | * | |
71 | * @speed_hz: Bus speed in hertz (typically 100000) | |
72 | */ | |
73 | struct dm_i2c_bus { | |
74 | int speed_hz; | |
75 | }; | |
76 | ||
77 | /** | |
78 | * i2c_read() - read bytes from an I2C chip | |
79 | * | |
80 | * To obtain an I2C device (called a 'chip') given the I2C bus address you | |
81 | * can use i2c_get_chip(). To obtain a bus by bus number use | |
82 | * uclass_get_device_by_seq(UCLASS_I2C, <bus number>). | |
83 | * | |
84 | * To set the address length of a devce use i2c_set_addr_len(). It | |
85 | * defaults to 1. | |
86 | * | |
87 | * @dev: Chip to read from | |
88 | * @offset: Offset within chip to start reading | |
89 | * @buffer: Place to put data | |
90 | * @len: Number of bytes to read | |
91 | * | |
92 | * @return 0 on success, -ve on failure | |
93 | */ | |
94 | int i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, | |
95 | int len); | |
96 | ||
97 | /** | |
98 | * i2c_write() - write bytes to an I2C chip | |
99 | * | |
100 | * See notes for i2c_read() above. | |
101 | * | |
102 | * @dev: Chip to write to | |
103 | * @offset: Offset within chip to start writing | |
104 | * @buffer: Buffer containing data to write | |
105 | * @len: Number of bytes to write | |
106 | * | |
107 | * @return 0 on success, -ve on failure | |
108 | */ | |
109 | int i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer, | |
110 | int len); | |
111 | ||
112 | /** | |
113 | * i2c_probe() - probe a particular chip address | |
114 | * | |
115 | * This can be useful to check for the existence of a chip on the bus. | |
116 | * It is typically implemented by writing the chip address to the bus | |
117 | * and checking that the chip replies with an ACK. | |
118 | * | |
119 | * @bus: Bus to probe | |
120 | * @chip_addr: 7-bit address to probe (10-bit and others are not supported) | |
121 | * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags) | |
122 | * @devp: Returns the device found, or NULL if none | |
123 | * @return 0 if a chip was found at that address, -ve if not | |
124 | */ | |
125 | int i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, | |
126 | struct udevice **devp); | |
127 | ||
128 | /** | |
129 | * i2c_set_bus_speed() - set the speed of a bus | |
130 | * | |
131 | * @bus: Bus to adjust | |
132 | * @speed: Requested speed in Hz | |
133 | * @return 0 if OK, -EINVAL for invalid values | |
134 | */ | |
135 | int i2c_set_bus_speed(struct udevice *bus, unsigned int speed); | |
136 | ||
137 | /** | |
138 | * i2c_get_bus_speed() - get the speed of a bus | |
139 | * | |
140 | * @bus: Bus to check | |
141 | * @return speed of selected I2C bus in Hz, -ve on error | |
142 | */ | |
143 | int i2c_get_bus_speed(struct udevice *bus); | |
144 | ||
145 | /** | |
146 | * i2c_set_chip_flags() - set flags for a chip | |
147 | * | |
148 | * Typically addresses are 7 bits, but for 10-bit addresses you should set | |
149 | * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing. | |
150 | * | |
151 | * @dev: Chip to adjust | |
152 | * @flags: New flags | |
153 | * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error | |
154 | */ | |
155 | int i2c_set_chip_flags(struct udevice *dev, uint flags); | |
156 | ||
157 | /** | |
158 | * i2c_get_chip_flags() - get flags for a chip | |
159 | * | |
160 | * @dev: Chip to check | |
161 | * @flagsp: Place to put flags | |
162 | * @return 0 if OK, other -ve value on error | |
163 | */ | |
164 | int i2c_get_chip_flags(struct udevice *dev, uint *flagsp); | |
165 | ||
166 | /** | |
167 | * i2c_set_offset_len() - set the offset length for a chip | |
168 | * | |
169 | * The offset used to access a chip may be up to 4 bytes long. Typically it | |
170 | * is only 1 byte, which is enough for chips with 256 bytes of memory or | |
171 | * registers. The default value is 1, but you can call this function to | |
172 | * change it. | |
173 | * | |
174 | * @offset_len: New offset length value (typically 1 or 2) | |
175 | */ | |
176 | ||
177 | int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len); | |
178 | /** | |
179 | * i2c_deblock() - recover a bus that is in an unknown state | |
180 | * | |
181 | * See the deblock() method in 'struct dm_i2c_ops' for full information | |
182 | * | |
183 | * @bus: Bus to recover | |
184 | * @return 0 if OK, -ve on error | |
185 | */ | |
186 | int i2c_deblock(struct udevice *bus); | |
187 | ||
188 | /* | |
189 | * Not all of these flags are implemented in the U-Boot API | |
190 | */ | |
191 | enum dm_i2c_msg_flags { | |
192 | I2C_M_TEN = 0x0010, /* ten-bit chip address */ | |
193 | I2C_M_RD = 0x0001, /* read data, from slave to master */ | |
194 | I2C_M_STOP = 0x8000, /* send stop after this message */ | |
195 | I2C_M_NOSTART = 0x4000, /* no start before this message */ | |
196 | I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */ | |
197 | I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */ | |
198 | I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */ | |
199 | I2C_M_RECV_LEN = 0x0400, /* length is first received byte */ | |
200 | }; | |
201 | ||
202 | /** | |
203 | * struct i2c_msg - an I2C message | |
204 | * | |
205 | * @addr: Slave address | |
206 | * @flags: Flags (see enum dm_i2c_msg_flags) | |
207 | * @len: Length of buffer in bytes, may be 0 for a probe | |
208 | * @buf: Buffer to send/receive, or NULL if no data | |
209 | */ | |
210 | struct i2c_msg { | |
211 | uint addr; | |
212 | uint flags; | |
213 | uint len; | |
214 | u8 *buf; | |
215 | }; | |
216 | ||
217 | /** | |
218 | * struct i2c_msg_list - a list of I2C messages | |
219 | * | |
220 | * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem | |
221 | * appropriate in U-Boot. | |
222 | * | |
223 | * @msg: Pointer to i2c_msg array | |
224 | * @nmsgs: Number of elements in the array | |
225 | */ | |
226 | struct i2c_msg_list { | |
227 | struct i2c_msg *msgs; | |
228 | uint nmsgs; | |
229 | }; | |
230 | ||
231 | /** | |
232 | * struct dm_i2c_ops - driver operations for I2C uclass | |
233 | * | |
234 | * Drivers should support these operations unless otherwise noted. These | |
235 | * operations are intended to be used by uclass code, not directly from | |
236 | * other code. | |
237 | */ | |
238 | struct dm_i2c_ops { | |
239 | /** | |
240 | * xfer() - transfer a list of I2C messages | |
241 | * | |
242 | * @bus: Bus to read from | |
243 | * @msg: List of messages to transfer | |
244 | * @nmsgs: Number of messages in the list | |
245 | * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte, | |
246 | * -ECOMM if the speed cannot be supported, -EPROTO if the chip | |
247 | * flags cannot be supported, other -ve value on some other error | |
248 | */ | |
249 | int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs); | |
250 | ||
251 | /** | |
252 | * probe_chip() - probe for the presense of a chip address | |
253 | * | |
254 | * This function is optional. If omitted, the uclass will send a zero | |
255 | * length message instead. | |
256 | * | |
257 | * @bus: Bus to probe | |
258 | * @chip_addr: Chip address to probe | |
259 | * @chip_flags: Probe flags (enum dm_i2c_chip_flags) | |
260 | * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back | |
261 | * to default probem other -ve value on error | |
262 | */ | |
263 | int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags); | |
264 | ||
265 | /** | |
266 | * set_bus_speed() - set the speed of a bus (optional) | |
267 | * | |
268 | * The bus speed value will be updated by the uclass if this function | |
269 | * does not return an error. This method is optional - if it is not | |
270 | * provided then the driver can read the speed from | |
271 | * bus->uclass_priv->speed_hz | |
272 | * | |
273 | * @bus: Bus to adjust | |
274 | * @speed: Requested speed in Hz | |
275 | * @return 0 if OK, -EINVAL for invalid values | |
276 | */ | |
277 | int (*set_bus_speed)(struct udevice *bus, unsigned int speed); | |
278 | ||
279 | /** | |
280 | * get_bus_speed() - get the speed of a bus (optional) | |
281 | * | |
282 | * Normally this can be provided by the uclass, but if you want your | |
283 | * driver to check the bus speed by looking at the hardware, you can | |
284 | * implement that here. This method is optional. This method would | |
285 | * normally be expected to return bus->uclass_priv->speed_hz. | |
286 | * | |
287 | * @bus: Bus to check | |
288 | * @return speed of selected I2C bus in Hz, -ve on error | |
289 | */ | |
290 | int (*get_bus_speed)(struct udevice *bus); | |
291 | ||
292 | /** | |
293 | * set_flags() - set the flags for a chip (optional) | |
294 | * | |
295 | * This is generally implemented by the uclass, but drivers can | |
296 | * check the value to ensure that unsupported options are not used. | |
297 | * This method is optional. If provided, this method will always be | |
298 | * called when the flags change. | |
299 | * | |
300 | * @dev: Chip to adjust | |
301 | * @flags: New flags value | |
302 | * @return 0 if OK, -EINVAL if value is unsupported | |
303 | */ | |
304 | int (*set_flags)(struct udevice *dev, uint flags); | |
305 | ||
306 | /** | |
307 | * deblock() - recover a bus that is in an unknown state | |
308 | * | |
309 | * I2C is a synchronous protocol and resets of the processor in the | |
310 | * middle of an access can block the I2C Bus until a powerdown of | |
311 | * the full unit is done. This is because slaves can be stuck | |
312 | * waiting for addition bus transitions for a transaction that will | |
313 | * never complete. Resetting the I2C master does not help. The only | |
314 | * way is to force the bus through a series of transitions to make | |
315 | * sure that all slaves are done with the transaction. This method | |
316 | * performs this 'deblocking' if support by the driver. | |
317 | * | |
318 | * This method is optional. | |
319 | */ | |
320 | int (*deblock)(struct udevice *bus); | |
321 | }; | |
322 | ||
323 | #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops) | |
324 | ||
325 | /** | |
326 | * i2c_get_chip() - get a device to use to access a chip on a bus | |
327 | * | |
328 | * This returns the device for the given chip address. The device can then | |
329 | * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc. | |
330 | * | |
331 | * @bus: Bus to examine | |
332 | * @chip_addr: Chip address for the new device | |
333 | * @devp: Returns pointer to new device if found or -ENODEV if not | |
334 | * found | |
335 | */ | |
336 | int i2c_get_chip(struct udevice *bus, uint chip_addr, struct udevice **devp); | |
337 | ||
338 | /** | |
339 | * i2c_get_chip() - get a device to use to access a chip on a bus number | |
340 | * | |
341 | * This returns the device for the given chip address on a particular bus | |
342 | * number. | |
343 | * | |
344 | * @busnum: Bus number to examine | |
345 | * @chip_addr: Chip address for the new device | |
346 | * @devp: Returns pointer to new device if found or -ENODEV if not | |
347 | * found | |
348 | */ | |
349 | int i2c_get_chip_for_busnum(int busnum, int chip_addr, struct udevice **devp); | |
350 | ||
351 | /** | |
352 | * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data | |
353 | * | |
354 | * This decodes the chip address from a device tree node and puts it into | |
355 | * its dm_i2c_chip structure. This should be called in your driver's | |
356 | * ofdata_to_platdata() method. | |
357 | * | |
358 | * @blob: Device tree blob | |
359 | * @node: Node offset to read from | |
360 | * @spi: Place to put the decoded information | |
361 | */ | |
362 | int i2c_chip_ofdata_to_platdata(const void *blob, int node, | |
363 | struct dm_i2c_chip *chip); | |
364 | ||
365 | #endif | |
366 | ||
367 | #ifndef CONFIG_DM_I2C | |
368 | ||
1f045217 WD |
369 | /* |
370 | * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING | |
371 | * | |
372 | * The implementation MUST NOT use static or global variables if the | |
373 | * I2C routines are used to read SDRAM configuration information | |
374 | * because this is done before the memories are initialized. Limited | |
375 | * use of stack-based variables are OK (the initial stack size is | |
376 | * limited). | |
377 | * | |
378 | * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING | |
379 | */ | |
380 | ||
381 | /* | |
382 | * Configuration items. | |
383 | */ | |
384 | #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */ | |
385 | ||
385c9ef5 HS |
386 | #if !defined(CONFIG_SYS_I2C_MAX_HOPS) |
387 | /* no muxes used bus = i2c adapters */ | |
388 | #define CONFIG_SYS_I2C_DIRECT_BUS 1 | |
389 | #define CONFIG_SYS_I2C_MAX_HOPS 0 | |
390 | #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c) | |
79b2d0bb | 391 | #else |
385c9ef5 HS |
392 | /* we use i2c muxes */ |
393 | #undef CONFIG_SYS_I2C_DIRECT_BUS | |
79b2d0bb SR |
394 | #endif |
395 | ||
8c12045a | 396 | /* define the I2C bus number for RTC and DTT if not already done */ |
6d0f6bcf JCPV |
397 | #if !defined(CONFIG_SYS_RTC_BUS_NUM) |
398 | #define CONFIG_SYS_RTC_BUS_NUM 0 | |
8c12045a | 399 | #endif |
6d0f6bcf JCPV |
400 | #if !defined(CONFIG_SYS_DTT_BUS_NUM) |
401 | #define CONFIG_SYS_DTT_BUS_NUM 0 | |
8c12045a | 402 | #endif |
6d0f6bcf JCPV |
403 | #if !defined(CONFIG_SYS_SPD_BUS_NUM) |
404 | #define CONFIG_SYS_SPD_BUS_NUM 0 | |
d8a8ea5c | 405 | #endif |
8c12045a | 406 | |
385c9ef5 HS |
407 | struct i2c_adapter { |
408 | void (*init)(struct i2c_adapter *adap, int speed, | |
409 | int slaveaddr); | |
410 | int (*probe)(struct i2c_adapter *adap, uint8_t chip); | |
411 | int (*read)(struct i2c_adapter *adap, uint8_t chip, | |
412 | uint addr, int alen, uint8_t *buffer, | |
413 | int len); | |
414 | int (*write)(struct i2c_adapter *adap, uint8_t chip, | |
415 | uint addr, int alen, uint8_t *buffer, | |
416 | int len); | |
417 | uint (*set_bus_speed)(struct i2c_adapter *adap, | |
418 | uint speed); | |
419 | int speed; | |
d5243359 | 420 | int waitdelay; |
385c9ef5 HS |
421 | int slaveaddr; |
422 | int init_done; | |
423 | int hwadapnr; | |
424 | char *name; | |
425 | }; | |
426 | ||
427 | #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ | |
428 | _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \ | |
429 | { \ | |
430 | .init = _init, \ | |
431 | .probe = _probe, \ | |
432 | .read = _read, \ | |
433 | .write = _write, \ | |
434 | .set_bus_speed = _set_speed, \ | |
435 | .speed = _speed, \ | |
436 | .slaveaddr = _slaveaddr, \ | |
437 | .init_done = 0, \ | |
438 | .hwadapnr = _hwadapnr, \ | |
439 | .name = #_name \ | |
440 | }; | |
441 | ||
442 | #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \ | |
443 | _set_speed, _speed, _slaveaddr, _hwadapnr) \ | |
444 | ll_entry_declare(struct i2c_adapter, _name, i2c) = \ | |
445 | U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ | |
446 | _set_speed, _speed, _slaveaddr, _hwadapnr, _name); | |
447 | ||
448 | struct i2c_adapter *i2c_get_adapter(int index); | |
449 | ||
450 | #ifndef CONFIG_SYS_I2C_DIRECT_BUS | |
451 | struct i2c_mux { | |
452 | int id; | |
453 | char name[16]; | |
454 | }; | |
455 | ||
456 | struct i2c_next_hop { | |
457 | struct i2c_mux mux; | |
458 | uint8_t chip; | |
459 | uint8_t channel; | |
460 | }; | |
461 | ||
462 | struct i2c_bus_hose { | |
463 | int adapter; | |
464 | struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS]; | |
465 | }; | |
466 | #define I2C_NULL_HOP {{-1, ""}, 0, 0} | |
467 | extern struct i2c_bus_hose i2c_bus[]; | |
468 | ||
469 | #define I2C_ADAPTER(bus) i2c_bus[bus].adapter | |
470 | #else | |
471 | #define I2C_ADAPTER(bus) bus | |
472 | #endif | |
473 | #define I2C_BUS gd->cur_i2c_bus | |
474 | ||
475 | #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus)) | |
476 | #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus) | |
477 | #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr) | |
478 | ||
479 | #ifndef CONFIG_SYS_I2C_DIRECT_BUS | |
480 | #define I2C_MUX_PCA9540_ID 1 | |
481 | #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"} | |
482 | #define I2C_MUX_PCA9542_ID 2 | |
483 | #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"} | |
484 | #define I2C_MUX_PCA9544_ID 3 | |
485 | #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"} | |
486 | #define I2C_MUX_PCA9547_ID 4 | |
487 | #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"} | |
e6658749 MB |
488 | #define I2C_MUX_PCA9548_ID 5 |
489 | #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"} | |
385c9ef5 HS |
490 | #endif |
491 | ||
98aed379 HS |
492 | #ifndef I2C_SOFT_DECLARATIONS |
493 | # if defined(CONFIG_MPC8260) | |
6d0f6bcf | 494 | # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT); |
98aed379 | 495 | # elif defined(CONFIG_8xx) |
6d0f6bcf | 496 | # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; |
0cf0b931 JS |
497 | |
498 | # elif (defined(CONFIG_AT91RM9200) || \ | |
499 | defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ | |
cb96a0a4 | 500 | defined(CONFIG_AT91SAM9263)) |
78132275 | 501 | # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; |
98aed379 HS |
502 | # else |
503 | # define I2C_SOFT_DECLARATIONS | |
504 | # endif | |
505 | #endif | |
ecf5f077 TT |
506 | |
507 | #ifdef CONFIG_8xx | |
9c90a2c8 | 508 | /* Set default value for the I2C bus speed on 8xx. In the |
ecf5f077 TT |
509 | * future, we'll define these in all 8xx board config files. |
510 | */ | |
511 | #ifndef CONFIG_SYS_I2C_SPEED | |
512 | #define CONFIG_SYS_I2C_SPEED 50000 | |
513 | #endif | |
9c90a2c8 | 514 | #endif |
ecf5f077 | 515 | |
9c90a2c8 PT |
516 | /* |
517 | * Many boards/controllers/drivers don't support an I2C slave interface so | |
518 | * provide a default slave address for them for use in common code. A real | |
519 | * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does | |
520 | * support a slave interface. | |
521 | */ | |
ecf5f077 | 522 | #ifndef CONFIG_SYS_I2C_SLAVE |
9c90a2c8 | 523 | #define CONFIG_SYS_I2C_SLAVE 0xfe |
ecf5f077 TT |
524 | #endif |
525 | ||
1f045217 WD |
526 | /* |
527 | * Initialization, must be called once on start up, may be called | |
528 | * repeatedly to change the speed and slave addresses. | |
529 | */ | |
530 | void i2c_init(int speed, int slaveaddr); | |
06d01dbe | 531 | void i2c_init_board(void); |
26a33504 RR |
532 | #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT |
533 | void i2c_board_late_init(void); | |
534 | #endif | |
1f045217 | 535 | |
385c9ef5 | 536 | #ifdef CONFIG_SYS_I2C |
385c9ef5 HS |
537 | /* |
538 | * i2c_get_bus_num: | |
539 | * | |
540 | * Returns index of currently active I2C bus. Zero-based. | |
541 | */ | |
542 | unsigned int i2c_get_bus_num(void); | |
543 | ||
544 | /* | |
545 | * i2c_set_bus_num: | |
546 | * | |
547 | * Change the active I2C bus. Subsequent read/write calls will | |
548 | * go to this one. | |
549 | * | |
550 | * bus - bus index, zero based | |
551 | * | |
552 | * Returns: 0 on success, not 0 on failure | |
553 | * | |
554 | */ | |
555 | int i2c_set_bus_num(unsigned int bus); | |
556 | ||
557 | /* | |
558 | * i2c_init_all(): | |
559 | * | |
560 | * Initializes all I2C adapters in the system. All i2c_adap structures must | |
561 | * be initialized beforehead with function pointers and data, including | |
562 | * speed and slaveaddr. Returns 0 on success, non-0 on failure. | |
563 | */ | |
564 | void i2c_init_all(void); | |
565 | ||
566 | /* | |
567 | * Probe the given I2C chip address. Returns 0 if a chip responded, | |
568 | * not 0 on failure. | |
569 | */ | |
570 | int i2c_probe(uint8_t chip); | |
571 | ||
572 | /* | |
573 | * Read/Write interface: | |
574 | * chip: I2C chip address, range 0..127 | |
575 | * addr: Memory (register) address within the chip | |
576 | * alen: Number of bytes to use for addr (typically 1, 2 for larger | |
577 | * memories, 0 for register type devices with only one | |
578 | * register) | |
579 | * buffer: Where to read/write the data | |
580 | * len: How many bytes to read/write | |
581 | * | |
582 | * Returns: 0 on success, not 0 on failure | |
583 | */ | |
584 | int i2c_read(uint8_t chip, unsigned int addr, int alen, | |
585 | uint8_t *buffer, int len); | |
586 | ||
587 | int i2c_write(uint8_t chip, unsigned int addr, int alen, | |
588 | uint8_t *buffer, int len); | |
589 | ||
590 | /* | |
591 | * Utility routines to read/write registers. | |
592 | */ | |
593 | uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); | |
594 | ||
595 | void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); | |
596 | ||
597 | /* | |
598 | * i2c_set_bus_speed: | |
599 | * | |
600 | * Change the speed of the active I2C bus | |
601 | * | |
602 | * speed - bus speed in Hz | |
603 | * | |
604 | * Returns: new bus speed | |
605 | * | |
606 | */ | |
607 | unsigned int i2c_set_bus_speed(unsigned int speed); | |
67b23a32 | 608 | |
385c9ef5 HS |
609 | /* |
610 | * i2c_get_bus_speed: | |
611 | * | |
612 | * Returns speed of currently active I2C bus in Hz | |
613 | */ | |
67b23a32 | 614 | |
385c9ef5 | 615 | unsigned int i2c_get_bus_speed(void); |
67b23a32 | 616 | |
385c9ef5 HS |
617 | /* |
618 | * i2c_reloc_fixup: | |
619 | * | |
620 | * Adjusts I2C pointers after U-Boot is relocated to DRAM | |
621 | */ | |
622 | void i2c_reloc_fixup(void); | |
ea818dbb HS |
623 | #if defined(CONFIG_SYS_I2C_SOFT) |
624 | void i2c_soft_init(void); | |
625 | void i2c_soft_active(void); | |
626 | void i2c_soft_tristate(void); | |
627 | int i2c_soft_read(void); | |
628 | void i2c_soft_sda(int bit); | |
629 | void i2c_soft_scl(int bit); | |
630 | void i2c_soft_delay(void); | |
67b23a32 | 631 | #endif |
385c9ef5 | 632 | #else |
67b23a32 | 633 | |
1f045217 WD |
634 | /* |
635 | * Probe the given I2C chip address. Returns 0 if a chip responded, | |
636 | * not 0 on failure. | |
637 | */ | |
638 | int i2c_probe(uchar chip); | |
639 | ||
640 | /* | |
641 | * Read/Write interface: | |
642 | * chip: I2C chip address, range 0..127 | |
643 | * addr: Memory (register) address within the chip | |
644 | * alen: Number of bytes to use for addr (typically 1, 2 for larger | |
645 | * memories, 0 for register type devices with only one | |
646 | * register) | |
647 | * buffer: Where to read/write the data | |
648 | * len: How many bytes to read/write | |
649 | * | |
650 | * Returns: 0 on success, not 0 on failure | |
651 | */ | |
652 | int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len); | |
653 | int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); | |
654 | ||
655 | /* | |
656 | * Utility routines to read/write registers. | |
657 | */ | |
ecf5f077 TT |
658 | static inline u8 i2c_reg_read(u8 addr, u8 reg) |
659 | { | |
660 | u8 buf; | |
661 | ||
662 | #ifdef CONFIG_8xx | |
663 | /* MPC8xx needs this. Maybe one day we can get rid of it. */ | |
664 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); | |
665 | #endif | |
666 | ||
667 | #ifdef DEBUG | |
668 | printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg); | |
669 | #endif | |
670 | ||
ecf5f077 | 671 | i2c_read(addr, reg, 1, &buf, 1); |
ecf5f077 TT |
672 | |
673 | return buf; | |
674 | } | |
675 | ||
676 | static inline void i2c_reg_write(u8 addr, u8 reg, u8 val) | |
677 | { | |
678 | #ifdef CONFIG_8xx | |
679 | /* MPC8xx needs this. Maybe one day we can get rid of it. */ | |
680 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); | |
681 | #endif | |
682 | ||
683 | #ifdef DEBUG | |
684 | printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n", | |
685 | __func__, addr, reg, val); | |
686 | #endif | |
687 | ||
ecf5f077 | 688 | i2c_write(addr, reg, 1, &val, 1); |
ecf5f077 | 689 | } |
1f045217 | 690 | |
bb99ad6d BW |
691 | /* |
692 | * Functions for setting the current I2C bus and its speed | |
693 | */ | |
694 | ||
695 | /* | |
696 | * i2c_set_bus_num: | |
697 | * | |
698 | * Change the active I2C bus. Subsequent read/write calls will | |
699 | * go to this one. | |
700 | * | |
53677ef1 | 701 | * bus - bus index, zero based |
bb99ad6d | 702 | * |
53677ef1 | 703 | * Returns: 0 on success, not 0 on failure |
bb99ad6d BW |
704 | * |
705 | */ | |
9ca880a2 | 706 | int i2c_set_bus_num(unsigned int bus); |
bb99ad6d BW |
707 | |
708 | /* | |
709 | * i2c_get_bus_num: | |
710 | * | |
711 | * Returns index of currently active I2C bus. Zero-based. | |
712 | */ | |
713 | ||
9ca880a2 | 714 | unsigned int i2c_get_bus_num(void); |
bb99ad6d BW |
715 | |
716 | /* | |
717 | * i2c_set_bus_speed: | |
718 | * | |
719 | * Change the speed of the active I2C bus | |
720 | * | |
53677ef1 | 721 | * speed - bus speed in Hz |
bb99ad6d | 722 | * |
53677ef1 | 723 | * Returns: 0 on success, not 0 on failure |
bb99ad6d BW |
724 | * |
725 | */ | |
9ca880a2 | 726 | int i2c_set_bus_speed(unsigned int); |
bb99ad6d BW |
727 | |
728 | /* | |
729 | * i2c_get_bus_speed: | |
730 | * | |
731 | * Returns speed of currently active I2C bus in Hz | |
732 | */ | |
733 | ||
9ca880a2 | 734 | unsigned int i2c_get_bus_speed(void); |
385c9ef5 HS |
735 | #endif /* CONFIG_SYS_I2C */ |
736 | ||
737 | /* | |
738 | * only for backwardcompatibility, should go away if we switched | |
739 | * completely to new multibus support. | |
740 | */ | |
741 | #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) | |
742 | # if !defined(CONFIG_SYS_MAX_I2C_BUS) | |
743 | # define CONFIG_SYS_MAX_I2C_BUS 2 | |
744 | # endif | |
ea0f73ab | 745 | # define I2C_MULTI_BUS 1 |
385c9ef5 HS |
746 | #else |
747 | # define CONFIG_SYS_MAX_I2C_BUS 1 | |
748 | # define I2C_MULTI_BUS 0 | |
749 | #endif | |
bb99ad6d | 750 | |
cd7b4e82 MV |
751 | /* NOTE: These two functions MUST be always_inline to avoid code growth! */ |
752 | static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline)); | |
753 | static inline unsigned int I2C_GET_BUS(void) | |
754 | { | |
755 | return I2C_MULTI_BUS ? i2c_get_bus_num() : 0; | |
756 | } | |
757 | ||
758 | static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline)); | |
759 | static inline void I2C_SET_BUS(unsigned int bus) | |
760 | { | |
761 | if (I2C_MULTI_BUS) | |
762 | i2c_set_bus_num(bus); | |
763 | } | |
764 | ||
7ca8f73a ŁM |
765 | /* Multi I2C definitions */ |
766 | enum { | |
767 | I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7, | |
768 | I2C_8, I2C_9, I2C_10, | |
769 | }; | |
770 | ||
771 | /* Multi I2C busses handling */ | |
772 | #ifdef CONFIG_SOFT_I2C_MULTI_BUS | |
773 | extern int get_multi_scl_pin(void); | |
774 | extern int get_multi_sda_pin(void); | |
775 | extern int multi_i2c_init(void); | |
776 | #endif | |
a9d2ae70 RS |
777 | |
778 | /** | |
779 | * Get FDT values for i2c bus. | |
780 | * | |
781 | * @param blob Device tree blbo | |
782 | * @return the number of I2C bus | |
783 | */ | |
784 | void board_i2c_init(const void *blob); | |
785 | ||
786 | /** | |
787 | * Find the I2C bus number by given a FDT I2C node. | |
788 | * | |
789 | * @param blob Device tree blbo | |
790 | * @param node FDT I2C node to find | |
791 | * @return the number of I2C bus (zero based), or -1 on error | |
792 | */ | |
793 | int i2c_get_bus_num_fdt(int node); | |
794 | ||
795 | /** | |
796 | * Reset the I2C bus represented by the given a FDT I2C node. | |
797 | * | |
798 | * @param blob Device tree blbo | |
799 | * @param node FDT I2C node to find | |
800 | * @return 0 if port was reset, -1 if not found | |
801 | */ | |
802 | int i2c_reset_port_fdt(const void *blob, int node); | |
c6202d85 SG |
803 | |
804 | #endif /* !CONFIG_DM_I2C */ | |
805 | ||
1f045217 | 806 | #endif /* _I2C_H_ */ |