[u-boot.git] / include / configs / smdk2400.h

/*
 * (C) Copyright 2002-2005
 * Wolfgang Denk, DENX Software Engineering, <[email protected]>
 * (C) Copyright 2002
 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
 * Marius Groeger <[email protected]>
 * Gary Jennejohn <[email protected]>
 *
 * Configuation settings for the SAMSUNG board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_ARM920T		1	/* This is an ARM920T core	*/
#define CONFIG_S3C2400		1	/* in a SAMSUNG S3C2400 SoC	*/
#define CONFIG_SMDK2400		1	/* on an SAMSUNG SMDK2400 Board */

/* input clock of PLL */
#define CONFIG_SYS_CLK_FREQ	12000000 /* SMDK2400 has 12 MHz input clock */
#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/

#define CONFIG_CMDLINE_TAG	 1	/* enable passing of ATAGs	*/
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG	 1


/*
 * Size of malloc() pool
 */
#define CFG_MALLOC_LEN		(CFG_ENV_SIZE + 128*1024)
#define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */

/*
 * Hardware drivers
 */
#define CONFIG_DRIVER_CS8900	1	/* we have a CS8900 on-board */
#define CS8900_BASE		0x07000300 /* agrees with WIN CE PA */
#define CS8900_BUS16		1 /* the Linux driver does accesses as shorts */

/*
 * select serial console configuration
 */
#define CONFIG_SERIAL1          1	/* we use SERIAL 1 on SAMSUNG */

#undef	CONFIG_HWFLOW			/* include RTS/CTS flow control support	*/

#undef	CONFIG_MODEM_SUPPORT		/* enable modem initialization stuff */

/*
 * The following enables modem debugging stuff. The dbg() and
 * 'char screen[1024]' are used for debug printfs. Unfortunately,
 * it is usable only from BDI
 */
#undef CONFIG_MODEM_SUPPORT_DEBUG

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

#define CONFIG_BAUDRATE		115200

#define	CONFIG_TIMESTAMP	1	/* Print timestamp info for images */

/* Use s3c2400's RTC */
#define CONFIG_RTC_S3C24X0	1


/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME


/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_DATE
#define CONFIG_CMD_SNTP

#if defined(CONFIG_HWFLOW)
    #define CONFIG_CONFIG_HWFLOW
#endif

#if !defined(USE_920T_MMU)
    #undef CONFIG_CMD_CACHE
#endif


#define CONFIG_BOOTDELAY	3
#define CONFIG_NETMASK          255.255.255.0
#define CONFIG_IPADDR		134.98.93.36
#define CONFIG_SERVERIP		134.98.93.22

#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	115200		/* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX	1		/* which serial port to use */
#endif

/*
 * Miscellaneous configurable options
 */
#define	CFG_LONGHELP				/* undef to save memory		*/
#define	CFG_PROMPT		"SMDK2400 # "	/* Monitor Command Prompt	*/
#define	CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
#define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define	CFG_MAXARGS		16		/* max number of command args	*/
#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/

#define CFG_MEMTEST_START	0x0c000000	/* memtest works on	*/
#define CFG_MEMTEST_END		0x0e000000	/* 32 MB in DRAM	*/

#undef  CFG_CLKS_IN_HZ		/* everything, incl board info, in Hz */

#define	CFG_LOAD_ADDR		0x0cf00000	/* default load address	*/

/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
/* it to wrap 100 times (total 1562500) to get 1 sec. */
#define	CFG_HZ			1562500

/* valid baudrates */
#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
#endif

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1	   /* we have 1 bank of DRAM */
#define PHYS_SDRAM_1		0x0c000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE	0x02000000 /* 32 MB */

#define CFG_FLASH_BASE		0x00000000 /* Flash Bank #1 */

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */
#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks */
#define CFG_MAX_FLASH_SECT	(64)	/* max number of sectors on one chip */

/* timeout values are in ticks */
#define CFG_FLASH_ERASE_TOUT	(5*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT	(5*CFG_HZ) /* Timeout for Flash Write */

#define	CFG_ENV_IS_IN_FLASH	1

/* Address and size of Primary Environment Sector	*/
#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x40000)
#define CFG_ENV_SIZE		0x40000

/* Address and size of Redundant Environment Sector	*/
#define CFG_ENV_ADDR_REDUND	(CFG_ENV_ADDR + CFG_ENV_SIZE)
#define CFG_ENV_SIZE_REDUND	(CFG_ENV_SIZE)

#endif	/* __CONFIG_H */
Commit	Line	Data
48c0010d	1	/*
414eec35 WD	2	* (C) Copyright 2002-2005
414eec35 WD	3	* Wolfgang Denk, DENX Software Engineering, <[email protected]>
48c0010d WD	4	* (C) Copyright 2002
	5	* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
	6	* Marius Groeger <[email protected]>
	7	* Gary Jennejohn <[email protected]>
	8	*
	9	* Configuation settings for the SAMSUNG board.
	10	*
	11	* See file CREDITS for list of people who contributed to this
	12	* project.
	13	*
	14	* This program is free software; you can redistribute it and/or
	15	* modify it under the terms of the GNU General Public License as
	16	* published by the Free Software Foundation; either version 2 of
	17	* the License, or (at your option) any later version.
	18	*
	19	* This program is distributed in the hope that it will be useful,
	20	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	21	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	22	* GNU General Public License for more details.
	23	*
	24	* You should have received a copy of the GNU General Public License
	25	* along with this program; if not, write to the Free Software
	26	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	27	* MA 02111-1307 USA
	28	*/
	29
	30	#ifndef __CONFIG_H
	31	#define __CONFIG_H
	32
48c0010d WD	33	/*
	34	* High Level Configuration Options
	35	* (easy to change)
	36	*/
	37	#define CONFIG_ARM920T 1 /* This is an ARM920T core */
	38	#define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */
	39	#define CONFIG_SMDK2400 1 /* on an SAMSUNG SMDK2400 Board */
	40
	41	/* input clock of PLL */
7f6c2cbc	42	#define CONFIG_SYS_CLK_FREQ 12000000 /* SMDK2400 has 12 MHz input clock */
48c0010d WD	43	#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
	44
	45	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	46	#define CONFIG_SETUP_MEMORY_TAGS 1
	47	#define CONFIG_INITRD_TAG 1
	48
	49
	50	/*
	51	* Size of malloc() pool
	52	*/
699b13a6	53	#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
a8c7c708	54	#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
48c0010d WD	55
	56	/*
	57	* Hardware drivers
	58	*/
	59	#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
	60	#define CS8900_BASE 0x07000300 /* agrees with WIN CE PA */
	61	#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
	62
	63	/*
	64	* select serial console configuration
	65	*/
	66	#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SAMSUNG */
	67
	68	#undef CONFIG_HWFLOW /* include RTS/CTS flow control support */
	69
	70	#undef CONFIG_MODEM_SUPPORT /* enable modem initialization stuff */
	71
	72	/*
	73	* The following enables modem debugging stuff. The dbg() and
	74	* 'char screen[1024]' are used for debug printfs. Unfortunately,
	75	* it is usable only from BDI
	76	*/
	77	#undef CONFIG_MODEM_SUPPORT_DEBUG
	78
	79	/* allow to overwrite serial and ethaddr */
	80	#define CONFIG_ENV_OVERWRITE
	81
	82	#define CONFIG_BAUDRATE 115200
	83
	84	#define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
	85
48b42616 WD	86	/* Use s3c2400's RTC */
	87	#define CONFIG_RTC_S3C24X0 1
	88
46da1e96	89
079a136c JL	90	/*
	91	* BOOTP options
	92	*/
	93	#define CONFIG_BOOTP_BOOTFILESIZE
	94	#define CONFIG_BOOTP_BOOTPATH
	95	#define CONFIG_BOOTP_GATEWAY
	96	#define CONFIG_BOOTP_HOSTNAME
	97
	98
46da1e96 JL	99	/*
	100	* Command line configuration.
	101	*/
	102	#include <config_cmd_default.h>
	103
	104	#define CONFIG_CMD_DATE
	105	#define CONFIG_CMD_SNTP
	106
	107	#if defined(CONFIG_HWFLOW)
	108	#define CONFIG_CONFIG_HWFLOW
48c0010d WD	109	#endif
48c0010d WD	110
46da1e96 JL	111	#if !defined(USE_920T_MMU)
46da1e96 JL	112	#undef CONFIG_CMD_CACHE
48c0010d WD	113	#endif
48c0010d WD	114
48c0010d WD	115
48c0010d WD	116	#define CONFIG_BOOTDELAY 3
48c0010d WD	117	#define CONFIG_NETMASK 255.255.255.0
	118	#define CONFIG_IPADDR 134.98.93.36
	119	#define CONFIG_SERVERIP 134.98.93.22
48c0010d	120
46da1e96	121	#if defined(CONFIG_CMD_KGDB)
48c0010d WD	122	#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
	123	/* what's this ? it's not used anywhere */
	124	#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
	125	#endif
	126
	127	/*
	128	* Miscellaneous configurable options
	129	*/
	130	#define CFG_LONGHELP /* undef to save memory */
	131	#define CFG_PROMPT "SMDK2400 # " /* Monitor Command Prompt */
	132	#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
	133	#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
	134	#define CFG_MAXARGS 16 /* max number of command args */
	135	#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
	136
	137	#define CFG_MEMTEST_START 0x0c000000 /* memtest works on */
	138	#define CFG_MEMTEST_END 0x0e000000 /* 32 MB in DRAM */
	139
	140	#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
	141
	142	#define CFG_LOAD_ADDR 0x0cf00000 /* default load address */
	143
	144	/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
	145	/* it to wrap 100 times (total 1562500) to get 1 sec. */
	146	#define CFG_HZ 1562500
	147
	148	/* valid baudrates */
	149	#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
	150
	151	/*-----------------------------------------------------------------------
	152	* Stack sizes
	153	*
	154	* The stack sizes are set up in start.S using the settings below
	155	*/
	156	#define CONFIG_STACKSIZE (1281024) / regular stack */
	157	#ifdef CONFIG_USE_IRQ
	158	#define CONFIG_STACKSIZE_IRQ (41024) / IRQ stack */
	159	#define CONFIG_STACKSIZE_FIQ (41024) / FIQ stack */
	160	#endif
	161
	162	/*-----------------------------------------------------------------------
	163	* Physical Memory Map
	164	*/
	165	#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
	166	#define PHYS_SDRAM_1 0x0c000000 /* SDRAM Bank #1 */
	167	#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
	168
6069ff26	169	#define CFG_FLASH_BASE 0x00000000 /* Flash Bank #1 */
48c0010d WD	170
	171	/*-----------------------------------------------------------------------
	172	* FLASH and environment organization
	173	*/
	174	#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
	175	#define CFG_MAX_FLASH_SECT (64) /* max number of sectors on one chip */
	176
	177	/* timeout values are in ticks */
	178	#define CFG_FLASH_ERASE_TOUT (5CFG_HZ) / Timeout for Flash Erase */
	179	#define CFG_FLASH_WRITE_TOUT (5CFG_HZ) / Timeout for Flash Write */
	180
	181	#define CFG_ENV_IS_IN_FLASH 1
	182
	183	/* Address and size of Primary Environment Sector */
6069ff26	184	#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x40000)
48c0010d WD	185	#define CFG_ENV_SIZE 0x40000
	186
	187	/* Address and size of Redundant Environment Sector */
	188	#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SIZE)
	189	#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
	190
	191	#endif /* __CONFIG_H */