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1 | /* |
2 | * (C) Copyright 2002 | |
3 | * Wolfgang Denk, DENX Software Engineering, [email protected]. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #ifndef _PCIPPC2_H_ | |
25 | #define _PCIPPC2_H_ | |
26 | ||
27 | #include <config.h> | |
28 | #include <common.h> | |
29 | ||
30 | #include "hardware.h" | |
31 | ||
32 | #define FPGA(r, p) (pcippc2_fpga0_phys + HW_FPGA0_##r##_##p) | |
33 | #define UART(r) (pcippc2_fpga0_phys + HW_FPGA0_UART1 + NS16550_##r * 4) | |
34 | #define RTC(r) (pcippc2_fpga1_phys + HW_FPGA1_RTC + r) | |
35 | ||
36 | extern u32 pcippc2_fpga0_phys; | |
37 | extern u32 pcippc2_fpga1_phys; | |
38 | ||
39 | extern u32 pcippc2_sdram_size (void); | |
40 | ||
53677ef1 | 41 | extern void pcippc2_fpga_init (void); |
affae2bf | 42 | |
53677ef1 | 43 | extern void pcippc2_cpci3264_init (void); |
e95b61cf | 44 | |
53677ef1 | 45 | extern void cpc710_pci_init (void); |
affae2bf WD |
46 | extern void cpc710_pci_enable_timeout (void); |
47 | ||
48 | extern unsigned long | |
49 | cpc710_ram_init (void); | |
50 | ||
51 | #endif |