]> Git Repo - u-boot.git/blame - drivers/core/Kconfig
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
[u-boot.git] / drivers / core / Kconfig
CommitLineData
0b11dbf7
MY
1menu "Generic Driver Options"
2
da333ae7
MY
3config DM
4 bool "Enable Driver Model"
da333ae7 5 help
f94a1bed
SG
6 This config option enables Driver Model. This brings in the core
7 support, including scanning of platform data on start-up. If
8 CONFIG_OF_CONTROL is enabled, the device tree will be scanned also
9 when available.
91a91ff8
SG
10
11config SPL_DM
12 bool "Enable Driver Model for SPL"
13 depends on DM && SPL
14 help
15 Enable driver model in SPL. You will need to provide a
16 suitable malloc() implementation. If you are not using the
17 full malloc() enabled by CONFIG_SYS_SPL_MALLOC_START,
18 consider using CONFIG_SYS_MALLOC_SIMPLE. In that case you
f1896c45 19 must provide CONFIG_SPL_SYS_MALLOC_F_LEN to set the size.
91a91ff8
SG
20 In most cases driver model will only allocate a few uclasses
21 and devices in SPL, so 1KB should be enable. See
f1896c45 22 CONFIG_SPL_SYS_MALLOC_F_LEN for more details on how to enable it.
91a91ff8 23
5a6f06f6
SG
24config TPL_DM
25 bool "Enable Driver Model for TPL"
26 depends on DM && TPL
27 help
28 Enable driver model in TPL. You will need to provide a
29 suitable malloc() implementation. If you are not using the
30 full malloc() enabled by CONFIG_SYS_SPL_MALLOC_START,
31 consider using CONFIG_SYS_MALLOC_SIMPLE. In that case you
f1896c45 32 must provide CONFIG_SPL_SYS_MALLOC_F_LEN to set the size.
5a6f06f6
SG
33 In most cases driver model will only allocate a few uclasses
34 and devices in SPL, so 1KB should be enough. See
f1896c45 35 CONFIG_SPL_SYS_MALLOC_F_LEN for more details on how to enable it.
5a6f06f6
SG
36 Disable this for very small implementations.
37
91a91ff8
SG
38config DM_WARN
39 bool "Enable warnings in driver model"
d648964f
MY
40 depends on DM
41 default y
91a91ff8 42 help
abb9cd30
SG
43 Enable this to see warnings related to driver model.
44
45 Warnings may help with debugging, such as when expected devices do
46 not bind correctly. If the option is disabled, dm_warn() is compiled
47 out - it will do nothing when called.
48
49config SPL_DM_WARN
50 bool "Enable warnings in driver model wuth SPL"
51 depends on SPL_DM
52 help
53 Enable this to see warnings related to driver model in SPL
54
91a91ff8
SG
55 The dm_warn() function can use up quite a bit of space for its
56 strings. By default this is disabled for SPL builds to save space.
abb9cd30
SG
57
58 Warnings may help with debugging, such as when expected devices do
59 not bind correctly. If the option is disabled, dm_warn() is compiled
60 out - it will do nothing when called.
91a91ff8 61
ceb91909
MY
62config DM_DEBUG
63 bool "Enable debug messages in driver model core"
64 depends on DM
65 help
66 Say Y here if you want to compile in debug messages in DM core.
67
91a91ff8
SG
68config DM_DEVICE_REMOVE
69 bool "Support device removal"
d648964f
MY
70 depends on DM
71 default y
91a91ff8
SG
72 help
73 We can save some code space by dropping support for removing a
85e51be9 74 device.
91a91ff8 75
e5c4564e
HG
76 Note that this may have undesirable results in the USB subsystem as
77 it causes unplugged devices to linger around in the dm-tree, and it
78 causes USB host controllers to not be stopped when booting the OS.
79
5b896ed5
SG
80config DM_EVENT
81 bool "Support events with driver model"
82 depends on DM
83 imply EVENT
84 default y if SANDBOX
85 help
86 This enables support for generating events related to driver model
87 operations, such as prbing or removing a device. Subsystems can
88 register a 'spy' function that is called when the event occurs.
89
85e51be9
JJH
90config SPL_DM_DEVICE_REMOVE
91 bool "Support device removal in SPL"
92 depends on SPL_DM
85e51be9
JJH
93 help
94 We can save some code space by dropping support for removing a
95 device. This is not normally required in SPL, so by default this
96 option is disabled for SPL.
97
91a91ff8
SG
98config DM_STDIO
99 bool "Support stdio registration"
d648964f
MY
100 depends on DM
101 default y
91a91ff8
SG
102 help
103 Normally serial drivers register with stdio so that they can be used
104 as normal output devices. In SPL we don't normally use stdio, so
105 we can omit this feature.
36fa61dc
SG
106
107config DM_SEQ_ALIAS
108 bool "Support numbered aliases in device tree"
109 depends on DM
110 default y
4f627c5a
NR
111 help
112 Most boards will have a '/aliases' node containing the path to
113 numbered devices (e.g. serial0 = &serial0). This feature can be
114 disabled if it is not required.
115
116config SPL_DM_SEQ_ALIAS
117 bool "Support numbered aliases in device tree in SPL"
a074667d 118 depends on SPL_DM
36fa61dc
SG
119 help
120 Most boards will have a '/aliases' node containing the path to
121 numbered devices (e.g. serial0 = &serial0). This feature can be
122 disabled if it is not required, to save code space in SPL.
12dc8e75 123
ec1add1e
SG
124config SPL_DM_INLINE_OFNODE
125 bool "Inline some ofnode functions which are seldom used in SPL"
126 depends on SPL_DM
127 default y
128 help
129 This applies to several ofnode functions (see ofnode.h) which are
130 seldom used. Inlining them can help reduce code size.
131
132config TPL_DM_INLINE_OFNODE
133 bool "Inline some ofnode functions which are seldom used in TPL"
134 depends on TPL_DM
135 default y
136 help
137 This applies to several ofnode functions (see ofnode.h) which are
138 seldom used. Inlining them can help reduce code size.
139
4abf68d5
NSJ
140config DM_DMA
141 bool "Support per-device DMA constraints"
142 depends on DM
4abf68d5
NSJ
143 help
144 Enable this to extract per-device DMA constraints, only supported on
145 device-tree systems for now. This is needed in order translate
146 addresses on systems where different buses have different views of
147 the physical address space.
148
12dc8e75
SG
149config REGMAP
150 bool "Support register maps"
151 depends on DM
152 help
153 Hardware peripherals tend to have one or more sets of registers
154 which can be accessed to control the hardware. A register map
155 models this with a simple read/write interface. It can in principle
156 support any bus type (I2C, SPI) but so far this only supports
157 direct memory access.
158
41c7f664 159config SPL_REGMAP
160 bool "Support register maps in SPL"
9c447370 161 depends on SPL_DM
41c7f664 162 help
163 Hardware peripherals tend to have one or more sets of registers
164 which can be accessed to control the hardware. A register map
165 models this with a simple read/write interface. It can in principle
166 support any bus type (I2C, SPI) but so far this only supports
167 direct memory access.
168
c6ac6c1b
PT
169config TPL_REGMAP
170 bool "Support register maps in TPL"
171 depends on TPL_DM
172 help
173 Hardware peripherals tend to have one or more sets of registers
174 which can be accessed to control the hardware. A register map
175 models this with a simple read/write interface. It can in principle
176 support any bus type (I2C, SPI) but so far this only supports
177 direct memory access.
178
12dc8e75
SG
179config SYSCON
180 bool "Support system controllers"
181 depends on REGMAP
182 help
183 Many SoCs have a number of system controllers which are dealt with
184 as a group by a single driver. Some common functionality is provided
185 by this uclass, including accessing registers via regmap and
186 assigning a unique number to each.
608f26c5 187
41c7f664 188config SPL_SYSCON
189 bool "Support system controllers in SPL"
9c447370 190 depends on SPL_REGMAP
41c7f664 191 help
192 Many SoCs have a number of system controllers which are dealt with
193 as a group by a single driver. Some common functionality is provided
194 by this uclass, including accessing registers via regmap and
195 assigning a unique number to each.
196
c6ac6c1b
PT
197config TPL_SYSCON
198 bool "Support system controllers in TPL"
199 depends on TPL_REGMAP
200 help
201 Many SoCs have a number of system controllers which are dealt with
202 as a group by a single driver. Some common functionality is provided
203 by this uclass, including accessing registers via regmap and
204 assigning a unique number to each.
205
e2282d70
MY
206config DEVRES
207 bool "Managed device resources"
208 depends on DM
209 help
210 This option enables the Managed device resources core support.
211 Device resources managed by the devres framework are automatically
212 released whether initialization fails half-way or the device gets
213 detached.
214
215 If this option is disabled, devres functions fall back to
216 non-managed variants. For example, devres_alloc() to kzalloc(),
217 devm_kmalloc() to kmalloc(), etc.
218
608f26c5 219config DEBUG_DEVRES
40b6f2d0 220 bool "Managed device resources debugging functions"
e2282d70 221 depends on DEVRES
608f26c5
MY
222 help
223 If this option is enabled, devres debug messages are printed.
40b6f2d0 224 Also, a function is available to dump a list of device resources.
608f26c5
MY
225 Select this if you are having a problem with devres or want to
226 debug resource management for a managed device.
227
228 If you are unsure about this, Say N here.
0b11dbf7 229
628d792c
MV
230config SIMPLE_BUS
231 bool "Support simple-bus driver"
232 depends on DM && OF_CONTROL
233 default y
234 help
235 Supports the 'simple-bus' driver, which is used on some systems.
236
237config SPL_SIMPLE_BUS
238 bool "Support simple-bus driver in SPL"
239 depends on SPL_DM && SPL_OF_CONTROL
8bebf03c 240 default y
628d792c
MV
241 help
242 Supports the 'simple-bus' driver, which is used on some systems
243 in SPL.
244
80279fa1
BM
245config SIMPLE_BUS_CORRECT_RANGE
246 bool "Decode the 'simple-bus' <range> by honoring the #address-cells and #size-cells"
247 depends on SIMPLE_BUS
ea8971cd 248 default y if SANDBOX
80279fa1
BM
249 help
250 Decoding the 'simple-bus' <range> by honoring the #address-cells
251 and #size-cells of parent/child bus. If unset, #address-cells of
252 parent bus is assumed to be 1, #address-cells and #size-cells of
253 child bus is also assumed to be 1, to save some spaces of using
254 an advanced API to decode the <range>, which benefits SPL image
255 builds that have size limits.
256
257 If you are unsure about this, Say N here.
258
4a3390f1
SA
259config SIMPLE_PM_BUS
260 bool "Support simple-pm-bus driver"
261 depends on DM && OF_CONTROL && CLK && POWER_DOMAIN
262 help
263 Supports the 'simple-pm-bus' driver, which is used for busses that
264 have power domains and/or clocks which need to be enabled before use.
265
ef5cd330
SR
266config OF_TRANSLATE
267 bool "Translate addresses using fdt_translate_address"
268 depends on DM && OF_CONTROL
269 default y
270 help
271 If this option is enabled, the reg property will be translated
272 using the fdt_translate_address() function. This is necessary
273 on some platforms (e.g. MVEBU) using complex "ranges"
274 properties in many nodes. As this translation is not handled
275 correctly in the default simple_bus_translate() function.
276
277 If this option is not enabled, simple_bus_translate() will be
278 used for the address translation. This function is faster and
279 smaller in size than fdt_translate_address().
280
281config SPL_OF_TRANSLATE
7b98a3b6 282 bool "Translate addresses using fdt_translate_address in SPL"
ef5cd330 283 depends on SPL_DM && SPL_OF_CONTROL
ef5cd330
SR
284 help
285 If this option is enabled, the reg property will be translated
286 using the fdt_translate_address() function. This is necessary
287 on some platforms (e.g. MVEBU) using complex "ranges"
288 properties in many nodes. As this translation is not handled
289 correctly in the default simple_bus_translate() function.
290
291 If this option is not enabled, simple_bus_translate() will be
292 used for the address translation. This function is faster and
293 smaller in size than fdt_translate_address().
294
f2100f6f
SR
295config TRANSLATION_OFFSET
296 bool "Platforms specific translation offset"
297 depends on DM && OF_CONTROL
298 help
299 Some platforms need a special address translation. Those
300 platforms (e.g. mvebu in SPL) can configure a translation
301 offset by enabling this option and setting the translation_offset
302 variable in the GD in their platform- / board-specific code.
303
0a222d53
PB
304config OF_ISA_BUS
305 bool
306 depends on OF_TRANSLATE
307 help
308 Is this option is enabled then support for the ISA bus will
309 be included for addresses read from DT. This is something that
310 should be known to be required or not based upon the board
83e7a4d5 311 being targeted, and whether or not it makes use of an ISA bus.
0a222d53
PB
312
313 The bus is matched based upon its node name equalling "isa". The
314 busses #address-cells should equal 2, with the first cell being
315 used to hold flags & flag 0x1 indicating that the address range
316 should be accessed using I/O port in/out accessors. The second
317 cell holds the offset into ISA bus address space. The #size-cells
318 property should equal 1, and of course holds the size of the
319 address range used by a device.
320
321 If this option is not enabled then support for the ISA bus is
322 not included and any such busses used in DT will be treated as
323 typical simple-bus compatible busses. This will lead to
324 mistranslation of device addresses, so ensure that this is
325 enabled if your board does include an ISA bus.
326
f11c7ab9
SG
327config DM_DEV_READ_INLINE
328 bool
329 default y if !OF_LIVE
330
7ca2850c
SG
331config ACPIGEN
332 bool "Support ACPI table generation in driver model"
d40d2c57 333 default y if SANDBOX || (GENERATE_ACPI_TABLE && !QEMU)
8b6ee248 334 select LIB_UUID
7ca2850c
SG
335 help
336 This option enables generation of ACPI tables using driver-model
337 devices. It adds a new operation struct to each driver, to support
338 things like generating device-specific tables and returning the ACPI
339 name of a device.
340
d472d821
SG
341config BOUNCE_BUFFER
342 bool "Include bounce buffer API"
343 help
344 Some peripherals support DMA from a subset of physically
345 addressable memory only. To support such peripherals, the
346 bounce buffer API uses a temporary buffer: it copies data
347 to/from DMA regions while managing cache operations.
348
349 A second possible use of bounce buffers is their ability to
350 provide aligned buffers for DMA operations.
351
0b11dbf7 352endmenu
This page took 0.520649 seconds and 4 git commands to generate.