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83d290c5 | 1 | # SPDX-License-Identifier: GPL-2.0+ |
adfb2bfe SG |
2 | # |
3 | # Copyright (C) 2015 Google. Inc | |
4 | # Written by Simon Glass <[email protected]> | |
adfb2bfe SG |
5 | |
6 | U-Boot on Rockchip | |
7 | ================== | |
8 | ||
0c14c366 | 9 | A wide range of Rockchip SoCs are supported in mainline U-Boot |
adfb2bfe | 10 | |
1cf99b36 WL |
11 | Warning |
12 | ======= | |
13 | This document is being moved to doc/board/rockchip, so information on it | |
14 | might be incomplete or outdated. | |
adfb2bfe SG |
15 | |
16 | Prerequisites | |
17 | ============= | |
18 | ||
19 | You will need: | |
20 | ||
f1387130 | 21 | - Firefly RK3288 board or something else with a supported RockChip SoC |
adfb2bfe SG |
22 | - Power connection to 5V using the supplied micro-USB power cable |
23 | - Separate USB serial cable attached to your computer and the Firefly | |
24 | (connect to the micro-USB connector below the logo) | |
25 | - rkflashtool [3] | |
26 | - openssl (sudo apt-get install openssl) | |
27 | - Serial UART connection [4] | |
28 | - Suitable ARM cross compiler, e.g.: | |
29 | sudo apt-get install gcc-4.7-arm-linux-gnueabi | |
30 | ||
adfb2bfe SG |
31 | Building |
32 | ======== | |
33 | ||
c661c059 JT |
34 | 1. To build RK3288 board: |
35 | ||
adfb2bfe SG |
36 | CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all |
37 | ||
c661c059 JT |
38 | (or you can use another cross compiler if you prefer) |
39 | ||
7f08bfb7 AY |
40 | 2. To build RK3308 board: |
41 | - Get the rkbin | |
42 | => git clone https://github.com/rockchip-linux/rkbin.git | |
43 | ||
44 | - Compile U-Boot | |
45 | => cd /path/to/u-boot | |
46 | => export BL31=/path/to/rkbin/bin/rk33/rk3308_bl31_v2.22.elf | |
dcdea292 | 47 | => make roc-cc-rk3308_defconfig |
7f08bfb7 | 48 | => make CROSS_COMPILE=aarch64-linux-gnu- all |
7f08bfb7 AY |
49 | => ./tools/mkimage -n rk3308 -T rksd -d /path/to/rkbin/bin/rk33/rk3308_ddr_589MHz_uart2_m0_v1.26.bin idbloader.img |
50 | => cat spl/u-boot-spl.bin >> idbloader.img | |
51 | ||
52 | 3. To build RK3399 board: | |
c661c059 JT |
53 | |
54 | Option 1: Package the image with Rockchip miniloader: | |
55 | ||
56 | - Compile U-Boot | |
57 | ||
58 | => cd /path/to/u-boot | |
59 | => make nanopi-neo4-rk3399_defconfig | |
60 | => make | |
c661c059 JT |
61 | |
62 | - Get the rkbin | |
63 | ||
64 | => git clone https://github.com/rockchip-linux/rkbin.git | |
65 | ||
66 | - Create trust.img | |
67 | ||
68 | => cd /path/to/rkbin | |
69 | => ./tools/trust_merger RKTRUST/RK3399TRUST.ini | |
70 | ||
71 | - Create uboot.img | |
72 | ||
73 | => cd /path/to/rkbin | |
74 | => ./tools/loaderimage --pack --uboot /path/to/u-boot/u-boot-dtb.bin uboot.img | |
75 | ||
76 | (Get trust.img and uboot.img) | |
77 | ||
78 | Option 2: Package the image with SPL: | |
79 | ||
c661c059 JT |
80 | - Export cross compiler path for aarch64 |
81 | ||
82 | - Compile ATF | |
83 | ||
780fc003 QS |
84 | => git clone https://github.com/ARM-software/arm-trusted-firmware.git |
85 | => cd arm-trusted-firmware | |
c661c059 | 86 | |
780fc003 QS |
87 | (export cross compiler path for Cortex-M0 MCU likely arm-none-eabi-) |
88 | => make realclean | |
89 | => make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 | |
c661c059 | 90 | |
780fc003 QS |
91 | (export bl31.elf) |
92 | => export BL31=/path/to/arm-trusted-firmware/build/rk3399/release/bl31/bl31.elf | |
c661c059 JT |
93 | |
94 | - Compile PMU M0 firmware | |
95 | ||
780fc003 | 96 | This is optional for most of the rk3399 boards. |
c661c059 JT |
97 | |
98 | => git clone git://git.theobroma-systems.com/rk3399-cortex-m0.git | |
99 | => cd rk3399-cortex-m0 | |
adfb2bfe | 100 | |
c661c059 JT |
101 | (export cross compiler path for Cortex-M0 PMU) |
102 | => make CROSS_COMPILE=arm-cortex_m0-eabi- | |
103 | ||
2411c335 JT |
104 | (export rk3399m0.bin) |
105 | => export PMUM0=/path/to/rk3399-cortex-m0/rk3399m0.bin | |
c661c059 JT |
106 | |
107 | - Compile U-Boot | |
108 | ||
109 | => cd /path/to/u-boot | |
110 | => make orangepi-rk3399_defconfig | |
111 | => make | |
c661c059 JT |
112 | |
113 | (Get spl/u-boot-spl-dtb.bin, u-boot.itb images and some boards would get | |
051c7550 JT |
114 | spl/u-boot-spl.bin since it doesn't enable CONFIG_SPL_OF_CONTROL |
115 | ||
116 | If TPL enabled on the target, get tpl/u-boot-tpl-dtb.bin or tpl/u-boot-tpl.bin | |
117 | if CONFIG_TPL_OF_CONTROL not enabled) | |
adfb2bfe SG |
118 | |
119 | Writing to the board with USB | |
120 | ============================= | |
121 | ||
122 | For USB to work you must get your board into ROM boot mode, either by erasing | |
123 | your MMC or (perhaps) holding the recovery button when you boot the board. | |
124 | To erase your MMC, you can boot into Linux and type (as root) | |
125 | ||
126 | dd if=/dev/zero of=/dev/mmcblk0 bs=1M | |
127 | ||
128 | Connect your board's OTG port to your computer. | |
129 | ||
130 | To create a suitable image and write it to the board: | |
131 | ||
717f8845 | 132 | ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \ |
f2acc55e | 133 | ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \ |
adfb2bfe SG |
134 | cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l |
135 | ||
136 | If all goes well you should something like: | |
137 | ||
138 | U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49) | |
139 | Card did not respond to voltage select! | |
140 | spl: mmc init failed with error: -17 | |
141 | ### ERROR ### Please RESET the board ### | |
142 | ||
143 | You will need to reset the board before each time you try. Yes, that's all | |
144 | it does so far. If support for the Rockchip USB protocol or DFU were added | |
145 | in SPL then we could in principle load U-Boot and boot to a prompt from USB | |
146 | as several other platforms do. However it does not seem to be possible to | |
147 | use the existing boot ROM code from SPL. | |
148 | ||
149 | ||
7f08bfb7 AY |
150 | Writing to the eMMC with USB on ROC-RK3308-CC |
151 | ============================================= | |
152 | For USB to work you must get your board into Bootrom mode, | |
153 | either by erasing the eMMC or short circuit the GND and D0 | |
154 | on core board. | |
155 | ||
156 | Connect the board to your computer via tyepc. | |
157 | => rkdeveloptool db rk3308_loader_v1.26.117.bin | |
158 | => rkdeveloptool wl 0x40 idbloader.img | |
159 | => rkdeveloptool wl 0x4000 u-boot.itb | |
160 | => rkdeveloptool rd | |
161 | ||
162 | Then you will see the boot log from Debug UART at baud rate 1500000: | |
163 | DDR Version V1.26 | |
164 | REGFB: 0x00000032, 0x00000032 | |
165 | In | |
166 | 589MHz | |
167 | DDR3 | |
168 | Col=10 Bank=8 Row=14 Size=256MB | |
169 | msch:1 | |
170 | Returning to boot ROM... | |
171 | ||
172 | U-Boot SPL 2020.01-rc1-00225-g34b681327f (Nov 14 2019 - 10:58:04 +0800) | |
173 | Trying to boot from MMC1 | |
174 | INFO: Preloader serial: 2 | |
175 | NOTICE: BL31: v1.3(release):30f1405 | |
176 | NOTICE: BL31: Built : 17:08:28, Sep 23 2019 | |
177 | INFO: Lastlog: last=0x100000, realtime=0x102000, size=0x2000 | |
178 | INFO: ARM GICv2 driver initialized | |
179 | INFO: Using opteed sec cpu_context! | |
180 | INFO: boot cpu mask: 1 | |
181 | INFO: plat_rockchip_pmu_init: pd status 0xe b | |
182 | INFO: BL31: Initializing runtime services | |
183 | WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will rK | |
184 | ERROR: Error initializing runtime service opteed_fast | |
185 | INFO: BL31: Preparing for EL3 exit to normal world | |
186 | INFO: Entry point address = 0x600000 | |
187 | INFO: SPSR = 0x3c9 | |
188 | ||
189 | ||
190 | U-Boot 2020.01-rc1-00225-g34b681327f (Nov 14 2019 - 10:58:47 +0800) | |
191 | ||
192 | Model: Firefly ROC-RK3308-CC board | |
193 | DRAM: 254 MiB | |
194 | MMC: dwmmc@ff480000: 0, dwmmc@ff490000: 1 | |
195 | rockchip_dnl_key_pressed read adc key val failed | |
196 | Net: No ethernet found. | |
197 | Hit any key to stop autoboot: 0 | |
198 | Card did not respond to voltage select! | |
199 | switch to partitions #0, OK | |
200 | mmc1(part 0) is current device | |
201 | Scanning mmc 1:4... | |
202 | Found /extlinux/extlinux.conf | |
203 | Retrieving file: /extlinux/extlinux.conf | |
204 | 151 bytes read in 3 ms (48.8 KiB/s) | |
205 | 1: kernel-mainline | |
206 | Retrieving file: /Image | |
207 | 14737920 bytes read in 377 ms (37.3 MiB/s) | |
208 | append: earlycon=uart8250,mmio32,0xff0c0000 console=ttyS2,1500000n8 | |
209 | Retrieving file: /rk3308-roc-cc.dtb | |
210 | 28954 bytes read in 4 ms (6.9 MiB/s) | |
211 | Flattened Device Tree blob at 01f00000 | |
212 | Booting using the fdt blob at 0x1f00000 | |
213 | ## Loading Device Tree to 000000000df3a000, end 000000000df44119 ... OK | |
214 | ||
215 | Starting kernel ... | |
216 | [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd042] | |
217 | [ 0.000000] Linux version 5.4.0-rc1-00040-g4dc2d508fa47-dirty (andy@B150) (gcc version 6.3.1 20170404 (Linaro GCC 6.3-209 | |
218 | [ 0.000000] Machine model: Firefly ROC-RK3308-CC board | |
219 | [ 0.000000] earlycon: uart8250 at MMIO32 0x00000000ff0c0000 (options '') | |
220 | [ 0.000000] printk: bootconsole [uart8250] enabled | |
221 | ||
adfb2bfe SG |
222 | Booting from an SD card |
223 | ======================= | |
224 | ||
225 | To write an image that boots from an SD card (assumed to be /dev/sdc): | |
226 | ||
717f8845 | 227 | ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \ |
f2acc55e SG |
228 | firefly-rk3288/spl/u-boot-spl-dtb.bin out && \ |
229 | sudo dd if=out of=/dev/sdc seek=64 && \ | |
73e6dbe8 | 230 | sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=16384 |
adfb2bfe SG |
231 | |
232 | This puts the Rockchip header and SPL image first and then places the U-Boot | |
341e44ed | 233 | image at block 16384 (i.e. 8MB from the start of the SD card). This |
adfb2bfe SG |
234 | corresponds with this setting in U-Boot: |
235 | ||
73e6dbe8 | 236 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x4000 |
adfb2bfe SG |
237 | |
238 | Put this SD (or micro-SD) card into your board and reset it. You should see | |
239 | something like: | |
240 | ||
f1387130 | 241 | U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700) |
adfb2bfe | 242 | |
f1387130 | 243 | Model: Radxa Rock 2 Square |
adfb2bfe | 244 | DRAM: 2 GiB |
f1387130 SG |
245 | MMC: dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1 |
246 | *** Warning - bad CRC, using default environment | |
247 | ||
248 | In: serial | |
249 | Out: [email protected] | |
250 | Err: serial | |
251 | Net: Net Initialization Skipped | |
252 | No ethernet found. | |
253 | Hit any key to stop autoboot: 0 | |
adfb2bfe SG |
254 | => |
255 | ||
b47ea792 | 256 | The rockchip bootrom can load and boot an initial spl, then continue to |
760b9578 HS |
257 | load a second-stage bootloader (ie. U-Boot) as soon as the control is returned |
258 | to the bootrom. Both the RK3288 and the RK3036 use this special boot sequence. | |
259 | The configuration option enabling this is: | |
b47ea792 | 260 | |
760b9578 | 261 | CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y |
b47ea792 XZ |
262 | |
263 | You can create the image via the following operations: | |
264 | ||
265 | ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \ | |
266 | firefly-rk3288/spl/u-boot-spl-dtb.bin out && \ | |
267 | cat firefly-rk3288/u-boot-dtb.bin >> out && \ | |
268 | sudo dd if=out of=/dev/sdc seek=64 | |
269 | ||
bcfb05ca JC |
270 | Or: |
271 | ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \ | |
272 | firefly-rk3288/spl/u-boot-spl-dtb.bin:firefly-rk3288/u-boot-dtb.bin \ | |
273 | out && \ | |
274 | sudo dd if=out of=/dev/sdc seek=64 | |
275 | ||
f1387130 SG |
276 | If you have an HDMI cable attached you should see a video console. |
277 | ||
1d5a6968 | 278 | For evb_rk3036 board: |
717f8845 | 279 | ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \ |
1d5a6968 | 280 | cat evb-rk3036/u-boot-dtb.bin >> out && \ |
281 | sudo dd if=out of=/dev/sdc seek=64 | |
282 | ||
bcfb05ca JC |
283 | Or: |
284 | ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d \ | |
285 | evb-rk3036/spl/u-boot-spl.bin:evb-rk3036/u-boot-dtb.bin out && \ | |
286 | sudo dd if=out of=/dev/sdc seek=64 | |
287 | ||
1d5a6968 | 288 | Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the |
289 | debug uart must be disabled | |
adfb2bfe | 290 | |
f46b859b | 291 | |
532cb7f5 JT |
292 | Booting from an SD card on RK3288 with TPL |
293 | ========================================== | |
294 | ||
295 | Since the size of SPL can't be exceeded 0x8000 bytes in RK3288, it is not possible add | |
296 | new SPL features like Falcon mode or etc. | |
297 | ||
298 | So introduce TPL so-that adding new features to SPL is possible because now TPL should | |
299 | run minimal with code like DDR, clock etc and rest of new features in SPL. | |
300 | ||
301 | As of now TPL is added on Vyasa-RK3288 board. | |
302 | ||
303 | To write an image that boots from an SD card (assumed to be /dev/mmcblk0): | |
304 | ||
78af73ef | 305 | sudo dd if=idbloader.img of=/dev/mmcblk0 seek=64 && |
d80599e8 | 306 | sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=16384 |
532cb7f5 | 307 | |
f46b859b HS |
308 | Booting from an SD card on RK3188 |
309 | ================================= | |
310 | ||
311 | For rk3188 boards the general storage onto the card stays the same as | |
312 | described above, but the image creation needs a bit more care. | |
313 | ||
314 | The bootrom of rk3188 expects to find a small 1kb loader which returns | |
315 | control to the bootrom, after which it will load the real loader, which | |
4d9253fb PT |
316 | can then be up to 29kb in size and does the regular ddr init. This is |
317 | handled by a single image (built as the SPL stage) that tests whether | |
318 | it is handled for the first or second time via code executed from the | |
319 | boot0-hook. | |
f46b859b HS |
320 | |
321 | Additionally the rk3188 requires everything the bootrom loads to be | |
322 | rc4-encrypted. Except for the very first stage the bootrom always reads | |
323 | and decodes 2kb pages, so files should be sized accordingly. | |
324 | ||
325 | # copy tpl, pad to 1020 bytes and append spl | |
4d9253fb | 326 | tools/mkimage -n rk3188 -T rksd -d spl/u-boot-spl.bin out |
f46b859b HS |
327 | |
328 | # truncate, encode and append u-boot.bin | |
329 | truncate -s %2048 u-boot.bin | |
330 | cat u-boot.bin | split -b 512 --filter='openssl rc4 -K 7C4E0304550509072D2C7B38170D1711' >> out | |
331 | ||
8fc48229 MK |
332 | Booting from an SD card on Pine64 Rock64 (RK3328) |
333 | ================================================= | |
334 | ||
335 | For Rock64 rk3328 board the following three parts are required: | |
6a452e5b | 336 | TPL, SPL, and the u-boot image tree blob. |
8fc48229 | 337 | |
8fc48229 MK |
338 | - Write TPL/SPL image at 64 sector |
339 | ||
340 | => sudo dd if=idbloader.img of=/dev/mmcblk0 seek=64 | |
341 | ||
342 | - Write u-boot image tree blob at 16384 sector | |
343 | ||
344 | => sudo dd if=u-boot.itb of=/dev/mmcblk0 seek=16384 | |
345 | ||
c661c059 JT |
346 | Booting from an SD card on RK3399 |
347 | ================================= | |
348 | ||
349 | To write an image that boots from an SD card (assumed to be /dev/sdc): | |
350 | ||
351 | Option 1: Package the image with Rockchip miniloader: | |
352 | ||
353 | - Create idbloader.img | |
354 | ||
355 | => cd /path/to/u-boot | |
356 | => ./tools/mkimage -n rk3399 -T rksd -d /path/to/rkbin/bin/rk33/rk3399_ddr_800MHz_v1.20.bin idbloader.img | |
357 | => cat /path/to/rkbin/bin/rk33/rk3399_miniloader_v1.19.bin >> idbloader.img | |
358 | ||
359 | - Write idbloader.img at 64 sector | |
360 | ||
361 | => sudo dd if=idbloader.img of=/dev/sdc seek=64 | |
362 | ||
363 | - Write trust.img at 24576 | |
364 | ||
365 | => sudo dd if=trust.img of=/dev/sdc seek=24576 | |
366 | ||
367 | - Write uboot.img at 16384 sector | |
368 | ||
369 | => sudo dd if=uboot.img of=/dev/sdc seek=16384 | |
370 | => sync | |
371 | ||
372 | Put this SD (or micro-SD) card into your board and reset it. You should see | |
373 | something like: | |
374 | ||
375 | DDR Version 1.20 20190314 | |
376 | In | |
377 | Channel 0: DDR3, 933MHz | |
378 | Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB | |
379 | no stride | |
380 | ch 0 ddrconfig = 0x101, ddrsize = 0x20 | |
381 | pmugrf_os_reg[2] = 0x10006281, stride = 0x17 | |
382 | OUT | |
383 | Boot1: 2019-03-14, version: 1.19 | |
384 | CPUId = 0x0 | |
385 | ChipType = 0x10, 239 | |
386 | mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000 | |
387 | mmc: ERROR: Card did not respond to voltage select! | |
388 | emmc reinit | |
389 | mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000 | |
390 | mmc: ERROR: Card did not respond to voltage select! | |
391 | emmc reinit | |
392 | mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000 | |
393 | mmc: ERROR: Card did not respond to voltage select! | |
394 | SdmmcInit=2 1 | |
395 | mmc0:cmd5,20 | |
396 | SdmmcInit=0 0 | |
397 | BootCapSize=0 | |
398 | UserCapSize=60543MB | |
399 | FwPartOffset=2000 , 0 | |
400 | StorageInit ok = 45266 | |
401 | SecureMode = 0 | |
402 | SecureInit read PBA: 0x4 | |
403 | SecureInit read PBA: 0x404 | |
404 | SecureInit read PBA: 0x804 | |
405 | SecureInit read PBA: 0xc04 | |
406 | SecureInit read PBA: 0x1004 | |
407 | SecureInit read PBA: 0x1404 | |
408 | SecureInit read PBA: 0x1804 | |
409 | SecureInit read PBA: 0x1c04 | |
410 | SecureInit ret = 0, SecureMode = 0 | |
411 | atags_set_bootdev: ret:(0) | |
412 | GPT 0x3380ec0 signature is wrong | |
413 | recovery gpt... | |
414 | GPT 0x3380ec0 signature is wrong | |
415 | recovery gpt fail! | |
416 | LoadTrust Addr:0x4000 | |
417 | No find bl30.bin | |
418 | Load uboot, ReadLba = 2000 | |
419 | hdr 0000000003380880 + 0x0:0x88,0x41,0x3e,0x97,0xe6,0x61,0x54,0x23,0xe9,0x5a,0xd1,0x2b,0xdc,0x2f,0xf9,0x35, | |
420 | ||
421 | Load OK, addr=0x200000, size=0x9c9c0 | |
422 | RunBL31 0x10000 | |
423 | NOTICE: BL31: v1.3(debug):370ab80 | |
424 | NOTICE: BL31: Built : 09:23:41, Mar 4 2019 | |
425 | NOTICE: BL31: Rockchip release version: v1.1 | |
426 | INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3 | |
427 | INFO: Using opteed sec cpu_context! | |
428 | INFO: boot cpu mask: 0 | |
429 | INFO: plat_rockchip_pmu_init(1181): pd status 3e | |
430 | INFO: BL31: Initializing runtime services | |
431 | INFO: BL31: Initializing BL32 | |
432 | INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-195-g8f090d20 #6 Fri Dec 7 06:11:20 UTC 2018 aarch64) | |
433 | ||
434 | INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2 | |
435 | ||
436 | INF [0x0] TEE-CORE:init_teecore:83: teecore inits done | |
437 | INFO: BL31: Preparing for EL3 exit to normal world | |
438 | INFO: Entry point address = 0x200000 | |
439 | INFO: SPSR = 0x3c9 | |
440 | ||
441 | ||
442 | U-Boot 2019.04-rc4-00136-gfd121f9641-dirty (Apr 16 2019 - 14:02:47 +0530) | |
443 | ||
444 | Model: FriendlyARM NanoPi NEO4 | |
445 | DRAM: 1022 MiB | |
446 | MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0 | |
447 | Loading Environment from MMC... *** Warning - bad CRC, using default environment | |
448 | ||
449 | In: serial@ff1a0000 | |
450 | Out: serial@ff1a0000 | |
451 | Err: serial@ff1a0000 | |
452 | Model: FriendlyARM NanoPi NEO4 | |
453 | Net: eth0: ethernet@fe300000 | |
454 | Hit any key to stop autoboot: 0 | |
455 | => | |
456 | ||
457 | Option 2: Package the image with SPL: | |
458 | ||
459 | - Prefix rk3399 header to SPL image | |
460 | ||
461 | => cd /path/to/u-boot | |
462 | => ./tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl-dtb.bin out | |
463 | ||
464 | - Write prefixed SPL at 64th sector | |
465 | ||
466 | => sudo dd if=out of=/dev/sdc seek=64 | |
467 | ||
468 | - Write U-Boot proper at 16384 sector | |
469 | ||
470 | => sudo dd if=u-boot.itb of=/dev/sdc seek=16384 | |
471 | => sync | |
472 | ||
473 | Put this SD (or micro-SD) card into your board and reset it. You should see | |
474 | something like: | |
475 | ||
476 | U-Boot SPL board init | |
477 | Trying to boot from MMC1 | |
478 | ||
479 | ||
480 | U-Boot 2019.01-00004-g14db5ee998 (Mar 11 2019 - 13:18:41 +0530) | |
481 | ||
482 | Model: Orange Pi RK3399 Board | |
483 | DRAM: 2 GiB | |
484 | MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0 | |
485 | Loading Environment from MMC... OK | |
486 | In: serial@ff1a0000 | |
487 | Out: serial@ff1a0000 | |
488 | Err: serial@ff1a0000 | |
489 | Model: Orange Pi RK3399 Board | |
490 | Net: eth0: ethernet@fe300000 | |
491 | Hit any key to stop autoboot: 0 | |
492 | => | |
f46b859b | 493 | |
051c7550 JT |
494 | Option 3: Package the image with TPL: |
495 | ||
051c7550 JT |
496 | - Write tpl+spl at 64th sector |
497 | ||
78af73ef | 498 | => sudo dd if=idbloader.img of=/dev/sdc seek=64 |
051c7550 JT |
499 | |
500 | - Write U-Boot proper at 16384 sector | |
501 | ||
502 | => sudo dd if=u-boot.itb of=/dev/sdc seek=16384 | |
503 | => sync | |
504 | ||
505 | Put this SD (or micro-SD) card into your board and reset it. You should see | |
506 | something like: | |
507 | ||
508 | U-Boot TPL board init | |
509 | Trying to boot from BOOTROM | |
510 | Returning to boot ROM... | |
511 | ||
512 | U-Boot SPL board init | |
513 | Trying to boot from MMC1 | |
514 | ||
515 | ||
516 | U-Boot 2019.07-rc1-00241-g5b3244767a (May 08 2019 - 10:51:06 +0530) | |
517 | ||
518 | Model: Orange Pi RK3399 Board | |
519 | DRAM: 2 GiB | |
520 | MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0 | |
521 | Loading Environment from MMC... OK | |
522 | In: serial@ff1a0000 | |
523 | Out: serial@ff1a0000 | |
524 | Err: serial@ff1a0000 | |
525 | Model: Orange Pi RK3399 Board | |
526 | Net: eth0: ethernet@fe300000 | |
527 | Hit any key to stop autoboot: 0 | |
528 | => | |
529 | ||
a16e2e06 XZ |
530 | Using fastboot on rk3288 |
531 | ======================== | |
a16e2e06 XZ |
532 | - Write GPT partition layout to mmc device which fastboot want to use it to |
533 | store the image | |
534 | ||
535 | => gpt write mmc 1 $partitions | |
536 | ||
537 | - Invoke fastboot command to prepare | |
538 | ||
539 | => fastboot 1 | |
540 | ||
541 | - Start fastboot request on PC | |
542 | ||
543 | fastboot -i 0x2207 flash loader evb-rk3288/spl/u-boot-spl-dtb.bin | |
544 | ||
545 | You should see something like: | |
546 | ||
547 | => fastboot 1 | |
548 | WARNING: unknown variable: partition-type:loader | |
549 | Starting download of 357796 bytes | |
550 | .. | |
551 | downloading of 357796 bytes finished | |
552 | Flashing Raw Image | |
553 | ........ wrote 357888 bytes to 'loader' | |
554 | ||
adfb2bfe SG |
555 | Booting from SPI |
556 | ================ | |
557 | ||
9e92116b SG |
558 | To write an image that boots from SPI flash (e.g. for the Haier Chromebook or |
559 | Bob): | |
adfb2bfe | 560 | |
dd8e4290 SG |
561 | ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \ |
562 | -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \ | |
563 | dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \ | |
564 | cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \ | |
adfb2bfe SG |
565 | dd if=out.bin of=out.bin.pad bs=4M conv=sync |
566 | ||
567 | This converts the SPL image to the required SPI format by adding the Rockchip | |
6cecc2b5 | 568 | header and skipping every second 2KB block. Then the U-Boot image is written at |
adfb2bfe SG |
569 | offset 128KB and the whole image is padded to 4MB which is the SPI flash size. |
570 | The position of U-Boot is controlled with this setting in U-Boot: | |
571 | ||
01528791 | 572 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 |
adfb2bfe SG |
573 | |
574 | If you have a Dediprog em100pro connected then you can write the image with: | |
575 | ||
576 | sudo em100 -s -c GD25LQ32 -d out.bin.pad -r | |
577 | ||
578 | When booting you should see something like: | |
579 | ||
580 | U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32) | |
581 | ||
582 | ||
583 | U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600) | |
584 | ||
585 | Model: Google Jerry | |
586 | DRAM: 2 GiB | |
587 | MMC: | |
588 | Using default environment | |
589 | ||
590 | In: serial@ff690000 | |
591 | Out: serial@ff690000 | |
592 | Err: serial@ff690000 | |
593 | => | |
594 | ||
adfb2bfe SG |
595 | Future work |
596 | =========== | |
597 | ||
598 | Immediate priorities are: | |
599 | ||
adfb2bfe SG |
600 | - USB host |
601 | - USB device | |
f1387130 | 602 | - Run CPU at full speed (code exists but we only see ~60 DMIPS maximum) |
adfb2bfe | 603 | - NAND flash |
adfb2bfe SG |
604 | - Boot U-Boot proper over USB OTG (at present only SPL works) |
605 | ||
606 | ||
607 | Development Notes | |
608 | ================= | |
609 | ||
610 | There are plenty of patches in the links below to help with this work. | |
611 | ||
612 | [1] https://github.com/rkchrome/uboot.git | |
613 | [2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288 | |
614 | [3] https://github.com/linux-rockchip/rkflashtool.git | |
615 | [4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en | |
616 | ||
617 | rkimage | |
618 | ------- | |
619 | ||
620 | rkimage.c produces an SPL image suitable for sending directly to the boot ROM | |
621 | over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes) | |
622 | followed by u-boot-spl-dtb.bin. | |
623 | ||
624 | The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM | |
625 | starts at 0xff700000 and extends to 0xff718000 where we put the stack. | |
626 | ||
627 | rksd | |
628 | ---- | |
629 | ||
630 | rksd.c produces an image consisting of 32KB of empty space, a header and | |
631 | u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although | |
632 | most of the fields are unused by U-Boot. We just need to specify the | |
633 | signature, a flag and the block offset and size of the SPL image. | |
634 | ||
635 | The header occupies a single block but we pad it out to 4 blocks. The header | |
636 | is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL | |
637 | image can be encoded too but we don't do that. | |
638 | ||
639 | The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB, | |
640 | or 0x40 blocks. This is a severe and annoying limitation. There may be a way | |
641 | around this limitation, since there is plenty of SRAM, but at present the | |
642 | board refuses to boot if this limit is exceeded. | |
643 | ||
644 | The image produced is padded up to a block boundary (512 bytes). It should be | |
645 | written to the start of an SD card using dd. | |
646 | ||
647 | Since this image is set to load U-Boot from the SD card at block offset, | |
648 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write | |
649 | u-boot-dtb.img to the SD card at that offset. See above for instructions. | |
650 | ||
651 | rkspi | |
652 | ----- | |
653 | ||
654 | rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The | |
655 | resulting image is then spread out so that only the first 2KB of each 4KB | |
656 | sector is used. The header is the same as with rksd and the maximum size is | |
657 | also 32KB (before spreading). The image should be written to the start of | |
658 | SPI flash. | |
659 | ||
660 | See above for instructions on how to write a SPI image. | |
661 | ||
002c634c SG |
662 | rkmux.py |
663 | -------- | |
664 | ||
665 | You can use this script to create #defines for SoC register access. See the | |
666 | script for usage. | |
667 | ||
adfb2bfe SG |
668 | |
669 | Device tree and driver model | |
670 | ---------------------------- | |
671 | ||
672 | Where possible driver model is used to provide a structure to the | |
673 | functionality. Device tree is used for configuration. However these have an | |
674 | overhead and in SPL with a 32KB size limit some shortcuts have been taken. | |
675 | In general all Rockchip drivers should use these features, with SPL-specific | |
676 | modifications where required. | |
677 | ||
3f3e1e33 JC |
678 | GPT partition layout |
679 | ---------------------------- | |
680 | ||
681 | Rockchip use a unified GPT partition layout in open source support. | |
682 | With this GPT partition layout, uboot can be compatilbe with other components, | |
683 | like miniloader, trusted-os, arm-trust-firmware. | |
684 | ||
685 | There are some documents about partitions in the links below. | |
686 | http://rockchip.wikidot.com/partitions | |
adfb2bfe SG |
687 | |
688 | -- | |
c661c059 JT |
689 | Jagan Teki <[email protected]> |
690 | 27 Mar 2019 | |
adfb2bfe SG |
691 | Simon Glass <[email protected]> |
692 | 24 June 2015 |