projects / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| fcfdb6d5 | 1 | CONFIG_ARM=y |
| abf8d963 | 2 | CONFIG_COUNTER_FREQUENCY=25000000 |
| b11dc33e | 3 | CONFIG_GIC_V3_ITS=y |
| fcfdb6d5 | 4 | CONFIG_TARGET_LS2080AQDS=y |
| 98463903 | 5 | CONFIG_TEXT_BASE=0x30100000 |
| 9802154a | 6 | CONFIG_SYS_MALLOC_LEN=0x202000 |
| 554e5514 | 7 | CONFIG_NR_DRAM_BANKS=3 |
| fcb5117d TR |
8 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| 9 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 | |
| a09fea1d | 10 | CONFIG_ENV_SIZE=0x2000 |
| f7d0ae9c | 11 | CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" |
| ea92f95d TR |
12 | CONFIG_FSL_LS_PPA=y |
| 13 | CONFIG_AHCI=y | |
| 14 | CONFIG_NXP_ESBC=y | |
| df59b7d2 | 15 | CONFIG_FSL_USE_PCA9547_MUX=y |
| d43cd486 TR |
16 | CONFIG_FSL_QIXIS=y |
| 17 | # CONFIG_QIXIS_I2C_ACCESS is not set | |
| aca5cd27 | 18 | # CONFIG_SYS_MALLOC_F is not set |
| a8c281d4 | 19 | CONFIG_REMAKE_ELF=y |
| 08574ed3 | 20 | CONFIG_SYS_MONITOR_LEN=1048576 |
| 54c5c2b8 | 21 | CONFIG_MP=y |
| fcfdb6d5 SJ |
22 | CONFIG_FIT_VERBOSE=y |
| 23 | CONFIG_OF_BOARD_SETUP=y | |
| 24 | CONFIG_OF_STDOUT_VIA_ALIAS=y | |
| 2f8a6db5 | 25 | CONFIG_DYNAMIC_SYS_CLK_FREQ=y |
| bb597c0e | 26 | CONFIG_BOOTDELAY=10 |
| 5abc1a45 SP |
27 | CONFIG_USE_BOOTARGS=y |
| 28 | CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" | |
| 970bf860 | 29 | CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" |
| 29cc2b54 | 30 | CONFIG_RESET_PHY_R=y |
| cf493582 | 31 | CONFIG_SYS_MAXARGS=64 |
| d0ee7f29 | 32 | CONFIG_SYS_PBSIZE=532 |
| ad12dc18 | 33 | CONFIG_CMD_IMLS=y |
| 89cb2b5f | 34 | CONFIG_CMD_GREPENV=y |
| a1dc980d | 35 | CONFIG_CMD_EEPROM=y |
| 88cd7d0e TR |
36 | CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 |
| 37 | CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 | |
| b331cd62 | 38 | CONFIG_CMD_GPT=y |
| 88663126 | 39 | CONFIG_CMD_I2C=y |
| 89cb2b5f | 40 | CONFIG_CMD_MMC=y |
| 8f1a80e9 | 41 | CONFIG_CMD_NAND=y |
| 88663126 | 42 | CONFIG_CMD_PCI=y |
| 78d1e1d0 | 43 | CONFIG_CMD_USB=y |
| fcfdb6d5 | 44 | # CONFIG_CMD_SETEXPR is not set |
| 89cb2b5f | 45 | CONFIG_CMD_CACHE=y |
| c9032ce1 | 46 | CONFIG_CMD_DATE=y |
| 1acc0087 | 47 | # CONFIG_ISO_PARTITION is not set |
| fcfdb6d5 | 48 | CONFIG_OF_CONTROL=y |
| e91907a1 | 49 | CONFIG_ENV_OVERWRITE=y |
| 0e14cdfa TR |
50 | CONFIG_USE_ETHPRIME=y |
| 51 | CONFIG_ETHPRIME="DPMAC1@xgmii" | |
| fcfdb6d5 | 52 | CONFIG_NET_RANDOM_ETHADDR=y |
| 6edb5dd3 | 53 | CONFIG_SATA=y |
| a4707dda | 54 | CONFIG_SATA_CEVA=y |
| efb5dab7 | 55 | CONFIG_DYNAMIC_DDR_CLK_FREQ=y |
| 388de0fa | 56 | CONFIG_DIMM_SLOTS_PER_CTLR=2 |
| d0748898 | 57 | CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS=2 |
| 95372165 TR |
58 | CONFIG_DDR_ECC=y |
| 59 | CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y | |
| 78475d25 | 60 | CONFIG_SYS_FSL_DDR_INTLV_256B=y |
| 55dabcc8 | 61 | CONFIG_SYS_I2C_LEGACY=y |
| 88cd7d0e | 62 | CONFIG_SYS_I2C_EEPROM_ADDR=0x57 |
| 07dea2e7 | 63 | CONFIG_FSL_ESDHC=y |
| 7e7d04ae | 64 | CONFIG_ESDHC_DETECT_QUIRK=y |
| 0cfccb54 | 65 | CONFIG_MTD=y |
| e856bdcf | 66 | CONFIG_MTD_NOR_FLASH=y |
| 2fe88d45 AF |
67 | CONFIG_FLASH_CFI_DRIVER=y |
| 68 | CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y | |
| b72713dc | 69 | CONFIG_SYS_FLASH_EMPTY_INFO=y |
| 2fe88d45 | 70 | CONFIG_SYS_FLASH_CFI=y |
| 1107dad8 | 71 | CONFIG_SYS_FLASH_QUIET_TEST=y |
| 1db251bd | 72 | CONFIG_SYS_MAX_FLASH_SECT=1024 |
| 0f9595b9 | 73 | CONFIG_SYS_MAX_FLASH_BANKS=2 |
| 0cfccb54 | 74 | CONFIG_MTD_RAW_NAND=y |
| 53f06134 | 75 | CONFIG_NAND_FSL_IFC=y |
| c0ad62c5 | 76 | CONFIG_SYS_NAND_ONFI_DETECTION=y |
| 4d3495de TR |
77 | CONFIG_SYS_NAND_MAX_OOBFREE=2 |
| 78 | CONFIG_SYS_NAND_MAX_ECCPOS=256 | |
| aca5cd27 | 79 | CONFIG_DM_SPI_FLASH=y |
| f76750d1 TR |
80 | CONFIG_SPI_FLASH_EON=y |
| 81 | CONFIG_SPI_FLASH_STMICRO=y | |
| 82 | CONFIG_SPI_FLASH_SST=y | |
| 3146f0c0 | 83 | CONFIG_PHYLIB=y |
| 306881a0 TR |
84 | CONFIG_PHYLIB_10G=y |
| 85 | CONFIG_PHY_REALTEK=y | |
| 86 | CONFIG_PHY_TERANETICS=y | |
| 87 | CONFIG_PHY_VITESSE=y | |
| 612f7a61 TR |
88 | CONFIG_FSL_MEMAC=y |
| 89 | CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y | |
| 1989374b | 90 | CONFIG_PHY_GIGE=y |
| fcfdb6d5 | 91 | CONFIG_E1000=y |
| d7869b21 | 92 | CONFIG_MII=y |
| 045474be | 93 | CONFIG_NVME_PCI=y |
| 8728c97e | 94 | CONFIG_PCI=y |
| 8728c97e | 95 | CONFIG_DM_PCI_COMPAT=y |
| ed188aa8 | 96 | CONFIG_PCIE_LAYERSCAPE_RC=y |
| f76750d1 | 97 | CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y |
| ea467ea1 | 98 | CONFIG_RTC_DS3231=y |
| a4707dda | 99 | CONFIG_DM_SCSI=y |
| 9591b635 | 100 | CONFIG_SYS_NS16550_SERIAL=y |
| f1b1f770 | 101 | CONFIG_SPI=y |
| aca5cd27 | 102 | CONFIG_DM_SPI=y |
| fcfdb6d5 | 103 | CONFIG_FSL_DSPI=y |
| 0a8cc1a3 MY |
104 | CONFIG_USB=y |
| 105 | CONFIG_USB_XHCI_HCD=y | |
| 10db7500 | 106 | CONFIG_USB_XHCI_DWC3=y |
| fcfdb6d5 | 107 | CONFIG_RSA=y |
| 28522678 | 108 | CONFIG_RSA_SOFTWARE_EXP=y |