]> Git Repo - u-boot.git/blame - tools/imximage.c
tools: imx_header should not include flash_offset
[u-boot.git] / tools / imximage.c
CommitLineData
8edcde5e
SB
1/*
2 * (C) Copyright 2009
3 * Stefano Babic, DENX Software Engineering, [email protected].
4 *
5 * (C) Copyright 2008
6 * Marvell Semiconductor <www.marvell.com>
7 * Written-by: Prafulla Wadaskar <[email protected]>
8 *
1a459660 9 * SPDX-License-Identifier: GPL-2.0+
8edcde5e
SB
10 */
11
249d4dec
KG
12/* Required to obtain the getline prototype from stdio.h */
13#define _GNU_SOURCE
14
8edcde5e
SB
15#include "mkimage.h"
16#include <image.h>
17#include "imximage.h"
18
19/*
20 * Supported commands for configuration file
21 */
22static table_entry_t imximage_cmds[] = {
8a1edd7d 23 {CMD_BOOT_FROM, "BOOT_FROM", "boot command", },
6cb83829 24 {CMD_BOOT_OFFSET, "BOOT_OFFSET", "Boot offset", },
8a1edd7d
LHR
25 {CMD_DATA, "DATA", "Reg Write Data", },
26 {CMD_IMAGE_VERSION, "IMAGE_VERSION", "image version", },
27 {-1, "", "", },
8edcde5e
SB
28};
29
30/*
31 * Supported Boot options for configuration file
32 * this is needed to set the correct flash offset
33 */
34static table_entry_t imximage_bootops[] = {
8edcde5e 35 {FLASH_OFFSET_ONENAND, "onenand", "OneNAND Flash",},
bd25864c 36 {FLASH_OFFSET_NAND, "nand", "NAND Flash", },
19b409c0
DB
37 {FLASH_OFFSET_NOR, "nor", "NOR Flash", },
38 {FLASH_OFFSET_SATA, "sata", "SATA Disk", },
bd25864c
DB
39 {FLASH_OFFSET_SD, "sd", "SD Card", },
40 {FLASH_OFFSET_SPI, "spi", "SPI Flash", },
8edcde5e
SB
41 {-1, "", "Invalid", },
42};
43
8a1edd7d
LHR
44/*
45 * IMXIMAGE version definition for i.MX chips
46 */
47static table_entry_t imximage_versions[] = {
48 {IMXIMAGE_V1, "", " (i.MX25/35/51 compatible)", },
19b409c0 49 {IMXIMAGE_V2, "", " (i.MX53/6 compatible)", },
8a1edd7d
LHR
50 {-1, "", " (Invalid)", },
51};
8edcde5e
SB
52
53static struct imx_header imximage_header;
8a1edd7d 54static uint32_t imximage_version;
4655d40f 55static uint32_t imximage_flash_offset;
8a1edd7d
LHR
56
57static set_dcd_val_t set_dcd_val;
58static set_dcd_rst_t set_dcd_rst;
59static set_imx_hdr_t set_imx_hdr;
4d5fa985 60static uint32_t max_dcd_entries;
24331982 61static uint32_t *header_size_ptr;
8edcde5e
SB
62
63static uint32_t get_cfg_value(char *token, char *name, int linenr)
64{
65 char *endptr;
66 uint32_t value;
67
68 errno = 0;
69 value = strtoul(token, &endptr, 16);
70 if (errno || (token == endptr)) {
71 fprintf(stderr, "Error: %s[%d] - Invalid hex data(%s)\n",
72 name, linenr, token);
73 exit(EXIT_FAILURE);
74 }
75 return value;
76}
77
8a1edd7d 78static uint32_t detect_imximage_version(struct imx_header *imx_hdr)
8edcde5e 79{
8a1edd7d
LHR
80 imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
81 imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
82 flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
83 flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
84
85 /* Try to detect V1 */
86 if ((fhdr_v1->app_code_barker == APP_CODE_BARKER) &&
87 (hdr_v1->dcd_table.preamble.barker == DCD_BARKER))
88 return IMXIMAGE_V1;
89
90 /* Try to detect V2 */
91 if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
92 (hdr_v2->dcd_table.header.tag == DCD_HEADER_TAG))
93 return IMXIMAGE_V2;
94
95 return IMXIMAGE_VER_INVALID;
8edcde5e
SB
96}
97
8a1edd7d 98static void err_imximage_version(int version)
8edcde5e 99{
8a1edd7d
LHR
100 fprintf(stderr,
101 "Error: Unsupported imximage version:%d\n", version);
8edcde5e 102
8a1edd7d
LHR
103 exit(EXIT_FAILURE);
104}
8edcde5e 105
8a1edd7d
LHR
106static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno,
107 int fld, uint32_t value, uint32_t off)
108{
109 dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
110
111 switch (fld) {
112 case CFG_REG_SIZE:
113 /* Byte, halfword, word */
114 if ((value != 1) && (value != 2) && (value != 4)) {
115 fprintf(stderr, "Error: %s[%d] - "
116 "Invalid register size " "(%d)\n",
117 name, lineno, value);
118 exit(EXIT_FAILURE);
119 }
120 dcd_v1->addr_data[off].type = value;
121 break;
122 case CFG_REG_ADDRESS:
123 dcd_v1->addr_data[off].addr = value;
124 break;
125 case CFG_REG_VALUE:
126 dcd_v1->addr_data[off].value = value;
127 break;
128 default:
129 break;
8edcde5e 130
8a1edd7d
LHR
131 }
132}
8edcde5e 133
8a1edd7d
LHR
134static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno,
135 int fld, uint32_t value, uint32_t off)
136{
137 dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
138
139 switch (fld) {
140 case CFG_REG_ADDRESS:
141 dcd_v2->addr_data[off].addr = cpu_to_be32(value);
142 break;
143 case CFG_REG_VALUE:
144 dcd_v2->addr_data[off].value = cpu_to_be32(value);
145 break;
146 default:
147 break;
148
149 }
8edcde5e
SB
150}
151
8a1edd7d
LHR
152/*
153 * Complete setting up the rest field of DCD of V1
154 * such as barker code and DCD data length.
155 */
156static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len,
157 char *name, int lineno)
8edcde5e 158{
8a1edd7d
LHR
159 dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
160
8a1edd7d
LHR
161 dcd_v1->preamble.barker = DCD_BARKER;
162 dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t);
163}
164
165/*
166 * Complete setting up the reset field of DCD of V2
167 * such as DCD tag, version, length, etc.
168 */
169static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len,
170 char *name, int lineno)
171{
172 dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
173
8a1edd7d
LHR
174 dcd_v2->header.tag = DCD_HEADER_TAG;
175 dcd_v2->header.length = cpu_to_be16(
176 dcd_len * sizeof(dcd_addr_data_t) + 8);
177 dcd_v2->header.version = DCD_VERSION;
178 dcd_v2->write_dcd_command.tag = DCD_COMMAND_TAG;
179 dcd_v2->write_dcd_command.length = cpu_to_be16(
180 dcd_len * sizeof(dcd_addr_data_t) + 4);
181 dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM;
182}
183
184static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
ad0826dc 185 uint32_t entry_point, uint32_t flash_offset)
8a1edd7d
LHR
186{
187 imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1;
188 flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
189 dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
ab857f26 190 uint32_t hdr_base;
24331982
TK
191 uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr)
192 - ((char *)imxhdr));
8a1edd7d 193
8a1edd7d
LHR
194 /* Set magic number */
195 fhdr_v1->app_code_barker = APP_CODE_BARKER;
196
ab857f26
TK
197 hdr_base = entry_point - sizeof(struct imx_header);
198 fhdr_v1->app_dest_ptr = hdr_base - flash_offset;
ad0826dc 199 fhdr_v1->app_code_jump_vector = entry_point;
8a1edd7d 200
ab857f26
TK
201 fhdr_v1->dcd_ptr_ptr = hdr_base + offsetof(flash_header_v1_t, dcd_ptr);
202 fhdr_v1->dcd_ptr = hdr_base + offsetof(imx_header_v1_t, dcd_table);
8a1edd7d 203
8a1edd7d
LHR
204 /* Security feature are not supported */
205 fhdr_v1->app_code_csf = 0;
206 fhdr_v1->super_root_key = 0;
24331982 207 header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4);
8a1edd7d
LHR
208}
209
210static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
ad0826dc 211 uint32_t entry_point, uint32_t flash_offset)
8a1edd7d
LHR
212{
213 imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2;
214 flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
ab857f26 215 uint32_t hdr_base;
8a1edd7d 216
8a1edd7d
LHR
217 /* Set magic number */
218 fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */
219 fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t));
220 fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
221
ad0826dc 222 fhdr_v2->entry = entry_point;
8a1edd7d 223 fhdr_v2->reserved1 = fhdr_v2->reserved2 = 0;
ab857f26 224 fhdr_v2->self = hdr_base = entry_point - sizeof(struct imx_header);
8a1edd7d 225
ab857f26
TK
226 fhdr_v2->dcd_ptr = hdr_base + offsetof(imx_header_v2_t, dcd_table);
227 fhdr_v2->boot_data_ptr = hdr_base
228 + offsetof(imx_header_v2_t, boot_data);
229 hdr_v2->boot_data.start = hdr_base - flash_offset;
8a1edd7d
LHR
230
231 /* Security feature are not supported */
232 fhdr_v2->csf = 0;
24331982 233 header_size_ptr = &hdr_v2->boot_data.size;
8a1edd7d
LHR
234}
235
236static void set_hdr_func(struct imx_header *imxhdr)
237{
238 switch (imximage_version) {
239 case IMXIMAGE_V1:
240 set_dcd_val = set_dcd_val_v1;
241 set_dcd_rst = set_dcd_rst_v1;
242 set_imx_hdr = set_imx_hdr_v1;
4d5fa985 243 max_dcd_entries = MAX_HW_CFG_SIZE_V1;
8a1edd7d
LHR
244 break;
245 case IMXIMAGE_V2:
246 set_dcd_val = set_dcd_val_v2;
247 set_dcd_rst = set_dcd_rst_v2;
248 set_imx_hdr = set_imx_hdr_v2;
4d5fa985 249 max_dcd_entries = MAX_HW_CFG_SIZE_V2;
8a1edd7d
LHR
250 break;
251 default:
252 err_imximage_version(imximage_version);
253 break;
254 }
255}
8edcde5e 256
8a1edd7d
LHR
257static void print_hdr_v1(struct imx_header *imx_hdr)
258{
259 imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
260 flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
261 dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
262 uint32_t size, length, ver;
263
264 size = dcd_v1->preamble.length;
265 if (size > (MAX_HW_CFG_SIZE_V1 * sizeof(dcd_type_addr_data_t))) {
8edcde5e
SB
266 fprintf(stderr,
267 "Error: Image corrupt DCD size %d exceed maximum %d\n",
5b28e913 268 (uint32_t)(size / sizeof(dcd_type_addr_data_t)),
8a1edd7d
LHR
269 MAX_HW_CFG_SIZE_V1);
270 exit(EXIT_FAILURE);
271 }
272
273 length = dcd_v1->preamble.length / sizeof(dcd_type_addr_data_t);
274 ver = detect_imximage_version(imx_hdr);
275
276 printf("Image Type: Freescale IMX Boot Image\n");
277 printf("Image Ver: %x", ver);
278 printf("%s\n", get_table_entry_name(imximage_versions, NULL, ver));
279 printf("Data Size: ");
280 genimg_print_size(dcd_v1->addr_data[length].type);
281 printf("Load Address: %08x\n", (uint32_t)fhdr_v1->app_dest_ptr);
282 printf("Entry Point: %08x\n", (uint32_t)fhdr_v1->app_code_jump_vector);
283}
284
285static void print_hdr_v2(struct imx_header *imx_hdr)
286{
287 imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
288 flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
289 dcd_v2_t *dcd_v2 = &hdr_v2->dcd_table;
290 uint32_t size, version;
291
292 size = be16_to_cpu(dcd_v2->header.length) - 8;
293 if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) {
294 fprintf(stderr,
295 "Error: Image corrupt DCD size %d exceed maximum %d\n",
296 (uint32_t)(size / sizeof(dcd_addr_data_t)),
297 MAX_HW_CFG_SIZE_V2);
8edcde5e
SB
298 exit(EXIT_FAILURE);
299 }
300
8a1edd7d 301 version = detect_imximage_version(imx_hdr);
8edcde5e
SB
302
303 printf("Image Type: Freescale IMX Boot Image\n");
8a1edd7d
LHR
304 printf("Image Ver: %x", version);
305 printf("%s\n", get_table_entry_name(imximage_versions, NULL, version));
8edcde5e 306 printf("Data Size: ");
8a1edd7d
LHR
307 genimg_print_size(hdr_v2->boot_data.size);
308 printf("Load Address: %08x\n", (uint32_t)fhdr_v2->boot_data_ptr);
309 printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry);
8edcde5e
SB
310}
311
8a1edd7d
LHR
312static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token,
313 char *name, int lineno, int fld, int dcd_len)
314{
315 int value;
316 static int cmd_ver_first = ~0;
317
318 switch (cmd) {
319 case CMD_IMAGE_VERSION:
320 imximage_version = get_cfg_value(token, name, lineno);
321 if (cmd_ver_first == 0) {
322 fprintf(stderr, "Error: %s[%d] - IMAGE_VERSION "
323 "command need be the first before other "
324 "valid command in the file\n", name, lineno);
325 exit(EXIT_FAILURE);
326 }
327 cmd_ver_first = 1;
328 set_hdr_func(imxhdr);
329 break;
330 case CMD_BOOT_FROM:
4655d40f 331 imximage_flash_offset = get_table_entry_id(imximage_bootops,
8a1edd7d 332 "imximage boot option", token);
4655d40f 333 if (imximage_flash_offset == -1) {
8a1edd7d
LHR
334 fprintf(stderr, "Error: %s[%d] -Invalid boot device"
335 "(%s)\n", name, lineno, token);
336 exit(EXIT_FAILURE);
337 }
338 if (unlikely(cmd_ver_first != 1))
339 cmd_ver_first = 0;
340 break;
6cb83829 341 case CMD_BOOT_OFFSET:
4655d40f 342 imximage_flash_offset = get_cfg_value(token, name, lineno);
6cb83829
MV
343 if (unlikely(cmd_ver_first != 1))
344 cmd_ver_first = 0;
345 break;
8a1edd7d
LHR
346 case CMD_DATA:
347 value = get_cfg_value(token, name, lineno);
348 (*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len);
349 if (unlikely(cmd_ver_first != 1))
350 cmd_ver_first = 0;
351 break;
352 }
353}
354
355static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd,
356 char *token, char *name, int lineno, int fld, int *dcd_len)
357{
358 int value;
359
360 switch (fld) {
361 case CFG_COMMAND:
362 *cmd = get_table_entry_id(imximage_cmds,
363 "imximage commands", token);
364 if (*cmd < 0) {
365 fprintf(stderr, "Error: %s[%d] - Invalid command"
366 "(%s)\n", name, lineno, token);
367 exit(EXIT_FAILURE);
368 }
369 break;
370 case CFG_REG_SIZE:
371 parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld, *dcd_len);
372 break;
373 case CFG_REG_ADDRESS:
374 case CFG_REG_VALUE:
375 if (*cmd != CMD_DATA)
376 return;
377
378 value = get_cfg_value(token, name, lineno);
379 (*set_dcd_val)(imxhdr, name, lineno, fld, value, *dcd_len);
380
4d5fa985 381 if (fld == CFG_REG_VALUE) {
8a1edd7d 382 (*dcd_len)++;
4d5fa985
TK
383 if (*dcd_len > max_dcd_entries) {
384 fprintf(stderr, "Error: %s[%d] -"
385 "DCD table exceeds maximum size(%d)\n",
386 name, lineno, max_dcd_entries);
387 exit(EXIT_FAILURE);
388 }
389 }
8a1edd7d
LHR
390 break;
391 default:
392 break;
393 }
394}
395static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name)
8edcde5e
SB
396{
397 FILE *fd = NULL;
398 char *line = NULL;
399 char *token, *saveptr1, *saveptr2;
400 int lineno = 0;
8a1edd7d 401 int fld;
0ad22703 402 size_t len;
8edcde5e 403 int dcd_len = 0;
8edcde5e
SB
404 int32_t cmd;
405
406 fd = fopen(name, "r");
407 if (fd == 0) {
408 fprintf(stderr, "Error: %s - Can't open DCD file\n", name);
409 exit(EXIT_FAILURE);
410 }
411
412 /* Very simple parsing, line starting with # are comments
413 * and are dropped
414 */
415 while ((getline(&line, &len, fd)) > 0) {
416 lineno++;
417
418 token = strtok_r(line, "\r\n", &saveptr1);
419 if (token == NULL)
420 continue;
421
422 /* Check inside the single line */
423 for (fld = CFG_COMMAND, cmd = CMD_INVALID,
424 line = token; ; line = NULL, fld++) {
425 token = strtok_r(line, " \t", &saveptr2);
426 if (token == NULL)
427 break;
428
429 /* Drop all text starting with '#' as comments */
430 if (token[0] == '#')
431 break;
432
8a1edd7d
LHR
433 parse_cfg_fld(imxhdr, &cmd, token, name,
434 lineno, fld, &dcd_len);
8edcde5e
SB
435 }
436
8edcde5e 437 }
8a1edd7d
LHR
438
439 (*set_dcd_rst)(imxhdr, dcd_len, name, lineno);
8edcde5e
SB
440 fclose(fd);
441
8d8cc828 442 /* Exit if there is no BOOT_FROM field specifying the flash_offset */
4655d40f 443 if (imximage_flash_offset == FLASH_OFFSET_UNDEFINED) {
8d8cc828
TK
444 fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name);
445 exit(EXIT_FAILURE);
446 }
5b28e913 447 return dcd_len;
8edcde5e
SB
448}
449
8edcde5e 450
8a1edd7d
LHR
451static int imximage_check_image_types(uint8_t type)
452{
453 if (type == IH_TYPE_IMXIMAGE)
454 return EXIT_SUCCESS;
455 else
456 return EXIT_FAILURE;
457}
8edcde5e 458
8a1edd7d
LHR
459static int imximage_verify_header(unsigned char *ptr, int image_size,
460 struct mkimage_params *params)
461{
462 struct imx_header *imx_hdr = (struct imx_header *) ptr;
8edcde5e 463
8a1edd7d
LHR
464 if (detect_imximage_version(imx_hdr) == IMXIMAGE_VER_INVALID)
465 return -FDT_ERR_BADSTRUCTURE;
8edcde5e 466
8a1edd7d
LHR
467 return 0;
468}
8edcde5e 469
8a1edd7d
LHR
470static void imximage_print_header(const void *ptr)
471{
472 struct imx_header *imx_hdr = (struct imx_header *) ptr;
473 uint32_t version = detect_imximage_version(imx_hdr);
474
475 switch (version) {
476 case IMXIMAGE_V1:
477 print_hdr_v1(imx_hdr);
478 break;
479 case IMXIMAGE_V2:
480 print_hdr_v2(imx_hdr);
481 break;
482 default:
483 err_imximage_version(version);
484 break;
485 }
486}
8edcde5e 487
8a1edd7d
LHR
488static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
489 struct mkimage_params *params)
490{
491 struct imx_header *imxhdr = (struct imx_header *)ptr;
492 uint32_t dcd_len;
8edcde5e 493
8a1edd7d
LHR
494 /*
495 * In order to not change the old imx cfg file
496 * by adding VERSION command into it, here need
497 * set up function ptr group to V1 by default.
498 */
499 imximage_version = IMXIMAGE_V1;
49d3e272 500 /* Be able to detect if the cfg file has no BOOT_FROM tag */
4655d40f 501 imximage_flash_offset = FLASH_OFFSET_UNDEFINED;
8a1edd7d 502 set_hdr_func(imxhdr);
8edcde5e 503
8a1edd7d
LHR
504 /* Parse dcd configuration file */
505 dcd_len = parse_cfg_file(imxhdr, params->imagename);
8edcde5e 506
8a1edd7d 507 /* Set the imx header */
4655d40f 508 (*set_imx_hdr)(imxhdr, dcd_len, params->ep, imximage_flash_offset);
1411fb37
FE
509
510 /*
511 * ROM bug alert
895d9966
MV
512 *
513 * MX53 only loads 512 byte multiples in case of SD boot.
514 * MX53 only loads NAND page multiples in case of NAND boot and
515 * supports up to 4096 byte large pages, thus align to 4096.
516 *
517 * The remaining fraction of a block bytes would not be loaded!
1411fb37 518 */
4655d40f 519 *header_size_ptr = ROUND(sbuf->st_size + imximage_flash_offset, 4096);
8edcde5e
SB
520}
521
522int imximage_check_params(struct mkimage_params *params)
523{
524 if (!params)
525 return CFG_INVALID;
526 if (!strlen(params->imagename)) {
527 fprintf(stderr, "Error: %s - Configuration file not specified, "
528 "it is needed for imximage generation\n",
529 params->cmdname);
530 return CFG_INVALID;
531 }
532 /*
533 * Check parameters:
534 * XIP is not allowed and verify that incompatible
535 * parameters are not sent at the same time
536 * For example, if list is required a data image must not be provided
537 */
538 return (params->dflag && (params->fflag || params->lflag)) ||
539 (params->fflag && (params->dflag || params->lflag)) ||
540 (params->lflag && (params->dflag || params->fflag)) ||
541 (params->xflag) || !(strlen(params->imagename));
542}
543
544/*
545 * imximage parameters
546 */
547static struct image_type_params imximage_params = {
6e083857 548 .name = "Freescale i.MX Boot Image support",
8edcde5e
SB
549 .header_size = sizeof(struct imx_header),
550 .hdr = (void *)&imximage_header,
551 .check_image_type = imximage_check_image_types,
552 .verify_header = imximage_verify_header,
553 .print_header = imximage_print_header,
554 .set_header = imximage_set_header,
555 .check_params = imximage_check_params,
556};
557
558void init_imx_image_type(void)
559{
560 mkimage_register(&imximage_params);
561}
This page took 0.154346 seconds and 4 git commands to generate.