[u-boot.git] / arch / arm / dts / fsl-ls1046a-qds.dtsi

// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
 *
 * Copyright (C) 2016, Freescale Semiconductor
 *
 * Mingkai Hu <[email protected]>
 */

/include/ "fsl-ls1046a.dtsi"

/ {
	model = "LS1046A QDS Board";
	aliases {
		spi0 = &qspi;
		spi1 = &dspi0;
	};
};

&dspi0 {
	bus-num = <0>;
	status = "okay";

	dflash0: n25q128a {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spi-flash";
		spi-max-frequency = <1000000>; /* input clock */
		spi-cpol;
		spi-cpha;
		reg = <0>;
	};

	dflash1: sst25wf040b {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spi-flash";
		spi-max-frequency = <3500000>;
		spi-cpol;
		spi-cpha;
		reg = <1>;
	};

	dflash2: en25s64 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spi-flash";
		spi-max-frequency = <3500000>;
		spi-cpol;
		spi-cpha;
		reg = <2>;
	};
};

&qspi {
	bus-num = <0>;
	status = "okay";

	qflash0: s25fl128s@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spi-flash";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
};

&duart0 {
	status = "okay";
};

&duart1 {
	status = "okay";
};

&lpuart0 {
	status = "okay";
};
Commit	Line	Data
4549e789	1	// SPDX-License-Identifier: GPL-2.0+ OR X11
126fe70d SX	2	/*
	3	* Device Tree Include file for Freescale Layerscape-1046A family SoC.
	4	*
	5	* Copyright (C) 2016, Freescale Semiconductor
	6	*
	7	* Mingkai Hu <[email protected]>
126fe70d SX	8	*/
	9
	10	/include/ "fsl-ls1046a.dtsi"
	11
	12	/ {
	13	model = "LS1046A QDS Board";
	14	aliases {
	15	spi0 = &qspi;
	16	spi1 = &dspi0;
	17	};
	18	};
	19
	20	&dspi0 {
	21	bus-num = <0>;
	22	status = "okay";
	23
	24	dflash0: n25q128a {
	25	#address-cells = <1>;
	26	#size-cells = <1>;
	27	compatible = "spi-flash";
	28	spi-max-frequency = <1000000>; /* input clock */
	29	spi-cpol;
	30	spi-cpha;
	31	reg = <0>;
	32	};
	33
	34	dflash1: sst25wf040b {
	35	#address-cells = <1>;
	36	#size-cells = <1>;
	37	compatible = "spi-flash";
	38	spi-max-frequency = <3500000>;
	39	spi-cpol;
	40	spi-cpha;
	41	reg = <1>;
	42	};
	43
	44	dflash2: en25s64 {
	45	#address-cells = <1>;
	46	#size-cells = <1>;
	47	compatible = "spi-flash";
	48	spi-max-frequency = <3500000>;
	49	spi-cpol;
	50	spi-cpha;
	51	reg = <2>;
	52	};
	53	};
	54
	55	&qspi {
	56	bus-num = <0>;
	57	status = "okay";
	58
	59	qflash0: s25fl128s@0 {
	60	#address-cells = <1>;
	61	#size-cells = <1>;
	62	compatible = "spi-flash";
	63	spi-max-frequency = <20000000>;
	64	reg = <0>;
	65	};
	66	};
	67
	68	&duart0 {
	69	status = "okay";
	70	};
	71
72	&duart1 {
73	status = "okay";
74	};
fdc2b54c SX	75
	76	&lpuart0 {
	77	status = "okay";
	78	};