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Commit | Line | Data |
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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
d7af6a48 SG |
2 | /* |
3 | * Copyright (c) 2014 Google, Inc | |
d7af6a48 SG |
4 | */ |
5 | ||
6 | #include <common.h> | |
7 | #include <dm.h> | |
8 | #include <errno.h> | |
f7ae49fc | 9 | #include <log.h> |
d7af6a48 SG |
10 | #include <malloc.h> |
11 | #include <spi.h> | |
12 | #include <dm/device-internal.h> | |
13 | #include <dm/uclass-internal.h> | |
d7af6a48 SG |
14 | #include <dm/lists.h> |
15 | #include <dm/util.h> | |
16 | ||
17 | DECLARE_GLOBAL_DATA_PTR; | |
18 | ||
12bfb2e0 SG |
19 | #define SPI_DEFAULT_SPEED_HZ 100000 |
20 | ||
d7af6a48 SG |
21 | static int spi_set_speed_mode(struct udevice *bus, int speed, int mode) |
22 | { | |
23 | struct dm_spi_ops *ops; | |
24 | int ret; | |
25 | ||
26 | ops = spi_get_ops(bus); | |
27 | if (ops->set_speed) | |
28 | ret = ops->set_speed(bus, speed); | |
29 | else | |
30 | ret = -EINVAL; | |
31 | if (ret) { | |
32 | printf("Cannot set speed (err=%d)\n", ret); | |
33 | return ret; | |
34 | } | |
35 | ||
36 | if (ops->set_mode) | |
37 | ret = ops->set_mode(bus, mode); | |
38 | else | |
39 | ret = -EINVAL; | |
40 | if (ret) { | |
41 | printf("Cannot set mode (err=%d)\n", ret); | |
42 | return ret; | |
43 | } | |
44 | ||
45 | return 0; | |
46 | } | |
47 | ||
7a3eff4c | 48 | int dm_spi_claim_bus(struct udevice *dev) |
d7af6a48 | 49 | { |
d7af6a48 SG |
50 | struct udevice *bus = dev->parent; |
51 | struct dm_spi_ops *ops = spi_get_ops(bus); | |
e564f054 | 52 | struct dm_spi_bus *spi = dev_get_uclass_priv(bus); |
7a3eff4c | 53 | struct spi_slave *slave = dev_get_parent_priv(dev); |
d7af6a48 | 54 | int speed; |
d7af6a48 SG |
55 | |
56 | speed = slave->max_hz; | |
57 | if (spi->max_hz) { | |
58 | if (speed) | |
b4141195 | 59 | speed = min(speed, (int)spi->max_hz); |
d7af6a48 SG |
60 | else |
61 | speed = spi->max_hz; | |
62 | } | |
63 | if (!speed) | |
12bfb2e0 | 64 | speed = SPI_DEFAULT_SPEED_HZ; |
60e2809a | 65 | if (speed != slave->speed) { |
24fc1ec2 MS |
66 | int ret = spi_set_speed_mode(bus, speed, slave->mode); |
67 | ||
60e2809a | 68 | if (ret) |
5e24a2ef | 69 | return log_ret(ret); |
60e2809a SG |
70 | slave->speed = speed; |
71 | } | |
d7af6a48 | 72 | |
5e24a2ef | 73 | return log_ret(ops->claim_bus ? ops->claim_bus(dev) : 0); |
d7af6a48 SG |
74 | } |
75 | ||
7a3eff4c | 76 | void dm_spi_release_bus(struct udevice *dev) |
d7af6a48 | 77 | { |
d7af6a48 SG |
78 | struct udevice *bus = dev->parent; |
79 | struct dm_spi_ops *ops = spi_get_ops(bus); | |
80 | ||
81 | if (ops->release_bus) | |
9694b724 | 82 | ops->release_bus(dev); |
d7af6a48 SG |
83 | } |
84 | ||
7a3eff4c PF |
85 | int dm_spi_xfer(struct udevice *dev, unsigned int bitlen, |
86 | const void *dout, void *din, unsigned long flags) | |
d7af6a48 | 87 | { |
d7af6a48 | 88 | struct udevice *bus = dev->parent; |
ccdabd89 | 89 | struct dm_spi_ops *ops = spi_get_ops(bus); |
d7af6a48 SG |
90 | |
91 | if (bus->uclass->uc_drv->id != UCLASS_SPI) | |
92 | return -EOPNOTSUPP; | |
ccdabd89 SG |
93 | if (!ops->xfer) |
94 | return -ENOSYS; | |
d7af6a48 | 95 | |
ccdabd89 | 96 | return ops->xfer(dev, bitlen, dout, din, flags); |
7a3eff4c PF |
97 | } |
98 | ||
c53b318e SG |
99 | int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep, |
100 | uint *offsetp) | |
101 | { | |
102 | struct udevice *bus = dev->parent; | |
103 | struct dm_spi_ops *ops = spi_get_ops(bus); | |
104 | ||
105 | if (bus->uclass->uc_drv->id != UCLASS_SPI) | |
106 | return -EOPNOTSUPP; | |
107 | if (!ops->get_mmap) | |
108 | return -ENOSYS; | |
109 | ||
110 | return ops->get_mmap(dev, map_basep, map_sizep, offsetp); | |
111 | } | |
112 | ||
7a3eff4c PF |
113 | int spi_claim_bus(struct spi_slave *slave) |
114 | { | |
5e24a2ef | 115 | return log_ret(dm_spi_claim_bus(slave->dev)); |
7a3eff4c PF |
116 | } |
117 | ||
118 | void spi_release_bus(struct spi_slave *slave) | |
119 | { | |
120 | dm_spi_release_bus(slave->dev); | |
121 | } | |
122 | ||
123 | int spi_xfer(struct spi_slave *slave, unsigned int bitlen, | |
124 | const void *dout, void *din, unsigned long flags) | |
125 | { | |
126 | return dm_spi_xfer(slave->dev, bitlen, dout, din, flags); | |
d7af6a48 SG |
127 | } |
128 | ||
8473b321 JT |
129 | int spi_write_then_read(struct spi_slave *slave, const u8 *opcode, |
130 | size_t n_opcode, const u8 *txbuf, u8 *rxbuf, | |
131 | size_t n_buf) | |
132 | { | |
133 | unsigned long flags = SPI_XFER_BEGIN; | |
134 | int ret; | |
135 | ||
136 | if (n_buf == 0) | |
137 | flags |= SPI_XFER_END; | |
138 | ||
139 | ret = spi_xfer(slave, n_opcode * 8, opcode, NULL, flags); | |
140 | if (ret) { | |
141 | debug("spi: failed to send command (%zu bytes): %d\n", | |
142 | n_opcode, ret); | |
143 | } else if (n_buf != 0) { | |
144 | ret = spi_xfer(slave, n_buf * 8, txbuf, rxbuf, SPI_XFER_END); | |
145 | if (ret) | |
146 | debug("spi: failed to transfer %zu bytes of data: %d\n", | |
147 | n_buf, ret); | |
148 | } | |
149 | ||
150 | return ret; | |
151 | } | |
152 | ||
71634f28 | 153 | #if !CONFIG_IS_ENABLED(OF_PLATDATA) |
6f849c30 | 154 | static int spi_child_post_bind(struct udevice *dev) |
d7af6a48 | 155 | { |
d0cff03e | 156 | struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev); |
d7af6a48 | 157 | |
279e26f5 | 158 | if (!dev_of_valid(dev)) |
d0cff03e SG |
159 | return 0; |
160 | ||
279e26f5 | 161 | return spi_slave_ofdata_to_platdata(dev, plat); |
d0cff03e | 162 | } |
71634f28 | 163 | #endif |
d0cff03e | 164 | |
6f849c30 | 165 | static int spi_post_probe(struct udevice *bus) |
d0cff03e | 166 | { |
71634f28 | 167 | #if !CONFIG_IS_ENABLED(OF_PLATDATA) |
e564f054 | 168 | struct dm_spi_bus *spi = dev_get_uclass_priv(bus); |
d0cff03e | 169 | |
279e26f5 | 170 | spi->max_hz = dev_read_u32_default(bus, "spi-max-frequency", 0); |
71634f28 | 171 | #endif |
281f1566 MS |
172 | #if defined(CONFIG_NEEDS_MANUAL_RELOC) |
173 | struct dm_spi_ops *ops = spi_get_ops(bus); | |
4d9b1afa ARS |
174 | static int reloc_done; |
175 | ||
176 | if (!reloc_done) { | |
177 | if (ops->claim_bus) | |
178 | ops->claim_bus += gd->reloc_off; | |
179 | if (ops->release_bus) | |
180 | ops->release_bus += gd->reloc_off; | |
181 | if (ops->set_wordlen) | |
182 | ops->set_wordlen += gd->reloc_off; | |
183 | if (ops->xfer) | |
184 | ops->xfer += gd->reloc_off; | |
185 | if (ops->set_speed) | |
186 | ops->set_speed += gd->reloc_off; | |
187 | if (ops->set_mode) | |
188 | ops->set_mode += gd->reloc_off; | |
189 | if (ops->cs_info) | |
190 | ops->cs_info += gd->reloc_off; | |
191 | reloc_done++; | |
192 | } | |
281f1566 MS |
193 | #endif |
194 | ||
d7af6a48 SG |
195 | return 0; |
196 | } | |
197 | ||
6f849c30 | 198 | static int spi_child_pre_probe(struct udevice *dev) |
440714ee | 199 | { |
d0cff03e | 200 | struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev); |
bcbe3d15 | 201 | struct spi_slave *slave = dev_get_parent_priv(dev); |
440714ee | 202 | |
d0cff03e SG |
203 | /* |
204 | * This is needed because we pass struct spi_slave around the place | |
205 | * instead slave->dev (a struct udevice). So we have to have some | |
206 | * way to access the slave udevice given struct spi_slave. Once we | |
207 | * change the SPI API to use udevice instead of spi_slave, we can | |
208 | * drop this. | |
209 | */ | |
440714ee SG |
210 | slave->dev = dev; |
211 | ||
d0cff03e SG |
212 | slave->max_hz = plat->max_hz; |
213 | slave->mode = plat->mode; | |
674f3609 | 214 | slave->wordlen = SPI_DEFAULT_WORDLEN; |
d0cff03e | 215 | |
440714ee SG |
216 | return 0; |
217 | } | |
218 | ||
d7af6a48 SG |
219 | int spi_chip_select(struct udevice *dev) |
220 | { | |
d0cff03e | 221 | struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev); |
d7af6a48 | 222 | |
d0cff03e | 223 | return plat ? plat->cs : -ENOENT; |
d7af6a48 SG |
224 | } |
225 | ||
ff56bba2 | 226 | int spi_find_chip_select(struct udevice *bus, int cs, struct udevice **devp) |
d7af6a48 | 227 | { |
7bacce52 BM |
228 | struct dm_spi_ops *ops; |
229 | struct spi_cs_info info; | |
d7af6a48 | 230 | struct udevice *dev; |
7bacce52 BM |
231 | int ret; |
232 | ||
233 | /* | |
234 | * Ask the driver. For the moment we don't have CS info. | |
235 | * When we do we could provide the driver with a helper function | |
236 | * to figure out what chip selects are valid, or just handle the | |
237 | * request. | |
238 | */ | |
239 | ops = spi_get_ops(bus); | |
240 | if (ops->cs_info) { | |
241 | ret = ops->cs_info(bus, cs, &info); | |
242 | } else { | |
243 | /* | |
244 | * We could assume there is at least one valid chip select. | |
245 | * The driver didn't care enough to tell us. | |
246 | */ | |
247 | ret = 0; | |
248 | } | |
249 | ||
250 | if (ret) { | |
251 | printf("Invalid cs %d (err=%d)\n", cs, ret); | |
252 | return ret; | |
253 | } | |
d7af6a48 SG |
254 | |
255 | for (device_find_first_child(bus, &dev); dev; | |
256 | device_find_next_child(&dev)) { | |
d0cff03e | 257 | struct dm_spi_slave_platdata *plat; |
d7af6a48 | 258 | |
d0cff03e SG |
259 | plat = dev_get_parent_platdata(dev); |
260 | debug("%s: plat=%p, cs=%d\n", __func__, plat, plat->cs); | |
261 | if (plat->cs == cs) { | |
d7af6a48 SG |
262 | *devp = dev; |
263 | return 0; | |
264 | } | |
265 | } | |
266 | ||
267 | return -ENODEV; | |
268 | } | |
269 | ||
270 | int spi_cs_is_valid(unsigned int busnum, unsigned int cs) | |
271 | { | |
272 | struct spi_cs_info info; | |
273 | struct udevice *bus; | |
274 | int ret; | |
275 | ||
276 | ret = uclass_find_device_by_seq(UCLASS_SPI, busnum, false, &bus); | |
277 | if (ret) { | |
278 | debug("%s: No bus %d\n", __func__, busnum); | |
279 | return ret; | |
280 | } | |
281 | ||
282 | return spi_cs_info(bus, cs, &info); | |
283 | } | |
284 | ||
285 | int spi_cs_info(struct udevice *bus, uint cs, struct spi_cs_info *info) | |
286 | { | |
287 | struct spi_cs_info local_info; | |
d7af6a48 SG |
288 | int ret; |
289 | ||
290 | if (!info) | |
291 | info = &local_info; | |
292 | ||
293 | /* If there is a device attached, return it */ | |
294 | info->dev = NULL; | |
295 | ret = spi_find_chip_select(bus, cs, &info->dev); | |
7bacce52 | 296 | return ret == -ENODEV ? 0 : ret; |
d7af6a48 SG |
297 | } |
298 | ||
d7af6a48 SG |
299 | int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp, |
300 | struct udevice **devp) | |
301 | { | |
302 | struct udevice *bus, *dev; | |
303 | int ret; | |
304 | ||
305 | ret = uclass_find_device_by_seq(UCLASS_SPI, busnum, false, &bus); | |
306 | if (ret) { | |
307 | debug("%s: No bus %d\n", __func__, busnum); | |
308 | return ret; | |
309 | } | |
310 | ret = spi_find_chip_select(bus, cs, &dev); | |
311 | if (ret) { | |
312 | debug("%s: No cs %d\n", __func__, cs); | |
313 | return ret; | |
314 | } | |
315 | *busp = bus; | |
316 | *devp = dev; | |
317 | ||
318 | return ret; | |
319 | } | |
320 | ||
321 | int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode, | |
322 | const char *drv_name, const char *dev_name, | |
323 | struct udevice **busp, struct spi_slave **devp) | |
324 | { | |
325 | struct udevice *bus, *dev; | |
96907c0f | 326 | struct dm_spi_slave_platdata *plat; |
f7dd5370 | 327 | struct spi_slave *slave; |
d7af6a48 SG |
328 | bool created = false; |
329 | int ret; | |
330 | ||
640abba5 | 331 | #if CONFIG_IS_ENABLED(OF_PLATDATA) |
71634f28 SG |
332 | ret = uclass_first_device_err(UCLASS_SPI, &bus); |
333 | #else | |
d7af6a48 | 334 | ret = uclass_get_device_by_seq(UCLASS_SPI, busnum, &bus); |
71634f28 | 335 | #endif |
d7af6a48 SG |
336 | if (ret) { |
337 | printf("Invalid bus %d (err=%d)\n", busnum, ret); | |
338 | return ret; | |
339 | } | |
340 | ret = spi_find_chip_select(bus, cs, &dev); | |
341 | ||
342 | /* | |
343 | * If there is no such device, create one automatically. This means | |
344 | * that we don't need a device tree node or platform data for the | |
345 | * SPI flash chip - we will bind to the correct driver. | |
346 | */ | |
347 | if (ret == -ENODEV && drv_name) { | |
348 | debug("%s: Binding new device '%s', busnum=%d, cs=%d, driver=%s\n", | |
349 | __func__, dev_name, busnum, cs, drv_name); | |
6b18656a | 350 | ret = device_bind_driver(bus, drv_name, dev_name, &dev); |
28f98858 SG |
351 | if (ret) { |
352 | debug("%s: Unable to bind driver (ret=%d)\n", __func__, | |
353 | ret); | |
d7af6a48 | 354 | return ret; |
28f98858 | 355 | } |
d0cff03e SG |
356 | plat = dev_get_parent_platdata(dev); |
357 | plat->cs = cs; | |
12bfb2e0 SG |
358 | if (speed) { |
359 | plat->max_hz = speed; | |
360 | } else { | |
361 | printf("Warning: SPI speed fallback to %u kHz\n", | |
362 | SPI_DEFAULT_SPEED_HZ / 1000); | |
363 | plat->max_hz = SPI_DEFAULT_SPEED_HZ; | |
364 | } | |
d0cff03e | 365 | plat->mode = mode; |
d7af6a48 SG |
366 | created = true; |
367 | } else if (ret) { | |
368 | printf("Invalid chip select %d:%d (err=%d)\n", busnum, cs, | |
369 | ret); | |
370 | return ret; | |
371 | } | |
372 | ||
373 | if (!device_active(dev)) { | |
d0cff03e | 374 | struct spi_slave *slave; |
d7af6a48 | 375 | |
d0cff03e | 376 | ret = device_probe(dev); |
d7af6a48 SG |
377 | if (ret) |
378 | goto err; | |
bcbe3d15 | 379 | slave = dev_get_parent_priv(dev); |
d7af6a48 | 380 | slave->dev = dev; |
d7af6a48 SG |
381 | } |
382 | ||
f7dd5370 | 383 | slave = dev_get_parent_priv(dev); |
b0cc1b84 | 384 | |
f7dd5370 MW |
385 | /* |
386 | * In case the operation speed is not yet established by | |
387 | * dm_spi_claim_bus() ensure the bus is configured properly. | |
388 | */ | |
389 | if (!slave->speed) { | |
390 | ret = spi_claim_bus(slave); | |
391 | if (ret) | |
392 | goto err; | |
96907c0f | 393 | } |
d7af6a48 SG |
394 | |
395 | *busp = bus; | |
f7dd5370 | 396 | *devp = slave; |
d7af6a48 SG |
397 | debug("%s: bus=%p, slave=%p\n", __func__, bus, *devp); |
398 | ||
399 | return 0; | |
400 | ||
401 | err: | |
c8864d72 | 402 | debug("%s: Error path, created=%d, device '%s'\n", __func__, |
d0cff03e | 403 | created, dev->name); |
d7af6a48 | 404 | if (created) { |
706865af | 405 | device_remove(dev, DM_REMOVE_NORMAL); |
d7af6a48 SG |
406 | device_unbind(dev); |
407 | } | |
408 | ||
409 | return ret; | |
410 | } | |
411 | ||
d7af6a48 SG |
412 | /* Compatibility function - to be removed */ |
413 | struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs, | |
414 | unsigned int speed, unsigned int mode) | |
415 | { | |
416 | struct spi_slave *slave; | |
417 | struct udevice *dev; | |
418 | int ret; | |
419 | ||
420 | ret = spi_get_bus_and_cs(busnum, cs, speed, mode, NULL, 0, &dev, | |
279e26f5 | 421 | &slave); |
d7af6a48 SG |
422 | if (ret) |
423 | return NULL; | |
424 | ||
425 | return slave; | |
426 | } | |
427 | ||
428 | void spi_free_slave(struct spi_slave *slave) | |
429 | { | |
706865af | 430 | device_remove(slave->dev, DM_REMOVE_NORMAL); |
d7af6a48 SG |
431 | slave->dev = NULL; |
432 | } | |
433 | ||
279e26f5 | 434 | int spi_slave_ofdata_to_platdata(struct udevice *dev, |
d0cff03e | 435 | struct dm_spi_slave_platdata *plat) |
d7af6a48 | 436 | { |
08fe9c29 | 437 | int mode = 0; |
f8e2f92d | 438 | int value; |
d7af6a48 | 439 | |
279e26f5 | 440 | plat->cs = dev_read_u32_default(dev, "reg", -1); |
12bfb2e0 SG |
441 | plat->max_hz = dev_read_u32_default(dev, "spi-max-frequency", |
442 | SPI_DEFAULT_SPEED_HZ); | |
279e26f5 | 443 | if (dev_read_bool(dev, "spi-cpol")) |
d7af6a48 | 444 | mode |= SPI_CPOL; |
279e26f5 | 445 | if (dev_read_bool(dev, "spi-cpha")) |
d7af6a48 | 446 | mode |= SPI_CPHA; |
279e26f5 | 447 | if (dev_read_bool(dev, "spi-cs-high")) |
d7af6a48 | 448 | mode |= SPI_CS_HIGH; |
279e26f5 | 449 | if (dev_read_bool(dev, "spi-3wire")) |
379b49d8 | 450 | mode |= SPI_3WIRE; |
279e26f5 | 451 | if (dev_read_bool(dev, "spi-half-duplex")) |
d7af6a48 | 452 | mode |= SPI_PREAMBLE; |
f8e2f92d M |
453 | |
454 | /* Device DUAL/QUAD mode */ | |
279e26f5 | 455 | value = dev_read_u32_default(dev, "spi-tx-bus-width", 1); |
f8e2f92d M |
456 | switch (value) { |
457 | case 1: | |
458 | break; | |
459 | case 2: | |
460 | mode |= SPI_TX_DUAL; | |
461 | break; | |
462 | case 4: | |
463 | mode |= SPI_TX_QUAD; | |
464 | break; | |
658df8bd VR |
465 | case 8: |
466 | mode |= SPI_TX_OCTAL; | |
467 | break; | |
f8e2f92d | 468 | default: |
1b7c28f5 | 469 | warn_non_spl("spi-tx-bus-width %d not supported\n", value); |
f8e2f92d M |
470 | break; |
471 | } | |
472 | ||
279e26f5 | 473 | value = dev_read_u32_default(dev, "spi-rx-bus-width", 1); |
f8e2f92d M |
474 | switch (value) { |
475 | case 1: | |
476 | break; | |
477 | case 2: | |
08fe9c29 | 478 | mode |= SPI_RX_DUAL; |
f8e2f92d M |
479 | break; |
480 | case 4: | |
08fe9c29 | 481 | mode |= SPI_RX_QUAD; |
f8e2f92d | 482 | break; |
658df8bd VR |
483 | case 8: |
484 | mode |= SPI_RX_OCTAL; | |
485 | break; | |
f8e2f92d | 486 | default: |
1b7c28f5 | 487 | warn_non_spl("spi-rx-bus-width %d not supported\n", value); |
f8e2f92d M |
488 | break; |
489 | } | |
490 | ||
08fe9c29 | 491 | plat->mode = mode; |
f8e2f92d | 492 | |
d7af6a48 SG |
493 | return 0; |
494 | } | |
495 | ||
496 | UCLASS_DRIVER(spi) = { | |
497 | .id = UCLASS_SPI, | |
498 | .name = "spi", | |
9cc36a2b | 499 | .flags = DM_UC_FLAG_SEQ_ALIAS, |
280af011 | 500 | #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) |
91195485 | 501 | .post_bind = dm_scan_fdt_dev, |
71634f28 | 502 | #endif |
d7af6a48 | 503 | .post_probe = spi_post_probe, |
440714ee | 504 | .child_pre_probe = spi_child_pre_probe, |
41575d8e SG |
505 | .per_device_auto = sizeof(struct dm_spi_bus), |
506 | .per_child_auto = sizeof(struct spi_slave), | |
507 | .per_child_platdata_auto = | |
d0cff03e | 508 | sizeof(struct dm_spi_slave_platdata), |
71634f28 | 509 | #if !CONFIG_IS_ENABLED(OF_PLATDATA) |
d0cff03e | 510 | .child_post_bind = spi_child_post_bind, |
71634f28 | 511 | #endif |
d7af6a48 SG |
512 | }; |
513 | ||
514 | UCLASS_DRIVER(spi_generic) = { | |
515 | .id = UCLASS_SPI_GENERIC, | |
516 | .name = "spi_generic", | |
517 | }; | |
518 | ||
519 | U_BOOT_DRIVER(spi_generic_drv) = { | |
520 | .name = "spi_generic_drv", | |
521 | .id = UCLASS_SPI_GENERIC, | |
522 | }; |