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4d0732bf MV |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* | |
3 | * Renesas RZ/A1 R7S72100 OSTM Timer driver | |
4 | * | |
5 | * Copyright (C) 2019 Marek Vasut <[email protected]> | |
6 | */ | |
7 | ||
8 | #include <common.h> | |
336d4615 | 9 | #include <malloc.h> |
4d0732bf MV |
10 | #include <asm/io.h> |
11 | #include <dm.h> | |
12 | #include <clk.h> | |
13 | #include <timer.h> | |
cd93d625 | 14 | #include <linux/bitops.h> |
4d0732bf MV |
15 | |
16 | #define OSTM_CMP 0x00 | |
17 | #define OSTM_CNT 0x04 | |
18 | #define OSTM_TE 0x10 | |
19 | #define OSTM_TS 0x14 | |
20 | #define OSTM_TT 0x18 | |
21 | #define OSTM_CTL 0x20 | |
22 | #define OSTM_CTL_D BIT(1) | |
23 | ||
24 | DECLARE_GLOBAL_DATA_PTR; | |
25 | ||
26 | struct ostm_priv { | |
27 | fdt_addr_t regs; | |
28 | }; | |
29 | ||
8af7bb91 | 30 | static u64 ostm_get_count(struct udevice *dev) |
4d0732bf MV |
31 | { |
32 | struct ostm_priv *priv = dev_get_priv(dev); | |
33 | ||
8af7bb91 | 34 | return timer_conv_64(readl(priv->regs + OSTM_CNT)); |
4d0732bf MV |
35 | } |
36 | ||
37 | static int ostm_probe(struct udevice *dev) | |
38 | { | |
39 | struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); | |
40 | struct ostm_priv *priv = dev_get_priv(dev); | |
41 | #if CONFIG_IS_ENABLED(CLK) | |
42 | struct clk clk; | |
43 | int ret; | |
44 | ||
45 | ret = clk_get_by_index(dev, 0, &clk); | |
46 | if (ret) | |
47 | return ret; | |
48 | ||
49 | uc_priv->clock_rate = clk_get_rate(&clk); | |
50 | ||
51 | clk_free(&clk); | |
52 | #else | |
53 | uc_priv->clock_rate = CONFIG_SYS_CLK_FREQ / 2; | |
54 | #endif | |
55 | ||
56 | readb(priv->regs + OSTM_CTL); | |
57 | writeb(OSTM_CTL_D, priv->regs + OSTM_CTL); | |
58 | ||
59 | setbits_8(priv->regs + OSTM_TT, BIT(0)); | |
60 | writel(0xffffffff, priv->regs + OSTM_CMP); | |
61 | setbits_8(priv->regs + OSTM_TS, BIT(0)); | |
62 | ||
63 | return 0; | |
64 | } | |
65 | ||
66 | static int ostm_ofdata_to_platdata(struct udevice *dev) | |
67 | { | |
68 | struct ostm_priv *priv = dev_get_priv(dev); | |
69 | ||
70 | priv->regs = dev_read_addr(dev); | |
71 | ||
72 | return 0; | |
73 | } | |
74 | ||
75 | static const struct timer_ops ostm_ops = { | |
76 | .get_count = ostm_get_count, | |
77 | }; | |
78 | ||
79 | static const struct udevice_id ostm_ids[] = { | |
80 | { .compatible = "renesas,ostm" }, | |
81 | {} | |
82 | }; | |
83 | ||
84 | U_BOOT_DRIVER(ostm_timer) = { | |
85 | .name = "ostm-timer", | |
86 | .id = UCLASS_TIMER, | |
87 | .ops = &ostm_ops, | |
88 | .probe = ostm_probe, | |
89 | .of_match = ostm_ids, | |
90 | .ofdata_to_platdata = ostm_ofdata_to_platdata, | |
41575d8e | 91 | .priv_auto = sizeof(struct ostm_priv), |
4d0732bf | 92 | }; |