[u-boot.git] / drivers / pinctrl / mscc / pinctrl-servalt.c

// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * Microsemi SoCs pinctrl driver
 *
 * Author: <[email protected]>
 * Copyright (c) 2019 Microsemi Corporation
 */

#include <common.h>
#include <config.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dm/pinctrl.h>
#include <dm/root.h>
#include <errno.h>
#include <fdtdec.h>
#include <linux/io.h>
#include <asm/gpio.h>
#include <asm/system.h>
#include "mscc-common.h"

enum {
	FUNC_NONE,
	FUNC_GPIO,
	FUNC_IRQ0_IN,
	FUNC_IRQ0_OUT,
	FUNC_IRQ1_IN,
	FUNC_IRQ1_OUT,
	FUNC_MIIM1,
	FUNC_MIIM2,
	FUNC_PCI_WAKE,
	FUNC_PTP0,
	FUNC_PTP1,
	FUNC_PTP2,
	FUNC_PTP3,
	FUNC_PWM,
	FUNC_RCVRD_CLK0,
	FUNC_RCVRD_CLK1,
	FUNC_RCVRD_CLK2,
	FUNC_RCVRD_CLK3,
	FUNC_REF_CLK0,
	FUNC_REF_CLK1,
	FUNC_REF_CLK2,
	FUNC_REF_CLK3,
	FUNC_SFP0,
	FUNC_SFP1,
	FUNC_SFP2,
	FUNC_SFP3,
	FUNC_SFP4,
	FUNC_SFP5,
	FUNC_SFP6,
	FUNC_SFP7,
	FUNC_SFP8,
	FUNC_SFP9,
	FUNC_SFP10,
	FUNC_SFP11,
	FUNC_SFP12,
	FUNC_SFP13,
	FUNC_SFP14,
	FUNC_SFP15,
	FUNC_SIO,
	FUNC_SPI,
	FUNC_TACHO,
	FUNC_TWI,
	FUNC_TWI2,
	FUNC_TWI_SCL_M,
	FUNC_UART,
	FUNC_UART2,
	FUNC_MAX
};

static char * const servalt_function_names[] = {
	[FUNC_NONE]		= "none",
	[FUNC_GPIO]		= "gpio",
	[FUNC_IRQ0_IN]		= "irq0_in",
	[FUNC_IRQ0_OUT]		= "irq0_out",
	[FUNC_IRQ1_IN]		= "irq1_in",
	[FUNC_IRQ1_OUT]		= "irq1_out",
	[FUNC_MIIM1]		= "miim1",
	[FUNC_MIIM2]		= "miim2",
	[FUNC_PCI_WAKE]		= "pci_wake",
	[FUNC_PTP0]		= "ptp0",
	[FUNC_PTP1]		= "ptp1",
	[FUNC_PTP2]		= "ptp2",
	[FUNC_PTP3]		= "ptp3",
	[FUNC_PWM]		= "pwm",
	[FUNC_RCVRD_CLK0]	= "rcvrd_clk0",
	[FUNC_RCVRD_CLK1]	= "rcvrd_clk1",
	[FUNC_RCVRD_CLK2]	= "rcvrd_clk2",
	[FUNC_RCVRD_CLK3]	= "rcvrd_clk3",
	[FUNC_REF_CLK0]		= "ref_clk0",
	[FUNC_REF_CLK1]		= "ref_clk1",
	[FUNC_REF_CLK2]		= "ref_clk2",
	[FUNC_REF_CLK3]		= "ref_clk3",
	[FUNC_SFP0]		= "sfp0",
	[FUNC_SFP1]		= "sfp1",
	[FUNC_SFP2]		= "sfp2",
	[FUNC_SFP3]		= "sfp3",
	[FUNC_SFP4]		= "sfp4",
	[FUNC_SFP5]		= "sfp5",
	[FUNC_SFP6]		= "sfp6",
	[FUNC_SFP7]		= "sfp7",
	[FUNC_SFP8]		= "sfp8",
	[FUNC_SFP9]		= "sfp9",
	[FUNC_SFP10]		= "sfp10",
	[FUNC_SFP11]		= "sfp11",
	[FUNC_SFP12]		= "sfp12",
	[FUNC_SFP13]		= "sfp13",
	[FUNC_SFP14]		= "sfp14",
	[FUNC_SFP15]		= "sfp15",
	[FUNC_SIO]		= "sio",
	[FUNC_SPI]		= "spi",
	[FUNC_TACHO]		= "tacho",
	[FUNC_TWI]		= "twi",
	[FUNC_TWI2]		= "twi2",
	[FUNC_TWI_SCL_M]	= "twi_scl_m",
	[FUNC_UART]		= "uart",
	[FUNC_UART2]		= "uart2",
};

MSCC_P(0,  SIO,        NONE,      NONE);
MSCC_P(1,  SIO,        NONE,      NONE);
MSCC_P(2,  SIO,        NONE,      NONE);
MSCC_P(3,  SIO,        NONE,      NONE);
MSCC_P(4,  IRQ0_IN,    IRQ0_OUT,  TWI_SCL_M);
MSCC_P(5,  IRQ1_IN,    IRQ1_OUT,  TWI_SCL_M);
MSCC_P(6,  UART,       NONE,      NONE);
MSCC_P(7,  UART,       NONE,      NONE);
MSCC_P(8,  SPI,        SFP0,      TWI_SCL_M);
MSCC_P(9,  PCI_WAKE,   SFP1,      SPI);
MSCC_P(10, PTP0,       SFP2,      TWI_SCL_M);
MSCC_P(11, PTP1,       SFP3,      TWI_SCL_M);
MSCC_P(12, REF_CLK0,   SFP4,      TWI_SCL_M);
MSCC_P(13, REF_CLK1,   SFP5,      TWI_SCL_M);
MSCC_P(14, REF_CLK2,   IRQ0_OUT,  SPI);
MSCC_P(15, REF_CLK3,   IRQ1_OUT,  SPI);
MSCC_P(16, TACHO,      SFP6,      SPI);
MSCC_P(17, PWM,        NONE,      TWI_SCL_M);
MSCC_P(18, PTP2,       SFP7,      SPI);
MSCC_P(19, PTP3,       SFP8,      SPI);
MSCC_P(20, UART2,      SFP9,      SPI);
MSCC_P(21, UART2,      NONE,      NONE);
MSCC_P(22, MIIM1,      SFP10,     TWI2);
MSCC_P(23, MIIM1,      SFP11,     TWI2);
MSCC_P(24, TWI,        NONE,      NONE);
MSCC_P(25, TWI,        SFP12,     TWI_SCL_M);
MSCC_P(26, TWI_SCL_M,  SFP13,     SPI);
MSCC_P(27, TWI_SCL_M,  SFP14,     SPI);
MSCC_P(28, TWI_SCL_M,  SFP15,     SPI);
MSCC_P(29, TWI_SCL_M,  NONE,      NONE);
MSCC_P(30, TWI_SCL_M,  NONE,      NONE);
MSCC_P(31, TWI_SCL_M,  NONE,      NONE);
MSCC_P(32, TWI_SCL_M,  NONE,      NONE);
MSCC_P(33, RCVRD_CLK0, NONE,      NONE);
MSCC_P(34, RCVRD_CLK1, NONE,      NONE);
MSCC_P(35, RCVRD_CLK2, NONE,      NONE);
MSCC_P(36, RCVRD_CLK3, NONE,      NONE);

#define SERVALT_PIN(n) {					\
	.name = "GPIO_"#n,					\
	.drv_data = &mscc_pin_##n				\
}

static const struct mscc_pin_data servalt_pins[] = {
	SERVALT_PIN(0),
	SERVALT_PIN(1),
	SERVALT_PIN(2),
	SERVALT_PIN(3),
	SERVALT_PIN(4),
	SERVALT_PIN(5),
	SERVALT_PIN(6),
	SERVALT_PIN(7),
	SERVALT_PIN(8),
	SERVALT_PIN(9),
	SERVALT_PIN(10),
	SERVALT_PIN(11),
	SERVALT_PIN(12),
	SERVALT_PIN(13),
	SERVALT_PIN(14),
	SERVALT_PIN(15),
	SERVALT_PIN(16),
	SERVALT_PIN(17),
	SERVALT_PIN(18),
	SERVALT_PIN(19),
	SERVALT_PIN(20),
	SERVALT_PIN(21),
	SERVALT_PIN(22),
	SERVALT_PIN(23),
	SERVALT_PIN(24),
	SERVALT_PIN(25),
	SERVALT_PIN(26),
	SERVALT_PIN(27),
	SERVALT_PIN(28),
	SERVALT_PIN(29),
	SERVALT_PIN(30),
	SERVALT_PIN(31),
	SERVALT_PIN(32),
	SERVALT_PIN(33),
	SERVALT_PIN(34),
	SERVALT_PIN(35),
	SERVALT_PIN(36),
};

static const unsigned long servalt_gpios[] = {
	[MSCC_GPIO_OUT_SET] = 0x00,
	[MSCC_GPIO_OUT_CLR] = 0x08,
	[MSCC_GPIO_OUT] = 0x10,
	[MSCC_GPIO_IN] = 0x18,
	[MSCC_GPIO_OE] = 0x20,
	[MSCC_GPIO_INTR] = 0x28,
	[MSCC_GPIO_INTR_ENA] = 0x30,
	[MSCC_GPIO_INTR_IDENT] = 0x38,
	[MSCC_GPIO_ALT0] = 0x40,
	[MSCC_GPIO_ALT1] = 0x48,
};

static int servalt_gpio_probe(struct udevice *dev)
{
	struct gpio_dev_priv *uc_priv;

	uc_priv = dev_get_uclass_priv(dev);
	uc_priv->bank_name = "servalt-gpio";
	uc_priv->gpio_count = ARRAY_SIZE(servalt_pins);

	return 0;
}

static struct driver servalt_gpio_driver = {
	.name	= "servalt-gpio",
	.id	= UCLASS_GPIO,
	.probe	= servalt_gpio_probe,
	.ops	= &mscc_gpio_ops,
};

static int servalt_pinctrl_probe(struct udevice *dev)
{
	int ret;

	ret = mscc_pinctrl_probe(dev, FUNC_MAX, servalt_pins,
				 ARRAY_SIZE(servalt_pins),
				 servalt_function_names,
				 servalt_gpios);

	if (ret)
		return ret;

	ret = device_bind(dev, &servalt_gpio_driver, "servalt-gpio", NULL,
			  dev_ofnode(dev), NULL);

	if (ret)
		return ret;

	return 0;
}

static const struct udevice_id servalt_pinctrl_of_match[] = {
	{ .compatible = "mscc,servalt-pinctrl" },
	{},
};

U_BOOT_DRIVER(servalt_pinctrl) = {
	.name = "servalt-pinctrl",
	.id = UCLASS_PINCTRL,
	.of_match = of_match_ptr(servalt_pinctrl_of_match),
	.probe = servalt_pinctrl_probe,
	.priv_auto	= sizeof(struct mscc_pinctrl),
	.ops = &mscc_pinctrl_ops,
};
Commit	Line	Data
177c07f8 HV	1	// SPDX-License-Identifier: (GPL-2.0 OR MIT)
	2	/*
	3	* Microsemi SoCs pinctrl driver
	4	*
	5	* Author: <[email protected]>
	6	* Copyright (c) 2019 Microsemi Corporation
	7	*/
	8
	9	#include <common.h>
	10	#include <config.h>
	11	#include <dm.h>
	12	#include <dm/device-internal.h>
	13	#include <dm/lists.h>
	14	#include <dm/pinctrl.h>
	15	#include <dm/root.h>
	16	#include <errno.h>
	17	#include <fdtdec.h>
	18	#include <linux/io.h>
	19	#include <asm/gpio.h>
	20	#include <asm/system.h>
	21	#include "mscc-common.h"
	22
	23	enum {
	24	FUNC_NONE,
	25	FUNC_GPIO,
	26	FUNC_IRQ0_IN,
	27	FUNC_IRQ0_OUT,
	28	FUNC_IRQ1_IN,
	29	FUNC_IRQ1_OUT,
	30	FUNC_MIIM1,
	31	FUNC_MIIM2,
	32	FUNC_PCI_WAKE,
	33	FUNC_PTP0,
	34	FUNC_PTP1,
	35	FUNC_PTP2,
	36	FUNC_PTP3,
	37	FUNC_PWM,
	38	FUNC_RCVRD_CLK0,
	39	FUNC_RCVRD_CLK1,
	40	FUNC_RCVRD_CLK2,
	41	FUNC_RCVRD_CLK3,
	42	FUNC_REF_CLK0,
	43	FUNC_REF_CLK1,
	44	FUNC_REF_CLK2,
	45	FUNC_REF_CLK3,
	46	FUNC_SFP0,
	47	FUNC_SFP1,
	48	FUNC_SFP2,
	49	FUNC_SFP3,
	50	FUNC_SFP4,
	51	FUNC_SFP5,
	52	FUNC_SFP6,
	53	FUNC_SFP7,
	54	FUNC_SFP8,
	55	FUNC_SFP9,
	56	FUNC_SFP10,
	57	FUNC_SFP11,
	58	FUNC_SFP12,
	59	FUNC_SFP13,
	60	FUNC_SFP14,
	61	FUNC_SFP15,
	62	FUNC_SIO,
	63	FUNC_SPI,
	64	FUNC_TACHO,
65	FUNC_TWI,
66	FUNC_TWI2,
67	FUNC_TWI_SCL_M,
68	FUNC_UART,
69	FUNC_UART2,
70	FUNC_MAX
71	};
72
73	static char * const servalt_function_names[] = {
74	[FUNC_NONE] = "none",
75	[FUNC_GPIO] = "gpio",
76	[FUNC_IRQ0_IN] = "irq0_in",
77	[FUNC_IRQ0_OUT] = "irq0_out",
78	[FUNC_IRQ1_IN] = "irq1_in",
79	[FUNC_IRQ1_OUT] = "irq1_out",
80	[FUNC_MIIM1] = "miim1",
81	[FUNC_MIIM2] = "miim2",
82	[FUNC_PCI_WAKE] = "pci_wake",
83	[FUNC_PTP0] = "ptp0",
84	[FUNC_PTP1] = "ptp1",
85	[FUNC_PTP2] = "ptp2",
86	[FUNC_PTP3] = "ptp3",
87	[FUNC_PWM] = "pwm",
88	[FUNC_RCVRD_CLK0] = "rcvrd_clk0",
89	[FUNC_RCVRD_CLK1] = "rcvrd_clk1",
90	[FUNC_RCVRD_CLK2] = "rcvrd_clk2",
91	[FUNC_RCVRD_CLK3] = "rcvrd_clk3",
92	[FUNC_REF_CLK0] = "ref_clk0",
93	[FUNC_REF_CLK1] = "ref_clk1",
94	[FUNC_REF_CLK2] = "ref_clk2",
95	[FUNC_REF_CLK3] = "ref_clk3",
96	[FUNC_SFP0] = "sfp0",
97	[FUNC_SFP1] = "sfp1",
98	[FUNC_SFP2] = "sfp2",
99	[FUNC_SFP3] = "sfp3",
100	[FUNC_SFP4] = "sfp4",
101	[FUNC_SFP5] = "sfp5",
102	[FUNC_SFP6] = "sfp6",
103	[FUNC_SFP7] = "sfp7",
104	[FUNC_SFP8] = "sfp8",
105	[FUNC_SFP9] = "sfp9",
106	[FUNC_SFP10] = "sfp10",
107	[FUNC_SFP11] = "sfp11",
108	[FUNC_SFP12] = "sfp12",
109	[FUNC_SFP13] = "sfp13",
110	[FUNC_SFP14] = "sfp14",
111	[FUNC_SFP15] = "sfp15",
112	[FUNC_SIO] = "sio",
113	[FUNC_SPI] = "spi",
114	[FUNC_TACHO] = "tacho",
115	[FUNC_TWI] = "twi",
116	[FUNC_TWI2] = "twi2",
117	[FUNC_TWI_SCL_M] = "twi_scl_m",
118	[FUNC_UART] = "uart",
119	[FUNC_UART2] = "uart2",
120	};
121
122	MSCC_P(0, SIO, NONE, NONE);
123	MSCC_P(1, SIO, NONE, NONE);
124	MSCC_P(2, SIO, NONE, NONE);
125	MSCC_P(3, SIO, NONE, NONE);
126	MSCC_P(4, IRQ0_IN, IRQ0_OUT, TWI_SCL_M);
127	MSCC_P(5, IRQ1_IN, IRQ1_OUT, TWI_SCL_M);
128	MSCC_P(6, UART, NONE, NONE);
129	MSCC_P(7, UART, NONE, NONE);
130	MSCC_P(8, SPI, SFP0, TWI_SCL_M);
131	MSCC_P(9, PCI_WAKE, SFP1, SPI);
132	MSCC_P(10, PTP0, SFP2, TWI_SCL_M);
133	MSCC_P(11, PTP1, SFP3, TWI_SCL_M);
134	MSCC_P(12, REF_CLK0, SFP4, TWI_SCL_M);
135	MSCC_P(13, REF_CLK1, SFP5, TWI_SCL_M);
136	MSCC_P(14, REF_CLK2, IRQ0_OUT, SPI);
137	MSCC_P(15, REF_CLK3, IRQ1_OUT, SPI);
138	MSCC_P(16, TACHO, SFP6, SPI);
139	MSCC_P(17, PWM, NONE, TWI_SCL_M);
140	MSCC_P(18, PTP2, SFP7, SPI);
141	MSCC_P(19, PTP3, SFP8, SPI);
142	MSCC_P(20, UART2, SFP9, SPI);
143	MSCC_P(21, UART2, NONE, NONE);
144	MSCC_P(22, MIIM1, SFP10, TWI2);
145	MSCC_P(23, MIIM1, SFP11, TWI2);
146	MSCC_P(24, TWI, NONE, NONE);
147	MSCC_P(25, TWI, SFP12, TWI_SCL_M);
148	MSCC_P(26, TWI_SCL_M, SFP13, SPI);
149	MSCC_P(27, TWI_SCL_M, SFP14, SPI);
150	MSCC_P(28, TWI_SCL_M, SFP15, SPI);
151	MSCC_P(29, TWI_SCL_M, NONE, NONE);
152	MSCC_P(30, TWI_SCL_M, NONE, NONE);
153	MSCC_P(31, TWI_SCL_M, NONE, NONE);
154	MSCC_P(32, TWI_SCL_M, NONE, NONE);
155	MSCC_P(33, RCVRD_CLK0, NONE, NONE);
156	MSCC_P(34, RCVRD_CLK1, NONE, NONE);
157	MSCC_P(35, RCVRD_CLK2, NONE, NONE);
158	MSCC_P(36, RCVRD_CLK3, NONE, NONE);
159
160	#define SERVALT_PIN(n) { \
161	.name = "GPIO_"#n, \
162	.drv_data = &mscc_pin_##n \
163	}
164
165	static const struct mscc_pin_data servalt_pins[] = {
166	SERVALT_PIN(0),
167	SERVALT_PIN(1),
168	SERVALT_PIN(2),
169	SERVALT_PIN(3),
170	SERVALT_PIN(4),
171	SERVALT_PIN(5),
172	SERVALT_PIN(6),
173	SERVALT_PIN(7),
174	SERVALT_PIN(8),
175	SERVALT_PIN(9),
176	SERVALT_PIN(10),
177	SERVALT_PIN(11),
178	SERVALT_PIN(12),
179	SERVALT_PIN(13),
180	SERVALT_PIN(14),
181	SERVALT_PIN(15),
182	SERVALT_PIN(16),
183	SERVALT_PIN(17),
184	SERVALT_PIN(18),
185	SERVALT_PIN(19),
186	SERVALT_PIN(20),
187	SERVALT_PIN(21),
188	SERVALT_PIN(22),
189	SERVALT_PIN(23),
190	SERVALT_PIN(24),
191	SERVALT_PIN(25),
192	SERVALT_PIN(26),
193	SERVALT_PIN(27),
194	SERVALT_PIN(28),
195	SERVALT_PIN(29),
196	SERVALT_PIN(30),
197	SERVALT_PIN(31),
198	SERVALT_PIN(32),
199	SERVALT_PIN(33),
200	SERVALT_PIN(34),
201	SERVALT_PIN(35),
202	SERVALT_PIN(36),
203	};
204
205	static const unsigned long servalt_gpios[] = {
206	[MSCC_GPIO_OUT_SET] = 0x00,
207	[MSCC_GPIO_OUT_CLR] = 0x08,
208	[MSCC_GPIO_OUT] = 0x10,
209	[MSCC_GPIO_IN] = 0x18,
210	[MSCC_GPIO_OE] = 0x20,
211	[MSCC_GPIO_INTR] = 0x28,
212	[MSCC_GPIO_INTR_ENA] = 0x30,
213	[MSCC_GPIO_INTR_IDENT] = 0x38,
214	[MSCC_GPIO_ALT0] = 0x40,
215	[MSCC_GPIO_ALT1] = 0x48,
216	};
217
218	static int servalt_gpio_probe(struct udevice *dev)
219	{
220	struct gpio_dev_priv *uc_priv;
221
222	uc_priv = dev_get_uclass_priv(dev);
223	uc_priv->bank_name = "servalt-gpio";
224	uc_priv->gpio_count = ARRAY_SIZE(servalt_pins);
225
226	return 0;
227	}
228
229	static struct driver servalt_gpio_driver = {
230	.name = "servalt-gpio",
231	.id = UCLASS_GPIO,
232	.probe = servalt_gpio_probe,
233	.ops = &mscc_gpio_ops,
234	};
235
236	static int servalt_pinctrl_probe(struct udevice *dev)
237	{
238	int ret;
239
240	ret = mscc_pinctrl_probe(dev, FUNC_MAX, servalt_pins,
241	ARRAY_SIZE(servalt_pins),
242	servalt_function_names,
243	servalt_gpios);
244
245	if (ret)
246	return ret;
247
a2703ce1 SG	248	ret = device_bind(dev, &servalt_gpio_driver, "servalt-gpio", NULL,
a2703ce1 SG	249	dev_ofnode(dev), NULL);
177c07f8 HV	250
	251	if (ret)
	252	return ret;
	253
	254	return 0;
	255	}
	256
	257	static const struct udevice_id servalt_pinctrl_of_match[] = {
	258	{ .compatible = "mscc,servalt-pinctrl" },
	259	{},
	260	};
	261
	262	U_BOOT_DRIVER(servalt_pinctrl) = {
	263	.name = "servalt-pinctrl",
	264	.id = UCLASS_PINCTRL,
	265	.of_match = of_match_ptr(servalt_pinctrl_of_match),
	266	.probe = servalt_pinctrl_probe,
41575d8e	267	.priv_auto = sizeof(struct mscc_pinctrl),
177c07f8 HV	268	.ops = &mscc_pinctrl_ops,
177c07f8 HV	269	};