[u-boot.git] / drivers / gpio / altera_pio.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2015  Thomas Chou <[email protected]>
 * Copyright (C) 2011  Missing Link Electronics
 *                     Joachim Foerster <[email protected]>
 */
#include <common.h>
#include <dm.h>
#include <errno.h>
#include <malloc.h>
#include <fdtdec.h>
#include <asm/io.h>
#include <asm/gpio.h>

DECLARE_GLOBAL_DATA_PTR;

struct altera_pio_regs {
	u32	data;			/* Data register */
	u32	direction;		/* Direction register */
};

struct altera_pio_platdata {
	struct altera_pio_regs *regs;
	int gpio_count;
	const char *bank_name;
};

static int altera_pio_direction_input(struct udevice *dev, unsigned pin)
{
	struct altera_pio_platdata *plat = dev_get_platdata(dev);
	struct altera_pio_regs *const regs = plat->regs;

	clrbits_le32(&regs->direction, 1 << pin);

	return 0;
}

static int altera_pio_direction_output(struct udevice *dev, unsigned pin,
				     int val)
{
	struct altera_pio_platdata *plat = dev_get_platdata(dev);
	struct altera_pio_regs *const regs = plat->regs;

	if (val)
		setbits_le32(&regs->data, 1 << pin);
	else
		clrbits_le32(&regs->data, 1 << pin);
	/* change the data first, then the direction. to avoid glitch */
	setbits_le32(&regs->direction, 1 << pin);

	return 0;
}

static int altera_pio_get_value(struct udevice *dev, unsigned pin)
{
	struct altera_pio_platdata *plat = dev_get_platdata(dev);
	struct altera_pio_regs *const regs = plat->regs;

	return !!(readl(&regs->data) & (1 << pin));
}


static int altera_pio_set_value(struct udevice *dev, unsigned pin, int val)
{
	struct altera_pio_platdata *plat = dev_get_platdata(dev);
	struct altera_pio_regs *const regs = plat->regs;

	if (val)
		setbits_le32(&regs->data, 1 << pin);
	else
		clrbits_le32(&regs->data, 1 << pin);

	return 0;
}

static int altera_pio_probe(struct udevice *dev)
{
	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
	struct altera_pio_platdata *plat = dev_get_platdata(dev);

	uc_priv->gpio_count = plat->gpio_count;
	uc_priv->bank_name = plat->bank_name;

	return 0;
}

static int altera_pio_ofdata_to_platdata(struct udevice *dev)
{
	struct altera_pio_platdata *plat = dev_get_platdata(dev);

	plat->regs = map_physmem(dev_read_addr(dev),
				 sizeof(struct altera_pio_regs),
				 MAP_NOCACHE);
	plat->gpio_count = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
		"altr,gpio-bank-width", 32);
	plat->bank_name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
		"gpio-bank-name", NULL);

	return 0;
}

static const struct dm_gpio_ops altera_pio_ops = {
	.direction_input	= altera_pio_direction_input,
	.direction_output	= altera_pio_direction_output,
	.get_value		= altera_pio_get_value,
	.set_value		= altera_pio_set_value,
};

static const struct udevice_id altera_pio_ids[] = {
	{ .compatible = "altr,pio-1.0" },
	{ }
};

U_BOOT_DRIVER(altera_pio) = {
	.name		= "altera_pio",
	.id		= UCLASS_GPIO,
	.of_match	= altera_pio_ids,
	.ops		= &altera_pio_ops,
	.ofdata_to_platdata = altera_pio_ofdata_to_platdata,
	.platdata_auto	= sizeof(struct altera_pio_platdata),
	.probe		= altera_pio_probe,
};
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
03d67e12	2	/*
88d5ecf4	3	* Copyright (C) 2015 Thomas Chou <[email protected]>
03d67e12 JF	4	* Copyright (C) 2011 Missing Link Electronics
03d67e12 JF	5	* Joachim Foerster <[email protected]>
03d67e12 JF	6	*/
03d67e12 JF	7	#include <common.h>
88d5ecf4 TC	8	#include <dm.h>
	9	#include <errno.h>
	10	#include <malloc.h>
	11	#include <fdtdec.h>
03d67e12 JF	12	#include <asm/io.h>
	13	#include <asm/gpio.h>
	14
88d5ecf4	15	DECLARE_GLOBAL_DATA_PTR;
03d67e12	16
88d5ecf4 TC	17	struct altera_pio_regs {
	18	u32 data; /* Data register */
	19	u32 direction; /* Direction register */
	20	};
03d67e12	21
88d5ecf4 TC	22	struct altera_pio_platdata {
	23	struct altera_pio_regs *regs;
	24	int gpio_count;
	25	const char *bank_name;
	26	};
03d67e12	27
88d5ecf4	28	static int altera_pio_direction_input(struct udevice *dev, unsigned pin)
03d67e12	29	{
88d5ecf4 TC	30	struct altera_pio_platdata *plat = dev_get_platdata(dev);
88d5ecf4 TC	31	struct altera_pio_regs *const regs = plat->regs;
03d67e12	32
88d5ecf4	33	clrbits_le32(&regs->direction, 1 << pin);
03d67e12	34
88d5ecf4	35	return 0;
03d67e12 JF	36	}
03d67e12 JF	37
88d5ecf4 TC	38	static int altera_pio_direction_output(struct udevice *dev, unsigned pin,
88d5ecf4 TC	39	int val)
03d67e12	40	{
88d5ecf4 TC	41	struct altera_pio_platdata *plat = dev_get_platdata(dev);
88d5ecf4 TC	42	struct altera_pio_regs *const regs = plat->regs;
03d67e12	43
88d5ecf4 TC	44	if (val)
	45	setbits_le32(&regs->data, 1 << pin);
	46	else
	47	clrbits_le32(&regs->data, 1 << pin);
	48	/* change the data first, then the direction. to avoid glitch */
	49	setbits_le32(&regs->direction, 1 << pin);
03d67e12	50
88d5ecf4	51	return 0;
03d67e12 JF	52	}
03d67e12 JF	53
88d5ecf4	54	static int altera_pio_get_value(struct udevice *dev, unsigned pin)
03d67e12	55	{
88d5ecf4 TC	56	struct altera_pio_platdata *plat = dev_get_platdata(dev);
88d5ecf4 TC	57	struct altera_pio_regs *const regs = plat->regs;
03d67e12	58
97b26275	59	return !!(readl(&regs->data) & (1 << pin));
03d67e12 JF	60	}
	61
	62
88d5ecf4	63	static int altera_pio_set_value(struct udevice *dev, unsigned pin, int val)
03d67e12	64	{
88d5ecf4 TC	65	struct altera_pio_platdata *plat = dev_get_platdata(dev);
88d5ecf4 TC	66	struct altera_pio_regs *const regs = plat->regs;
03d67e12	67
88d5ecf4 TC	68	if (val)
	69	setbits_le32(&regs->data, 1 << pin);
	70	else
	71	clrbits_le32(&regs->data, 1 << pin);
03d67e12	72
03d67e12 JF	73	return 0;
	74	}
	75
88d5ecf4	76	static int altera_pio_probe(struct udevice *dev)
03d67e12	77	{
88d5ecf4 TC	78	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
88d5ecf4 TC	79	struct altera_pio_platdata *plat = dev_get_platdata(dev);
03d67e12	80
88d5ecf4 TC	81	uc_priv->gpio_count = plat->gpio_count;
88d5ecf4 TC	82	uc_priv->bank_name = plat->bank_name;
03d67e12	83
03d67e12 JF	84	return 0;
	85	}
	86
88d5ecf4	87	static int altera_pio_ofdata_to_platdata(struct udevice *dev)
03d67e12	88	{
88d5ecf4	89	struct altera_pio_platdata *plat = dev_get_platdata(dev);
03d67e12	90
2548493a	91	plat->regs = map_physmem(dev_read_addr(dev),
079bfc5d TC	92	sizeof(struct altera_pio_regs),
079bfc5d TC	93	MAP_NOCACHE);
e160f7d4	94	plat->gpio_count = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
88d5ecf4	95	"altr,gpio-bank-width", 32);
e160f7d4	96	plat->bank_name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
88d5ecf4	97	"gpio-bank-name", NULL);
03d67e12	98
03d67e12 JF	99	return 0;
	100	}
	101
88d5ecf4 TC	102	static const struct dm_gpio_ops altera_pio_ops = {
	103	.direction_input = altera_pio_direction_input,
	104	.direction_output = altera_pio_direction_output,
	105	.get_value = altera_pio_get_value,
	106	.set_value = altera_pio_set_value,
	107	};
	108
	109	static const struct udevice_id altera_pio_ids[] = {
	110	{ .compatible = "altr,pio-1.0" },
	111	{ }
	112	};
	113
	114	U_BOOT_DRIVER(altera_pio) = {
	115	.name = "altera_pio",
	116	.id = UCLASS_GPIO,
	117	.of_match = altera_pio_ids,
	118	.ops = &altera_pio_ops,
	119	.ofdata_to_platdata = altera_pio_ofdata_to_platdata,
41575d8e	120	.platdata_auto = sizeof(struct altera_pio_platdata),
88d5ecf4 TC	121	.probe = altera_pio_probe,
88d5ecf4 TC	122	};