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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
550e3756 TU |
2 | /* |
3 | * Maintainer : | |
4 | * Tapani Utriainen <[email protected]> | |
550e3756 TU |
5 | */ |
6 | #include <common.h> | |
52f24238 | 7 | #include <bootstage.h> |
691d719d | 8 | #include <init.h> |
336d4615 | 9 | #include <malloc.h> |
550e3756 TU |
10 | #include <netdev.h> |
11 | #include <twl4030.h> | |
401d1c4f | 12 | #include <asm/global_data.h> |
550e3756 TU |
13 | #include <asm/io.h> |
14 | #include <asm/arch/mmc_host_def.h> | |
15 | #include <asm/arch/mem.h> | |
16 | #include <asm/arch/mux.h> | |
17 | #include <asm/arch/sys_proto.h> | |
18 | #include <asm/arch/gpio.h> | |
19 | #include <asm/gpio.h> | |
20 | #include <asm/mach-types.h> | |
21 | ||
22 | #include <usb.h> | |
23 | #include <asm/ehci-omap.h> | |
24 | ||
25 | #include "tao3530.h" | |
26 | ||
27 | DECLARE_GLOBAL_DATA_PTR; | |
28 | ||
29 | int tao3530_revision(void) | |
30 | { | |
31 | int ret = 0; | |
32 | ||
33 | /* char *label argument is unused in gpio_request() */ | |
34 | ret = gpio_request(65, ""); | |
35 | if (ret) { | |
36 | puts("Error: GPIO 65 not available\n"); | |
37 | goto out; | |
38 | } | |
39 | MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M4)); | |
40 | ||
41 | ret = gpio_request(1, ""); | |
42 | if (ret) { | |
43 | puts("Error: GPIO 1 not available\n"); | |
44 | goto out2; | |
45 | } | |
46 | MUX_VAL(CP(SYS_CLKREQ), (IEN | PTU | EN | M4)); | |
47 | ||
48 | ret = gpio_direction_input(65); | |
49 | if (ret) { | |
50 | puts("Error: GPIO 65 not available for input\n"); | |
51 | goto out3; | |
52 | } | |
53 | ||
54 | ret = gpio_direction_input(1); | |
55 | if (ret) { | |
56 | puts("Error: GPIO 1 not available for input\n"); | |
57 | goto out3; | |
58 | } | |
59 | ||
60 | ret = gpio_get_value(65) << 1 | gpio_get_value(1); | |
61 | ||
62 | out3: | |
63 | MUX_VAL(CP(SYS_CLKREQ), (IEN | PTU | EN | M0)); | |
64 | gpio_free(1); | |
65 | out2: | |
66 | MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)); | |
67 | gpio_free(65); | |
68 | out: | |
69 | ||
70 | return ret; | |
71 | } | |
72 | ||
a9f52490 SR |
73 | #ifdef CONFIG_SPL_BUILD |
74 | /* | |
75 | * Routine: get_board_mem_timings | |
76 | * Description: If we use SPL then there is no x-loader nor config header | |
77 | * so we have to setup the DDR timings ourself on both banks. | |
78 | */ | |
79 | void get_board_mem_timings(struct board_sdrc_timings *timings) | |
80 | { | |
8f0cbd62 SR |
81 | #if defined(CONFIG_SYS_BOARD_OMAP3_HA) |
82 | /* | |
83 | * Switch baseboard LED to red upon power-on | |
84 | */ | |
85 | MUX_OMAP3_HA(); | |
86 | ||
87 | /* Request a gpio before using it */ | |
88 | gpio_request(111, ""); | |
89 | /* Sets the gpio as output and its value to 1, switch LED to red */ | |
90 | gpio_direction_output(111, 1); | |
91 | #endif | |
92 | ||
a9f52490 SR |
93 | if (tao3530_revision() < 3) { |
94 | /* 256MB / Bank */ | |
95 | timings->mcfg = MCFG(256 << 20, 14); /* RAS-width 14 */ | |
96 | timings->ctrla = HYNIX_V_ACTIMA_165; | |
97 | timings->ctrlb = HYNIX_V_ACTIMB_165; | |
98 | } else { | |
99 | /* 128MB / Bank */ | |
100 | timings->mcfg = MCFG(128 << 20, 13); /* RAS-width 13 */ | |
101 | timings->ctrla = MICRON_V_ACTIMA_165; | |
102 | timings->ctrlb = MICRON_V_ACTIMB_165; | |
103 | } | |
104 | ||
105 | timings->mr = MICRON_V_MR_165; | |
106 | timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; | |
107 | } | |
108 | #endif | |
109 | ||
550e3756 TU |
110 | /* |
111 | * Routine: board_init | |
112 | * Description: Early hardware init. | |
113 | */ | |
114 | int board_init(void) | |
115 | { | |
116 | gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ | |
117 | /* board id for Linux */ | |
118 | gd->bd->bi_arch_number = MACH_TYPE_OMAP3_TAO3530; | |
119 | /* boot param addr */ | |
120 | gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); | |
121 | ||
122 | return 0; | |
123 | } | |
124 | ||
125 | /* | |
126 | * Routine: misc_init_r | |
127 | * Description: Configure board specific parts | |
128 | */ | |
129 | int misc_init_r(void) | |
130 | { | |
131 | struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE; | |
132 | struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE; | |
133 | ||
134 | twl4030_power_init(); | |
135 | twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); | |
136 | ||
137 | /* Configure GPIOs to output */ | |
138 | /* GPIO23 */ | |
139 | writel(~(GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe); | |
140 | writel(~(GPIO31 | GPIO30 | GPIO22 | GPIO21 | | |
141 | GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe); | |
142 | ||
143 | /* Set GPIOs */ | |
144 | writel(GPIO10 | GPIO8 | GPIO2 | GPIO1, | |
145 | &gpio6_base->setdataout); | |
146 | writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | | |
147 | GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout); | |
148 | ||
fcd9adc3 SR |
149 | switch (tao3530_revision()) { |
150 | case 0: | |
151 | puts("TAO-3530 REV Reserve 1\n"); | |
152 | break; | |
153 | case 1: | |
154 | puts("TAO-3530 REV Reserve 2\n"); | |
155 | break; | |
156 | case 2: | |
157 | puts("TAO-3530 REV Cx\n"); | |
158 | break; | |
159 | case 3: | |
160 | puts("TAO-3530 REV Ax/Bx\n"); | |
161 | break; | |
162 | default: | |
163 | puts("Unknown board revision\n"); | |
164 | } | |
165 | ||
679f82c3 | 166 | omap_die_id_display(); |
550e3756 | 167 | |
550e3756 TU |
168 | return 0; |
169 | } | |
170 | ||
171 | /* | |
172 | * Routine: set_muxconf_regs | |
173 | * Description: Setting up the configuration Mux registers specific to the | |
174 | * hardware. Many pins need to be moved from protect to primary | |
175 | * mode. | |
176 | */ | |
177 | void set_muxconf_regs(void) | |
178 | { | |
179 | MUX_TAO3530(); | |
8f0cbd62 SR |
180 | #if defined(CONFIG_SYS_BOARD_OMAP3_HA) |
181 | MUX_OMAP3_HA(); | |
182 | #endif | |
550e3756 TU |
183 | } |
184 | ||
4aa2ba3a | 185 | #if defined(CONFIG_MMC) |
b75d8dc5 | 186 | int board_mmc_init(struct bd_info *bis) |
550e3756 TU |
187 | { |
188 | omap_mmc_init(0, 0, 0, -1, -1); | |
189 | ||
190 | return 0; | |
191 | } | |
192 | #endif | |
193 | ||
4aa2ba3a | 194 | #if defined(CONFIG_MMC) |
aac5450e PK |
195 | void board_mmc_power_init(void) |
196 | { | |
197 | twl4030_power_mmc_init(0); | |
198 | } | |
199 | #endif | |
200 | ||
8850c5d5 | 201 | #if defined(CONFIG_USB_EHCI_HCD) && !defined(CONFIG_SPL_BUILD) |
550e3756 TU |
202 | /* Call usb_stop() before starting the kernel */ |
203 | void show_boot_progress(int val) | |
204 | { | |
205 | if (val == BOOTSTAGE_ID_RUN_OS) | |
206 | usb_stop(); | |
207 | } | |
208 | ||
209 | static struct omap_usbhs_board_data usbhs_bdata = { | |
210 | .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, | |
211 | .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, | |
212 | .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED | |
213 | }; | |
214 | ||
215 | int ehci_hcd_init(int index, enum usb_init_type init, | |
216 | struct ehci_hccr **hccr, struct ehci_hcor **hcor) | |
217 | { | |
218 | return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); | |
219 | } | |
220 | ||
221 | int ehci_hcd_stop(int index) | |
222 | { | |
223 | return omap_ehci_hcd_stop(); | |
224 | } | |
8850c5d5 | 225 | #endif /* CONFIG_USB_EHCI_HCD */ |