]> Git Repo - u-boot.git/blame - board/ronetix/pm9g45/pm9g45.c
common: Drop asm/global_data.h from common header
[u-boot.git] / board / ronetix / pm9g45 / pm9g45.c
CommitLineData
83d290c5 1// SPDX-License-Identifier: GPL-2.0+
b5d289fc
AD
2/*
3 * (C) Copyright 2010
4 * Ilko Iliev <[email protected]>
5 * Asen Dimov <[email protected]>
6 * Ronetix GmbH <www.ronetix.at>
7 *
8 * (C) Copyright 2007-2008
c9e798d3 9 * Stelian Pop <[email protected]>
b5d289fc 10 * Lead Tech Design <www.leadtechdesign.com>
b5d289fc
AD
11 */
12
13#include <common.h>
9b4a205f 14#include <init.h>
401d1c4f 15#include <asm/global_data.h>
1ace4022 16#include <linux/sizes.h>
eb6e608b 17#include <asm/io.h>
ac45bb16 18#include <asm/gpio.h>
b5d289fc
AD
19#include <asm/arch/at91sam9_smc.h>
20#include <asm/arch/at91_common.h>
b5d289fc
AD
21#include <asm/arch/at91_rstc.h>
22#include <asm/arch/at91_matrix.h>
eb6e608b 23#include <asm/arch/gpio.h>
b5d289fc 24#include <asm/arch/clk.h>
b5d289fc
AD
25#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
26#include <net.h>
27#endif
28#include <netdev.h>
c62db35d 29#include <asm/mach-types.h>
b5d289fc
AD
30
31DECLARE_GLOBAL_DATA_PTR;
32
33/*
34 * Miscelaneous platform dependent initialisations
35 */
36
37#ifdef CONFIG_CMD_NAND
38static void pm9g45_nand_hw_init(void)
39{
40 unsigned long csa;
eb6e608b
AD
41 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
42 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
b5d289fc
AD
43
44 /* Enable CS3 */
45 csa = readl(&matrix->ccr[6]) | AT91_MATRIX_CSA_EBI_CS3A;
46 writel(csa, &matrix->ccr[6]);
47
48 /* Configure SMC CS3 for NAND/SmartMedia */
49 writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
50 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
51 &smc->cs[3].setup);
52
53 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
54 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(2),
55 &smc->cs[3].pulse);
56
57 writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(4),
58 &smc->cs[3].cycle);
59
60 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
61 AT91_SMC_MODE_EXNW_DISABLE |
62 AT91_SMC_MODE_DBW_8 |
63 AT91_SMC_MODE_TDF_CYCLE(3),
64 &smc->cs[3].mode);
65
70341e2e 66 at91_periph_clk_enable(ATMEL_ID_PIOC);
b5d289fc
AD
67
68#ifdef CONFIG_SYS_NAND_READY_PIN
69 /* Configure RDY/BSY */
ac45bb16 70 gpio_direction_input(CONFIG_SYS_NAND_READY_PIN);
b5d289fc
AD
71#endif
72
73 /* Enable NandFlash */
ac45bb16 74 gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
b5d289fc
AD
75}
76#endif
77
78#ifdef CONFIG_MACB
79static void pm9g45_macb_hw_init(void)
80{
b5d289fc
AD
81 /*
82 * PD2 enables the 50MHz oscillator for Ethernet PHY
83 * 1 - enable
84 * 0 - disable
85 */
86 at91_set_pio_output(AT91_PIO_PORTD, 2, 1);
87 at91_set_pio_value(AT91_PIO_PORTD, 2, 1); /* 1- enable, 0 - disable */
88
70341e2e 89 at91_periph_clk_enable(ATMEL_ID_EMAC);
b5d289fc
AD
90
91 /*
92 * Disable pull-up on:
93 * RXDV (PA15) => PHY normal mode (not Test mode)
94 * ERX0 (PA12) => PHY ADDR0
95 * ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0
96 *
97 * PHY has internal pull-down
98 */
99 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
100 at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0);
101 at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0);
102
103 /* Re-enable pull-up */
104 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
105 at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1);
106 at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1);
107
108 at91_macb_hw_init();
109}
110#endif
111
c4df2149 112int board_early_init_f(void)
b5d289fc 113{
70341e2e
WY
114 at91_periph_clk_enable(ATMEL_ID_PIOA);
115 at91_periph_clk_enable(ATMEL_ID_PIOB);
116 at91_periph_clk_enable(ATMEL_ID_PIOC);
117 at91_periph_clk_enable(ATMEL_ID_PIODE);
b5d289fc 118
c4df2149
AD
119 at91_seriald_hw_init();
120
121 return 0;
122}
123
124int board_init(void)
125{
126 /* arch number of AT91SAM9M10G45EK-Board */
127 gd->bd->bi_arch_number = MACH_TYPE_PM9G45;
b5d289fc 128 /* adress of boot parameters */
d9bd4290 129 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
b5d289fc 130
b5d289fc
AD
131#ifdef CONFIG_CMD_NAND
132 pm9g45_nand_hw_init();
133#endif
134
135#ifdef CONFIG_MACB
136 pm9g45_macb_hw_init();
137#endif
138 return 0;
139}
140
141int dram_init(void)
510f794c
AD
142{
143 /* dram_init must store complete ramsize in gd->ram_size */
d9bd4290
II
144 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
145 CONFIG_SYS_SDRAM_SIZE);
510f794c
AD
146 return 0;
147}
148
76b00aca 149int dram_init_banksize(void)
b5d289fc 150{
d9bd4290
II
151 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
152 gd->bd->bi_dram[0].size = CONFIG_SYS_SDRAM_SIZE;
76b00aca
SG
153
154 return 0;
b5d289fc
AD
155}
156
157#ifdef CONFIG_RESET_PHY_R
158void reset_phy(void)
159{
160#ifdef CONFIG_MACB
161 /*
162 * Initialize ethernet HW addr prior to starting Linux,
163 * needed for nfsroot
164 */
d2eaec60 165 eth_init();
b5d289fc
AD
166#endif
167}
168#endif
169
b75d8dc5 170int board_eth_init(struct bd_info *bis)
b5d289fc
AD
171{
172 int rc = 0;
173#ifdef CONFIG_MACB
eb6e608b 174 rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x01);
b5d289fc
AD
175#endif
176 return rc;
177}
This page took 0.370987 seconds and 4 git commands to generate.