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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
8e585f02 TL |
2 | /* |
3 | * (C) Copyright 2000-2003 | |
4 | * Wolfgang Denk, DENX Software Engineering, [email protected]. | |
5 | * | |
aa0d99fc | 6 | * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. |
8e585f02 | 7 | * TsiChung Liew ([email protected]) |
8e585f02 TL |
8 | */ |
9 | ||
8e585f02 | 10 | #include <config.h> |
427c8141 | 11 | #include <common.h> |
49acd56e | 12 | #include <init.h> |
401d1c4f | 13 | #include <asm/global_data.h> |
427c8141 | 14 | #include <asm/immap.h> |
aa0d99fc | 15 | #include <asm/io.h> |
c05ed00a | 16 | #include <linux/delay.h> |
8e585f02 TL |
17 | |
18 | DECLARE_GLOBAL_DATA_PTR; | |
19 | ||
20 | int checkboard(void) | |
21 | { | |
22 | puts("Board: "); | |
23 | puts("Freescale FireEngine 5329 EVB\n"); | |
24 | return 0; | |
25 | }; | |
26 | ||
f1683aa7 | 27 | int dram_init(void) |
8e585f02 | 28 | { |
aa0d99fc | 29 | sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); |
8e585f02 TL |
30 | u32 dramsize, i; |
31 | ||
6d0f6bcf | 32 | dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000; |
8e585f02 TL |
33 | |
34 | for (i = 0x13; i < 0x20; i++) { | |
35 | if (dramsize == (1 << i)) | |
36 | break; | |
37 | } | |
38 | i--; | |
39 | ||
aa0d99fc AW |
40 | out_be32(&sdram->cs0, CONFIG_SYS_SDRAM_BASE | i); |
41 | out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); | |
42 | out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2); | |
8e585f02 TL |
43 | |
44 | /* Issue PALL */ | |
aa0d99fc | 45 | out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2); |
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46 | |
47 | /* Issue LEMR */ | |
aa0d99fc AW |
48 | out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD); |
49 | out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000); | |
8e585f02 TL |
50 | |
51 | udelay(500); | |
52 | ||
53 | /* Issue PALL */ | |
aa0d99fc | 54 | out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2); |
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55 | |
56 | /* Perform two refresh cycles */ | |
aa0d99fc AW |
57 | out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4); |
58 | out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4); | |
8e585f02 | 59 | |
aa0d99fc | 60 | out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE); |
8e585f02 | 61 | |
aa0d99fc AW |
62 | out_be32(&sdram->ctrl, |
63 | (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00); | |
8e585f02 TL |
64 | |
65 | udelay(100); | |
66 | ||
088454cd SG |
67 | gd->ram_size = dramsize; |
68 | ||
69 | return 0; | |
8e585f02 TL |
70 | }; |
71 | ||
72 | int testdram(void) | |
73 | { | |
74 | /* TODO: XXX XXX XXX */ | |
75 | printf("DRAM test not implemented!\n"); | |
76 | ||
77 | return (0); | |
78 | } |