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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
dd6f3abb | 2 | /* |
2495c3a3 BM |
3 | * QEMU x86 specific E820 table generation |
4 | * | |
dd6f3abb | 5 | * (C) Copyright 2015 Miao Yan <[email protected]> |
2495c3a3 | 6 | * (C) Copyright 2019 Bin Meng <[email protected]> |
dd6f3abb TR |
7 | */ |
8 | ||
9 | #include <common.h> | |
f3998fdc | 10 | #include <env_internal.h> |
336d4615 | 11 | #include <malloc.h> |
dd6f3abb | 12 | #include <asm/e820.h> |
2495c3a3 | 13 | #include <asm/arch/qemu.h> |
401d1c4f | 14 | #include <asm/global_data.h> |
dd6f3abb | 15 | |
45ffa122 BM |
16 | DECLARE_GLOBAL_DATA_PTR; |
17 | ||
87af71c2 | 18 | unsigned int install_e820_map(unsigned int max_entries, |
45519924 | 19 | struct e820_entry *entries) |
dd6f3abb | 20 | { |
2495c3a3 BM |
21 | u64 high_mem_size; |
22 | int n = 0; | |
dd6f3abb | 23 | |
2495c3a3 BM |
24 | entries[n].addr = 0; |
25 | entries[n].size = ISA_START_ADDRESS; | |
26 | entries[n].type = E820_RAM; | |
27 | n++; | |
28 | ||
29 | entries[n].addr = ISA_START_ADDRESS; | |
30 | entries[n].size = ISA_END_ADDRESS - ISA_START_ADDRESS; | |
31 | entries[n].type = E820_RESERVED; | |
32 | n++; | |
dd6f3abb TR |
33 | |
34 | /* | |
35 | * since we use memalign(malloc) to allocate high memory for | |
36 | * storing ACPI tables, we need to reserve them in e820 tables, | |
37 | * otherwise kernel will reclaim them and data will be corrupted | |
38 | */ | |
2495c3a3 BM |
39 | entries[n].addr = ISA_END_ADDRESS; |
40 | entries[n].size = gd->relocaddr - TOTAL_MALLOC_LEN - ISA_END_ADDRESS; | |
41 | entries[n].type = E820_RAM; | |
42 | n++; | |
dd6f3abb TR |
43 | |
44 | /* for simplicity, reserve entire malloc space */ | |
2495c3a3 BM |
45 | entries[n].addr = gd->relocaddr - TOTAL_MALLOC_LEN; |
46 | entries[n].size = TOTAL_MALLOC_LEN; | |
47 | entries[n].type = E820_RESERVED; | |
48 | n++; | |
49 | ||
50 | entries[n].addr = gd->relocaddr; | |
51 | entries[n].size = qemu_get_low_memory_size() - gd->relocaddr; | |
52 | entries[n].type = E820_RESERVED; | |
53 | n++; | |
dd6f3abb | 54 | |
2495c3a3 BM |
55 | entries[n].addr = CONFIG_PCIE_ECAM_BASE; |
56 | entries[n].size = CONFIG_PCIE_ECAM_SIZE; | |
57 | entries[n].type = E820_RESERVED; | |
58 | n++; | |
dd6f3abb | 59 | |
2495c3a3 BM |
60 | high_mem_size = qemu_get_high_memory_size(); |
61 | if (high_mem_size) { | |
62 | entries[n].addr = SZ_4G; | |
63 | entries[n].size = high_mem_size; | |
64 | entries[n].type = E820_RAM; | |
65 | n++; | |
66 | } | |
dd6f3abb | 67 | |
2495c3a3 | 68 | return n; |
dd6f3abb | 69 | } |