projects / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| debb7354 | 2 | /* |
| 56551362 | 3 | * Copyright 2004,2009-2011 Freescale Semiconductor, Inc. |
| c934f655 | 4 | * Jeff Brown |
| debb7354 | 5 | * Srikanth Srinivasan ([email protected]) |
| debb7354 JL |
6 | */ |
| 7 | ||
| 8 | /* | |
| 9 | * cpu_init.c - low level cpu init | |
| 10 | */ | |
| 11 | ||
| 8ad92118 | 12 | #include <asm-offsets.h> |
| 2d0daa03 | 13 | #include <config.h> |
| debb7354 | 14 | #include <common.h> |
| 691d719d | 15 | #include <init.h> |
| debb7354 | 16 | #include <mpc86xx.h> |
| 401d1c4f | 17 | #include <asm/global_data.h> |
| 2d0daa03 | 18 | #include <asm/mmu.h> |
| 83d1b387 | 19 | #include <asm/fsl_law.h> |
| af042474 | 20 | #include <asm/fsl_serdes.h> |
| 7649a590 | 21 | #include <asm/mp.h> |
| debb7354 | 22 | |
| 56551362 | 23 | extern void srio_init(void); |
| 24bfb48c | 24 | |
| 1218abf1 WD |
25 | DECLARE_GLOBAL_DATA_PTR; |
| 26 | ||
| debb7354 JL |
27 | /* |
| 28 | * Breathe some life into the CPU... | |
| 29 | * | |
| 30 | * Set up the memory map | |
| 31 | * initialize a bunch of registers | |
| 32 | */ | |
| 33 | ||
| 5c9efb36 | 34 | void cpu_init_f(void) |
| debb7354 | 35 | { |
| ffff3ae5 | 36 | /* Pointer is writable since we allocated a register for it */ |
| 6d0f6bcf | 37 | gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); |
| debb7354 JL |
38 | |
| 39 | /* Clear initial global data */ | |
| 40 | memset ((void *) gd, 0, sizeof (gd_t)); | |
| 41 | ||
| 4933b91f BB |
42 | #ifdef CONFIG_FSL_LAW |
| 43 | init_laws(); | |
| 44 | #endif | |
| 45 | ||
| 24bfb48c BB |
46 | setup_bats(); |
| 47 | ||
| f51cdaf1 | 48 | init_early_memctl_regs(); |
| 5c9efb36 | 49 | |
| 79f4333c PT |
50 | #if defined(CONFIG_FSL_DMA) |
| 51 | dma_init(); | |
| 52 | #endif | |
| debb7354 JL |
53 | |
| 54 | /* enable the timebase bit in HID0 */ | |
| 55 | set_hid0(get_hid0() | 0x4000000); | |
| 56 | ||
| cfc7a7f5 JL |
57 | /* enable EMCP, SYNCBE | ABE bits in HID1 */ |
| 58 | set_hid1(get_hid1() | 0x80000C00); | |
| debb7354 JL |
59 | } |
| 60 | ||
| 61 | /* | |
| 62 | * initialize higher level parts of CPU like timers | |
| 63 | */ | |
| 5c9efb36 | 64 | int cpu_init_r(void) |
| debb7354 | 65 | { |
| af042474 KG |
66 | /* needs to be in ram since code uses global static vars */ |
| 67 | fsl_serdes_init(); | |
| 68 | ||
| 56551362 KG |
69 | #ifdef CONFIG_SYS_SRIO |
| 70 | srio_init(); | |
| 71 | #endif | |
| 72 | ||
| 0e870980 | 73 | #if defined(CONFIG_MP) |
| 1266df88 BB |
74 | setup_mp(); |
| 75 | #endif | |
| 5c9efb36 | 76 | return 0; |
| debb7354 | 77 | } |
| 2d0daa03 | 78 | |
| c9315e6b BB |
79 | #ifdef CONFIG_ADDR_MAP |
| 80 | /* Initialize address mapping array */ | |
| 81 | void init_addr_map(void) | |
| 82 | { | |
| 83 | int i; | |
| 84 | ppc_bat_t bat = DBAT0; | |
| 85 | phys_size_t size; | |
| 86 | unsigned long upper, lower; | |
| 87 | ||
| 88 | for (i = 0; i < CONFIG_SYS_NUM_ADDR_MAP; i++, bat++) { | |
| 89 | if (read_bat(bat, &upper, &lower) != -1) { | |
| 90 | if (!BATU_VALID(upper)) | |
| 91 | size = 0; | |
| 92 | else | |
| 93 | size = BATU_SIZE(upper); | |
| 94 | addrmap_set_entry(BATU_VADDR(upper), BATL_PADDR(lower), | |
| 95 | size, i); | |
| 96 | } | |
| 97 | #ifdef CONFIG_HIGH_BATS | |
| 98 | /* High bats are not contiguous with low BAT numbers */ | |
| 99 | if (bat == DBAT3) | |
| 100 | bat = DBAT4 - 1; | |
| 101 | #endif | |
| 102 | } | |
| 103 | } | |
| 104 | #endif |