[u-boot.git] / arch / arm / dts / armada-ap80x-quad.dtsi

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2018 Marvell International Ltd.
 *
 */

/*
 * Device Tree file for Marvell Armada AP806/AP807.
 */

/ {
	model = "Marvell Armada AP80X Quad";
	compatible = "marvell,armada-ap806-quad", "marvell,armada-ap806";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@000 {
			clocks;
			bootph-all;
			device_type = "cpu";
			compatible = "arm,cortex-a72", "arm,armv8";
			reg = <0x000>;
			enable-method = "psci";
		};
		cpu@001 {
			clocks;
			bootph-all;
			device_type = "cpu";
			compatible = "arm,cortex-a72", "arm,armv8";
			reg = <0x001>;
			enable-method = "psci";
		};
		cpu@100 {
			clocks;
			bootph-all;
			device_type = "cpu";
			compatible = "arm,cortex-a72", "arm,armv8";
			reg = <0x100>;
			enable-method = "psci";
		};
		cpu@101 {
			clocks;
			bootph-all;
			device_type = "cpu";
			compatible = "arm,cortex-a72", "arm,armv8";
			reg = <0x101>;
			enable-method = "psci";
		};
	};
};
Commit	Line	Data
b1c81b4c KP	1	// SPDX-License-Identifier: GPL-2.0
	2	/*
	3	* Copyright (C) 2018 Marvell International Ltd.
	4	*
	5	*/
	6
	7	/*
	8	* Device Tree file for Marvell Armada AP806/AP807.
	9	*/
	10
	11	/ {
	12	model = "Marvell Armada AP80X Quad";
	13	compatible = "marvell,armada-ap806-quad", "marvell,armada-ap806";
	14
	15	cpus {
	16	#address-cells = <1>;
	17	#size-cells = <0>;
	18
	19	cpu@000 {
	20	clocks;
8c103c33	21	bootph-all;
b1c81b4c KP	22	device_type = "cpu";
	23	compatible = "arm,cortex-a72", "arm,armv8";
	24	reg = <0x000>;
	25	enable-method = "psci";
	26	};
	27	cpu@001 {
	28	clocks;
8c103c33	29	bootph-all;
b1c81b4c KP	30	device_type = "cpu";
	31	compatible = "arm,cortex-a72", "arm,armv8";
	32	reg = <0x001>;
	33	enable-method = "psci";
	34	};
	35	cpu@100 {
	36	clocks;
8c103c33	37	bootph-all;
b1c81b4c KP	38	device_type = "cpu";
	39	compatible = "arm,cortex-a72", "arm,armv8";
	40	reg = <0x100>;
	41	enable-method = "psci";
	42	};
	43	cpu@101 {
	44	clocks;
8c103c33	45	bootph-all;
b1c81b4c KP	46	device_type = "cpu";
	47	compatible = "arm,cortex-a72", "arm,armv8";
	48	reg = <0x101>;
	49	enable-method = "psci";
	50	};
	51	};
	52	};