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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
8d30fcd9 SG |
2 | /* |
3 | * Copyright (c) 2011 The Chromium OS Authors. | |
8d30fcd9 SG |
4 | */ |
5 | ||
6 | #include <common.h> | |
e2d8a714 SG |
7 | #include <dm.h> |
8 | #include <fdtdec.h> | |
9 | #include <malloc.h> | |
8d30fcd9 | 10 | #include <asm/gpio.h> |
e5301bac | 11 | #include <dm/device_compat.h> |
ff52665d | 12 | #include <dm/lists.h> |
3a57123e | 13 | #include <dm/of.h> |
ff52665d | 14 | #include <dm/pinctrl.h> |
3669e0e7 | 15 | #include <dt-bindings/gpio/gpio.h> |
2c0f782e | 16 | #include <dt-bindings/gpio/sandbox-gpio.h> |
8d30fcd9 | 17 | |
8d30fcd9 SG |
18 | |
19 | struct gpio_state { | |
20 | const char *label; /* label given by requester */ | |
ff52665d | 21 | ulong dir_flags; /* dir_flags (GPIOD_...) */ |
8d30fcd9 SG |
22 | }; |
23 | ||
ff52665d PD |
24 | /* Access routines for GPIO dir flags */ |
25 | static ulong *get_gpio_dir_flags(struct udevice *dev, unsigned int offset) | |
8d30fcd9 | 26 | { |
e564f054 | 27 | struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); |
e2d8a714 SG |
28 | struct gpio_state *state = dev_get_priv(dev); |
29 | ||
30 | if (offset >= uc_priv->gpio_count) { | |
ff52665d | 31 | static ulong invalid_dir_flags; |
e2d8a714 | 32 | printf("sandbox_gpio: error: invalid gpio %u\n", offset); |
ff52665d | 33 | return &invalid_dir_flags; |
8d30fcd9 SG |
34 | } |
35 | ||
ff52665d PD |
36 | return &state[offset].dir_flags; |
37 | ||
8d30fcd9 SG |
38 | } |
39 | ||
ff52665d | 40 | static int get_gpio_flag(struct udevice *dev, unsigned int offset, ulong flag) |
8d30fcd9 | 41 | { |
ff52665d | 42 | return (*get_gpio_dir_flags(dev, offset) & flag) != 0; |
8d30fcd9 SG |
43 | } |
44 | ||
ff52665d | 45 | static int set_gpio_flag(struct udevice *dev, unsigned int offset, ulong flag, |
e2d8a714 | 46 | int value) |
8d30fcd9 | 47 | { |
ff52665d | 48 | ulong *gpio = get_gpio_dir_flags(dev, offset); |
8d30fcd9 SG |
49 | |
50 | if (value) | |
51 | *gpio |= flag; | |
52 | else | |
53 | *gpio &= ~flag; | |
54 | ||
55 | return 0; | |
56 | } | |
57 | ||
8d30fcd9 SG |
58 | /* |
59 | * Back-channel sandbox-internal-only access to GPIO state | |
60 | */ | |
61 | ||
54c5d08a | 62 | int sandbox_gpio_get_value(struct udevice *dev, unsigned offset) |
8d30fcd9 | 63 | { |
ff52665d | 64 | if (get_gpio_flag(dev, offset, GPIOD_IS_OUT)) |
e2d8a714 | 65 | debug("sandbox_gpio: get_value on output gpio %u\n", offset); |
ff52665d | 66 | return get_gpio_flag(dev, offset, GPIOD_IS_OUT_ACTIVE); |
8d30fcd9 SG |
67 | } |
68 | ||
54c5d08a | 69 | int sandbox_gpio_set_value(struct udevice *dev, unsigned offset, int value) |
8d30fcd9 | 70 | { |
ff52665d | 71 | return set_gpio_flag(dev, offset, GPIOD_IS_OUT_ACTIVE, value); |
8d30fcd9 SG |
72 | } |
73 | ||
54c5d08a | 74 | int sandbox_gpio_get_direction(struct udevice *dev, unsigned offset) |
8d30fcd9 | 75 | { |
ff52665d | 76 | return get_gpio_flag(dev, offset, GPIOD_IS_OUT); |
8d30fcd9 SG |
77 | } |
78 | ||
54c5d08a | 79 | int sandbox_gpio_set_direction(struct udevice *dev, unsigned offset, int output) |
8d30fcd9 | 80 | { |
ff52665d PD |
81 | set_gpio_flag(dev, offset, GPIOD_IS_OUT, output); |
82 | set_gpio_flag(dev, offset, GPIOD_IS_IN, !(output)); | |
83 | ||
84 | return 0; | |
85 | } | |
86 | ||
87 | ulong sandbox_gpio_get_dir_flags(struct udevice *dev, unsigned int offset) | |
88 | { | |
89 | return *get_gpio_dir_flags(dev, offset); | |
90 | } | |
91 | ||
92 | int sandbox_gpio_set_dir_flags(struct udevice *dev, unsigned int offset, | |
93 | ulong flags) | |
94 | { | |
95 | *get_gpio_dir_flags(dev, offset) = flags; | |
96 | ||
97 | return 0; | |
8d30fcd9 SG |
98 | } |
99 | ||
100 | /* | |
101 | * These functions implement the public interface within U-Boot | |
102 | */ | |
103 | ||
e2d8a714 | 104 | /* set GPIO port 'offset' as an input */ |
54c5d08a | 105 | static int sb_gpio_direction_input(struct udevice *dev, unsigned offset) |
8d30fcd9 | 106 | { |
e2d8a714 | 107 | debug("%s: offset:%u\n", __func__, offset); |
8d30fcd9 | 108 | |
e2d8a714 | 109 | return sandbox_gpio_set_direction(dev, offset, 0); |
8d30fcd9 SG |
110 | } |
111 | ||
e2d8a714 | 112 | /* set GPIO port 'offset' as an output, with polarity 'value' */ |
54c5d08a | 113 | static int sb_gpio_direction_output(struct udevice *dev, unsigned offset, |
e2d8a714 | 114 | int value) |
8d30fcd9 | 115 | { |
e2d8a714 | 116 | debug("%s: offset:%u, value = %d\n", __func__, offset, value); |
8d30fcd9 | 117 | |
e2d8a714 SG |
118 | return sandbox_gpio_set_direction(dev, offset, 1) | |
119 | sandbox_gpio_set_value(dev, offset, value); | |
8d30fcd9 SG |
120 | } |
121 | ||
e2d8a714 | 122 | /* read GPIO IN value of port 'offset' */ |
54c5d08a | 123 | static int sb_gpio_get_value(struct udevice *dev, unsigned offset) |
8d30fcd9 | 124 | { |
e2d8a714 | 125 | debug("%s: offset:%u\n", __func__, offset); |
8d30fcd9 | 126 | |
e2d8a714 | 127 | return sandbox_gpio_get_value(dev, offset); |
8d30fcd9 SG |
128 | } |
129 | ||
e2d8a714 | 130 | /* write GPIO OUT value to port 'offset' */ |
54c5d08a | 131 | static int sb_gpio_set_value(struct udevice *dev, unsigned offset, int value) |
8d30fcd9 | 132 | { |
e2d8a714 | 133 | debug("%s: offset:%u, value = %d\n", __func__, offset, value); |
8d30fcd9 | 134 | |
e2d8a714 SG |
135 | if (!sandbox_gpio_get_direction(dev, offset)) { |
136 | printf("sandbox_gpio: error: set_value on input gpio %u\n", | |
137 | offset); | |
8d30fcd9 SG |
138 | return -1; |
139 | } | |
140 | ||
e2d8a714 | 141 | return sandbox_gpio_set_value(dev, offset, value); |
8d30fcd9 SG |
142 | } |
143 | ||
699ea960 SG |
144 | static int sb_gpio_get_function(struct udevice *dev, unsigned offset) |
145 | { | |
ff52665d | 146 | if (get_gpio_flag(dev, offset, GPIOD_IS_OUT)) |
699ea960 | 147 | return GPIOF_OUTPUT; |
ff52665d PD |
148 | if (get_gpio_flag(dev, offset, GPIOD_IS_IN)) |
149 | return GPIOF_INPUT; | |
150 | ||
151 | return GPIOF_INPUT; /*GPIO is not configurated */ | |
699ea960 SG |
152 | } |
153 | ||
3669e0e7 | 154 | static int sb_gpio_xlate(struct udevice *dev, struct gpio_desc *desc, |
3a57123e | 155 | struct ofnode_phandle_args *args) |
3669e0e7 SG |
156 | { |
157 | desc->offset = args->args[0]; | |
158 | if (args->args_count < 2) | |
159 | return 0; | |
2c0f782e PD |
160 | /* treat generic binding with gpio uclass */ |
161 | gpio_xlate_offs_flags(dev, desc, args); | |
162 | ||
163 | /* sandbox test specific, not defined in gpio.h */ | |
164 | if (args->args[1] & GPIO_IN) | |
3669e0e7 | 165 | desc->flags |= GPIOD_IS_IN; |
ff52665d | 166 | |
2c0f782e | 167 | if (args->args[1] & GPIO_OUT) |
3669e0e7 | 168 | desc->flags |= GPIOD_IS_OUT; |
ff52665d | 169 | |
2c0f782e | 170 | if (args->args[1] & GPIO_OUT_ACTIVE) |
3669e0e7 SG |
171 | desc->flags |= GPIOD_IS_OUT_ACTIVE; |
172 | ||
173 | return 0; | |
174 | } | |
175 | ||
ff52665d PD |
176 | static int sb_gpio_set_dir_flags(struct udevice *dev, unsigned int offset, |
177 | ulong flags) | |
178 | { | |
179 | ulong *dir_flags; | |
180 | ||
181 | debug("%s: offset:%u, dir_flags = %lx\n", __func__, offset, flags); | |
182 | ||
183 | dir_flags = get_gpio_dir_flags(dev, offset); | |
184 | ||
185 | *dir_flags = flags; | |
186 | ||
187 | return 0; | |
188 | } | |
189 | ||
190 | static int sb_gpio_get_dir_flags(struct udevice *dev, unsigned int offset, | |
191 | ulong *flags) | |
192 | { | |
193 | debug("%s: offset:%u\n", __func__, offset); | |
194 | *flags = *get_gpio_dir_flags(dev, offset); | |
195 | ||
196 | return 0; | |
197 | } | |
198 | ||
e2d8a714 | 199 | static const struct dm_gpio_ops gpio_sandbox_ops = { |
e2d8a714 SG |
200 | .direction_input = sb_gpio_direction_input, |
201 | .direction_output = sb_gpio_direction_output, | |
202 | .get_value = sb_gpio_get_value, | |
203 | .set_value = sb_gpio_set_value, | |
699ea960 | 204 | .get_function = sb_gpio_get_function, |
3669e0e7 | 205 | .xlate = sb_gpio_xlate, |
ff52665d PD |
206 | .set_dir_flags = sb_gpio_set_dir_flags, |
207 | .get_dir_flags = sb_gpio_get_dir_flags, | |
e2d8a714 SG |
208 | }; |
209 | ||
54c5d08a | 210 | static int sandbox_gpio_ofdata_to_platdata(struct udevice *dev) |
e2d8a714 | 211 | { |
e564f054 | 212 | struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); |
8d30fcd9 | 213 | |
995b60b5 SG |
214 | uc_priv->gpio_count = dev_read_u32_default(dev, "sandbox,gpio-count", |
215 | 0); | |
95795ad6 | 216 | uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name"); |
8d30fcd9 | 217 | |
e2d8a714 SG |
218 | return 0; |
219 | } | |
220 | ||
54c5d08a | 221 | static int gpio_sandbox_probe(struct udevice *dev) |
e2d8a714 | 222 | { |
e564f054 | 223 | struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); |
e2d8a714 | 224 | |
95795ad6 | 225 | if (!dev_of_valid(dev)) |
e2d8a714 SG |
226 | /* Tell the uclass how many GPIOs we have */ |
227 | uc_priv->gpio_count = CONFIG_SANDBOX_GPIO_COUNT; | |
e2d8a714 SG |
228 | |
229 | dev->priv = calloc(sizeof(struct gpio_state), uc_priv->gpio_count); | |
230 | ||
231 | return 0; | |
8d30fcd9 | 232 | } |
e2d8a714 | 233 | |
62cb89d5 SG |
234 | static int gpio_sandbox_remove(struct udevice *dev) |
235 | { | |
236 | free(dev->priv); | |
237 | ||
238 | return 0; | |
239 | } | |
240 | ||
ae7f4513 | 241 | static const struct udevice_id sandbox_gpio_ids[] = { |
e2d8a714 SG |
242 | { .compatible = "sandbox,gpio" }, |
243 | { } | |
244 | }; | |
245 | ||
246 | U_BOOT_DRIVER(gpio_sandbox) = { | |
247 | .name = "gpio_sandbox", | |
248 | .id = UCLASS_GPIO, | |
249 | .of_match = sandbox_gpio_ids, | |
250 | .ofdata_to_platdata = sandbox_gpio_ofdata_to_platdata, | |
251 | .probe = gpio_sandbox_probe, | |
62cb89d5 | 252 | .remove = gpio_sandbox_remove, |
e2d8a714 SG |
253 | .ops = &gpio_sandbox_ops, |
254 | }; | |
e5301bac PD |
255 | |
256 | /* pincontrol: used only to check GPIO pin configuration (pinmux command) */ | |
257 | ||
258 | struct sb_pinctrl_priv { | |
259 | int pinctrl_ngpios; | |
260 | struct list_head gpio_dev; | |
261 | }; | |
262 | ||
263 | struct sb_gpio_bank { | |
264 | struct udevice *gpio_dev; | |
265 | struct list_head list; | |
266 | }; | |
267 | ||
268 | static int sb_populate_gpio_dev_list(struct udevice *dev) | |
269 | { | |
270 | struct sb_pinctrl_priv *priv = dev_get_priv(dev); | |
271 | struct udevice *gpio_dev; | |
272 | struct udevice *child; | |
273 | struct sb_gpio_bank *gpio_bank; | |
274 | int ret; | |
275 | ||
276 | /* | |
277 | * parse pin-controller sub-nodes (ie gpio bank nodes) and fill | |
278 | * a list with all gpio device reference which belongs to the | |
279 | * current pin-controller. This list is used to find pin_name and | |
280 | * pin muxing | |
281 | */ | |
282 | list_for_each_entry(child, &dev->child_head, sibling_node) { | |
283 | ret = uclass_get_device_by_name(UCLASS_GPIO, child->name, | |
284 | &gpio_dev); | |
285 | if (ret < 0) | |
286 | continue; | |
287 | ||
288 | gpio_bank = malloc(sizeof(*gpio_bank)); | |
289 | if (!gpio_bank) { | |
290 | dev_err(dev, "Not enough memory\n"); | |
291 | return -ENOMEM; | |
292 | } | |
293 | ||
294 | gpio_bank->gpio_dev = gpio_dev; | |
295 | list_add_tail(&gpio_bank->list, &priv->gpio_dev); | |
296 | } | |
297 | ||
298 | return 0; | |
299 | } | |
300 | ||
301 | static int sb_pinctrl_get_pins_count(struct udevice *dev) | |
302 | { | |
303 | struct sb_pinctrl_priv *priv = dev_get_priv(dev); | |
304 | struct gpio_dev_priv *uc_priv; | |
305 | struct sb_gpio_bank *gpio_bank; | |
306 | ||
307 | /* | |
308 | * if get_pins_count has already been executed once on this | |
309 | * pin-controller, no need to run it again | |
310 | */ | |
311 | if (priv->pinctrl_ngpios) | |
312 | return priv->pinctrl_ngpios; | |
313 | ||
314 | if (list_empty(&priv->gpio_dev)) | |
315 | sb_populate_gpio_dev_list(dev); | |
316 | /* | |
317 | * walk through all banks to retrieve the pin-controller | |
318 | * pins number | |
319 | */ | |
320 | list_for_each_entry(gpio_bank, &priv->gpio_dev, list) { | |
321 | uc_priv = dev_get_uclass_priv(gpio_bank->gpio_dev); | |
322 | ||
323 | priv->pinctrl_ngpios += uc_priv->gpio_count; | |
324 | } | |
325 | ||
326 | return priv->pinctrl_ngpios; | |
327 | } | |
328 | ||
329 | static struct udevice *sb_pinctrl_get_gpio_dev(struct udevice *dev, | |
330 | unsigned int selector, | |
331 | unsigned int *idx) | |
332 | { | |
333 | struct sb_pinctrl_priv *priv = dev_get_priv(dev); | |
334 | struct sb_gpio_bank *gpio_bank; | |
335 | struct gpio_dev_priv *uc_priv; | |
336 | int pin_count = 0; | |
337 | ||
338 | if (list_empty(&priv->gpio_dev)) | |
339 | sb_populate_gpio_dev_list(dev); | |
340 | ||
341 | /* look up for the bank which owns the requested pin */ | |
342 | list_for_each_entry(gpio_bank, &priv->gpio_dev, list) { | |
343 | uc_priv = dev_get_uclass_priv(gpio_bank->gpio_dev); | |
344 | ||
345 | if (selector < (pin_count + uc_priv->gpio_count)) { | |
346 | /* | |
347 | * we found the bank, convert pin selector to | |
348 | * gpio bank index | |
349 | */ | |
350 | *idx = selector - pin_count; | |
351 | ||
352 | return gpio_bank->gpio_dev; | |
353 | } | |
354 | pin_count += uc_priv->gpio_count; | |
355 | } | |
356 | ||
357 | return NULL; | |
358 | } | |
359 | ||
360 | static const char *sb_pinctrl_get_pin_name(struct udevice *dev, | |
361 | unsigned int selector) | |
362 | { | |
363 | struct gpio_dev_priv *uc_priv; | |
364 | struct udevice *gpio_dev; | |
365 | unsigned int gpio_idx; | |
366 | static char pin_name[PINNAME_SIZE]; | |
367 | ||
368 | /* look up for the bank which owns the requested pin */ | |
369 | gpio_dev = sb_pinctrl_get_gpio_dev(dev, selector, &gpio_idx); | |
370 | if (!gpio_dev) { | |
371 | snprintf(pin_name, PINNAME_SIZE, "Error"); | |
372 | } else { | |
373 | uc_priv = dev_get_uclass_priv(gpio_dev); | |
374 | ||
375 | snprintf(pin_name, PINNAME_SIZE, "%s%d", | |
376 | uc_priv->bank_name, | |
377 | gpio_idx); | |
378 | } | |
379 | ||
380 | return pin_name; | |
381 | } | |
382 | ||
383 | static char *get_dir_flags_string(ulong flags) | |
384 | { | |
385 | if (flags & GPIOD_OPEN_DRAIN) | |
386 | return "drive-open-drain"; | |
387 | if (flags & GPIOD_OPEN_SOURCE) | |
388 | return "drive-open-source"; | |
389 | if (flags & GPIOD_PULL_UP) | |
390 | return "bias-pull-up"; | |
391 | if (flags & GPIOD_PULL_DOWN) | |
392 | return "bias-pull-down"; | |
393 | return "."; | |
394 | } | |
395 | ||
396 | static int sb_pinctrl_get_pin_muxing(struct udevice *dev, | |
397 | unsigned int selector, | |
398 | char *buf, int size) | |
399 | { | |
400 | struct udevice *gpio_dev; | |
401 | unsigned int gpio_idx; | |
402 | ulong dir_flags; | |
403 | int function; | |
404 | ||
405 | /* look up for the bank which owns the requested pin */ | |
406 | gpio_dev = sb_pinctrl_get_gpio_dev(dev, selector, &gpio_idx); | |
407 | if (!gpio_dev) { | |
408 | snprintf(buf, size, "Error"); | |
409 | } else { | |
410 | function = sb_gpio_get_function(gpio_dev, gpio_idx); | |
411 | dir_flags = *get_gpio_dir_flags(gpio_dev, gpio_idx); | |
412 | ||
413 | snprintf(buf, size, "gpio %s %s", | |
414 | function == GPIOF_OUTPUT ? "output" : "input", | |
415 | get_dir_flags_string(dir_flags)); | |
416 | } | |
417 | ||
418 | return 0; | |
419 | } | |
420 | ||
421 | static int sandbox_pinctrl_probe(struct udevice *dev) | |
422 | { | |
423 | struct sb_pinctrl_priv *priv = dev_get_priv(dev); | |
424 | ||
425 | INIT_LIST_HEAD(&priv->gpio_dev); | |
426 | ||
427 | return 0; | |
428 | } | |
429 | ||
430 | static struct pinctrl_ops sandbox_pinctrl_gpio_ops = { | |
431 | .get_pin_name = sb_pinctrl_get_pin_name, | |
432 | .get_pins_count = sb_pinctrl_get_pins_count, | |
433 | .get_pin_muxing = sb_pinctrl_get_pin_muxing, | |
434 | }; | |
435 | ||
436 | static const struct udevice_id sandbox_pinctrl_gpio_match[] = { | |
437 | { .compatible = "sandbox,pinctrl-gpio" }, | |
438 | { /* sentinel */ } | |
439 | }; | |
440 | ||
441 | U_BOOT_DRIVER(sandbox_pinctrl_gpio) = { | |
442 | .name = "sandbox_pinctrl_gpio", | |
443 | .id = UCLASS_PINCTRL, | |
444 | .of_match = sandbox_pinctrl_gpio_match, | |
445 | .ops = &sandbox_pinctrl_gpio_ops, | |
446 | .bind = dm_scan_fdt_dev, | |
447 | .probe = sandbox_pinctrl_probe, | |
448 | .priv_auto_alloc_size = sizeof(struct sb_pinctrl_priv), | |
449 | }; |