projects / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 0f67e09e BT |
1 | Driver implementing the fuse API for Freescale's IC Identification Module (IIM) |
| 2 | ||
| 3 | This IP can be found on the following SoCs: | |
| 4 | - MPC512x, | |
| 5 | - i.MX25, | |
| 6 | - i.MX27, | |
| 7 | - i.MX31, | |
| 8 | - i.MX35, | |
| 9 | - i.MX51, | |
| 10 | - i.MX53. | |
| 11 | ||
| 12 | The section numbers in this file refer to the i.MX25 Reference Manual. | |
| 13 | ||
| 14 | A fuse word contains 8 fuse bit slots, as explained in 30.4.2.2.1. | |
| 15 | ||
| 16 | A bank contains 256 fuse word slots, as shown by the memory map in 30.3.1. | |
| 17 | ||
| 18 | Some fuse bit or word slots may not have the corresponding fuses actually | |
| 19 | implemented in the fusebox. | |
| 20 | ||
| 21 | See the README files of the SoCs using this driver in order to know the | |
| 22 | conventions used by U-Boot to store some specific data in the fuses, e.g. MAC | |
| 23 | addresses. | |
| 24 | ||
| 25 | Fuse operations: | |
| 26 | ||
| 27 | Read | |
| 28 | Read operations are implemented as read accesses to the shadow registers, | |
| 29 | using "Word y of Bank x" from the register summary in 30.3.2. This is | |
| 30 | explained in detail in 30.4.5.1. | |
| 31 | ||
| 32 | Sense | |
| 33 | Sense operations are implemented as explained in 30.4.5.2. | |
| 34 | ||
| 35 | Program | |
| 36 | Program operations are implemented as explained in 30.4.5.3. Following | |
| 37 | this operation, the shadow registers are reloaded by the hardware (not | |
| 38 | immediately, but this does not make any difference for a user reading | |
| 39 | these registers). | |
| 40 | ||
| 41 | Override | |
| 42 | Override operations are implemented as write accesses to the shadow | |
| 43 | registers, as explained in 30.4.5.4. | |
| 44 | ||
| 45 | Configuration: | |
| 46 | ||
| 47 | CONFIG_FSL_IIM | |
| 060613f1 | 48 | Enable this to enable the fsl_iim driver. |