[u-boot.git] / include / configs / ot1200.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
 * Copyright (C) 2014 Bachmann electronic GmbH
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include "mx6_common.h"

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN           (10 * 1024 * 1024)

/* UART Configs */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE           UART1_BASE

/* SF Configs */

/* IO expander */
#define CONFIG_PCA953X
#define CONFIG_SYS_I2C_PCA953X_ADDR	0x20
#define CONFIG_SYS_I2C_PCA953X_WIDTH	{ {0x20, 16} }

/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED            100000

/* OCOTP Configs */
#define CONFIG_IMX_OTP
#define IMX_OTP_BASE                    OCOTP_BASE_ADDR
#define IMX_OTP_ADDR_MAX                0x7F
#define IMX_OTP_DATA_ERROR_VAL          0xBADABADA
#define IMX_OTPWRITE_ENABLED

/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR      0
#define CONFIG_SYS_FSL_USDHC_NUM       2

/* USB Configs */
#define CONFIG_MXC_USB_PORTSC   (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2

/*
 * SATA Configs
 */
#ifdef CONFIG_CMD_SATA
#define CONFIG_SYS_SATA_MAX_DEVICE	1
#define CONFIG_DWC_AHSATA_PORT_ID	0
#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
#define CONFIG_LBA48
#endif

/* SPL */
#ifdef CONFIG_SPL
#include "imx6_spl.h"
#define CONFIG_SYS_SPI_U_BOOT_OFFS     (64 * 1024)
#endif

#define CONFIG_FEC_MXC
#define IMX_FEC_BASE                    ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE             MII100
#define CONFIG_ETHPRIME                 "FEC"
#define CONFIG_FEC_MXC_PHYADDR          0x5
#define CONFIG_PHY_SMSC

#ifndef CONFIG_SPL
#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_I2C_EEPROM_BUS             1
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN        1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS     3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#endif

/* Thermal support */
#define CONFIG_IMX_THERMAL

/* Physical Memory Map */
#define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR

#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* Environment organization */
#define CONFIG_ENV_SIZE                 (64 * 1024)	/* 64 kb */
#define CONFIG_ENV_OFFSET               (1024 * 1024)
/* M25P16 has an erase size of 64 KiB */
#define CONFIG_ENV_SECT_SIZE            (64 * 1024)

#define CONFIG_BOOTP_SERVERIP
#define CONFIG_BOOTP_BOOTFILE

#endif         /* __CONFIG_H */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
39d09733 CG	2	/*
	3	* Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
	4	* Copyright (C) 2014 Bachmann electronic GmbH
39d09733 CG	5	*/
	6
	7	#ifndef __CONFIG_H
	8	#define __CONFIG_H
	9
	10	#include "mx6_common.h"
39d09733	11
39d09733 CG	12	/* Size of malloc() pool */
	13	#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
	14
39d09733 CG	15	/* UART Configs */
	16	#define CONFIG_MXC_UART
	17	#define CONFIG_MXC_UART_BASE UART1_BASE
	18
	19	/* SF Configs */
39d09733 CG	20
	21	/* IO expander */
	22	#define CONFIG_PCA953X
	23	#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
	24	#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
39d09733 CG	25
39d09733 CG	26	/* I2C Configs */
39d09733 CG	27	#define CONFIG_SYS_I2C
39d09733 CG	28	#define CONFIG_SYS_I2C_MXC
03544c66 AA	29	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
03544c66 AA	30	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e	31	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
39d09733 CG	32	#define CONFIG_SYS_I2C_SPEED 100000
	33
	34	/* OCOTP Configs */
39d09733 CG	35	#define CONFIG_IMX_OTP
	36	#define IMX_OTP_BASE OCOTP_BASE_ADDR
	37	#define IMX_OTP_ADDR_MAX 0x7F
	38	#define IMX_OTP_DATA_ERROR_VAL 0xBADABADA
	39	#define IMX_OTPWRITE_ENABLED
	40
	41	/* MMC Configs */
39d09733 CG	42	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	43	#define CONFIG_SYS_FSL_USDHC_NUM 2
	44
39c7d5a2	45	/* USB Configs */
39c7d5a2 CG	46	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	47	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
	48
39d09733 CG	49	/*
	50	* SATA Configs
	51	*/
	52	#ifdef CONFIG_CMD_SATA
39d09733 CG	53	#define CONFIG_SYS_SATA_MAX_DEVICE 1
	54	#define CONFIG_DWC_AHSATA_PORT_ID 0
	55	#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
	56	#define CONFIG_LBA48
39d09733 CG	57	#endif
39d09733 CG	58
68a3664a CG	59	/* SPL */
	60	#ifdef CONFIG_SPL
	61	#include "imx6_spl.h"
68a3664a	62	#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
68a3664a CG	63	#endif
68a3664a CG	64
39d09733	65	#define CONFIG_FEC_MXC
39d09733 CG	66	#define IMX_FEC_BASE ENET_BASE_ADDR
	67	#define CONFIG_FEC_XCV_TYPE MII100
	68	#define CONFIG_ETHPRIME "FEC"
	69	#define CONFIG_FEC_MXC_PHYADDR 0x5
39d09733 CG	70	#define CONFIG_PHY_SMSC
39d09733 CG	71
fb2589b3	72	#ifndef CONFIG_SPL
fb2589b3 CG	73	#define CONFIG_ENV_EEPROM_IS_ON_I2C
	74	#define CONFIG_SYS_I2C_EEPROM_BUS 1
	75	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
	76	#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
	77	#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
fb2589b3 CG	78	#endif
fb2589b3 CG	79
8be70bb4 CG	80	/* Thermal support */
	81	#define CONFIG_IMX_THERMAL
	82
39d09733	83	/* Physical Memory Map */
39d09733	84	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
39d09733 CG	85
	86	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	87	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	88	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	89
	90	#define CONFIG_SYS_INIT_SP_OFFSET \
	91	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	92	#define CONFIG_SYS_INIT_SP_ADDR \
	93	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	94
056845c2	95	/* Environment organization */
39d09733 CG	96	#define CONFIG_ENV_SIZE (64 * 1024) /* 64 kb */
	97	#define CONFIG_ENV_OFFSET (1024 * 1024)
	98	/* M25P16 has an erase size of 64 KiB */
	99	#define CONFIG_ENV_SECT_SIZE (64 * 1024)
39d09733	100
39d09733 CG	101	#define CONFIG_BOOTP_SERVERIP
	102	#define CONFIG_BOOTP_BOOTFILE
	103
	104	#endif /* __CONFIG_H */