[u-boot.git] / include / configs / devkit3250.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Embest/Timll DevKit3250 board configuration file
 *
 * Copyright (C) 2011-2015 Vladimir Zapolskiy <[email protected]>
 */

#ifndef __CONFIG_DEVKIT3250_H__
#define __CONFIG_DEVKIT3250_H__

/* SoC and board defines */
#include <linux/sizes.h>
#include <asm/arch/cpu.h>

#define CONFIG_MACH_TYPE		MACH_TYPE_DEVKIT3250

#if !defined(CONFIG_SPL_BUILD)
#define CONFIG_SKIP_LOWLEVEL_INIT
#endif

/*
 * Memory configurations
 */
#define CONFIG_SYS_MALLOC_LEN		SZ_1M
#define CONFIG_SYS_SDRAM_BASE		EMC_DYCS0_BASE
#define CONFIG_SYS_SDRAM_SIZE		SZ_64M
#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + SZ_32K)
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE - SZ_1M)

#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_32K)

#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_4K \
					 - GENERATED_GBL_DATA_SIZE)

/*
 * Serial Driver
 */
#define CONFIG_SYS_LPC32XX_UART		5   /* UART5 */

/*
 * DMA
 */
#if !defined(CONFIG_SPL_BUILD)
#define CONFIG_DMA_LPC32XX
#endif

/*
 * I2C
 */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_LPC32XX
#define CONFIG_SYS_I2C_SPEED		100000

/*
 * GPIO
 */
#define CONFIG_LPC32XX_GPIO

/*
 * SSP/SPI
 */
#define CONFIG_LPC32XX_SSP_TIMEOUT	100000

/*
 * Ethernet
 */
#define CONFIG_RMII
#define CONFIG_LPC32XX_ETH
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN

/*
 * NOR Flash
 */
#define CONFIG_SYS_MAX_FLASH_BANKS	1
#define CONFIG_SYS_MAX_FLASH_SECT	71
#define CONFIG_SYS_FLASH_BASE		EMC_CS0_BASE
#define CONFIG_SYS_FLASH_SIZE		SZ_4M

/*
 * NAND controller
 */
#define CONFIG_SYS_NAND_BASE		SLC_NAND_BASE
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }

/*
 * NAND chip timings
 */
#define CONFIG_LPC32XX_NAND_SLC_WDR_CLKS	14
#define CONFIG_LPC32XX_NAND_SLC_WWIDTH		66666666
#define CONFIG_LPC32XX_NAND_SLC_WHOLD		200000000
#define CONFIG_LPC32XX_NAND_SLC_WSETUP		50000000
#define CONFIG_LPC32XX_NAND_SLC_RDR_CLKS	14
#define CONFIG_LPC32XX_NAND_SLC_RWIDTH		66666666
#define CONFIG_LPC32XX_NAND_SLC_RHOLD		200000000
#define CONFIG_LPC32XX_NAND_SLC_RSETUP		50000000

#define CONFIG_SYS_NAND_BLOCK_SIZE		0x20000
#define CONFIG_SYS_NAND_PAGE_SIZE		NAND_LARGE_BLOCK_PAGE_SIZE

/*
 * USB
 */
#define CONFIG_USB_OHCI_LPC32XX
#define CONFIG_USB_ISP1301_I2C_ADDR		0x2d

/*
 * U-Boot General Configurations
 */
#define CONFIG_SYS_CBSIZE		1024
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

/*
 * Pass open firmware flat tree
 */

/*
 * Environment
 */

#define CONFIG_BOOTCOMMAND			\
	"dhcp; "				\
	"tftp ${loadaddr} ${serverip}:${tftpdir}/${bootfile}; "		\
	"tftp ${dtbaddr} ${serverip}:${tftpdir}/devkit3250.dtb; "	\
	"setenv nfsargs ip=dhcp root=/dev/nfs nfsroot=${serverip}:${nfsroot},tcp; "	\
	"setenv bootargs ${bootargs} ${nfsargs} ${userargs}; "			\
	"bootm ${loadaddr} - ${dtbaddr}"

#define CONFIG_EXTRA_ENV_SETTINGS		\
	"autoload=no\0"				\
	"ethaddr=00:01:90:00:C0:81\0"		\
	"dtbaddr=0x81000000\0"			\
	"nfsroot=/opt/projects/images/vladimir/oe/devkit3250/rootfs\0"	\
	"tftpdir=vladimir/oe/devkit3250\0"	\
	"userargs=oops=panic\0"

/*
 * U-Boot Commands
 */

/*
 * Boot Linux
 */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS

#define CONFIG_BOOTFILE			"uImage"
#define CONFIG_LOADADDR			0x80008000

/*
 * SPL specific defines
 */
/* SPL will be executed at offset 0 */

/* SPL will use SRAM as stack */
#define CONFIG_SPL_STACK		0x0000FFF8

/* Use the framework and generic lib */

/* SPL will use serial */

/* SPL loads an image from NAND */
#define CONFIG_SPL_NAND_RAW_ONLY
#define CONFIG_SPL_NAND_DRIVERS

#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_NAND_SOFTECC

#define CONFIG_SPL_MAX_SIZE		0x20000
#define CONFIG_SPL_PAD_TO		CONFIG_SPL_MAX_SIZE

/* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
#define CONFIG_SYS_NAND_U_BOOT_SIZE	0x60000

#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE

/* See common/spl/spl.c  spl_set_header_raw_uboot() */
#define CONFIG_SYS_MONITOR_LEN		CONFIG_SYS_NAND_U_BOOT_SIZE

/*
 * Include SoC specific configuration
 */
#include <asm/arch/config.h>

#endif  /* __CONFIG_DEVKIT3250_H__*/
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
463ec1ca VZ	2	/*
	3	* Embest/Timll DevKit3250 board configuration file
	4	*
768ddeee	5	* Copyright (C) 2011-2015 Vladimir Zapolskiy <[email protected]>
463ec1ca VZ	6	*/
	7
	8	#ifndef __CONFIG_DEVKIT3250_H__
	9	#define __CONFIG_DEVKIT3250_H__
	10
	11	/* SoC and board defines */
1ace4022	12	#include <linux/sizes.h>
463ec1ca VZ	13	#include <asm/arch/cpu.h>
463ec1ca VZ	14
463ec1ca VZ	15	#define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT3250
463ec1ca VZ	16
e9b3ce3f	17	#if !defined(CONFIG_SPL_BUILD)
463ec1ca	18	#define CONFIG_SKIP_LOWLEVEL_INIT
e9b3ce3f	19	#endif
463ec1ca VZ	20
	21	/*
	22	* Memory configurations
	23	*/
463ec1ca	24	#define CONFIG_SYS_MALLOC_LEN SZ_1M
463ec1ca VZ	25	#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE
463ec1ca VZ	26	#define CONFIG_SYS_SDRAM_SIZE SZ_64M
463ec1ca VZ	27	#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + SZ_32K)
	28	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - SZ_1M)
	29
	30	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32K)
	31
	32	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K \
	33	- GENERATED_GBL_DATA_SIZE)
	34
	35	/*
	36	* Serial Driver
	37	*/
768ddeee	38	#define CONFIG_SYS_LPC32XX_UART 5 /* UART5 */
463ec1ca	39
6cbaf4c1 VZ	40	/*
	41	* DMA
	42	*/
	43	#if !defined(CONFIG_SPL_BUILD)
	44	#define CONFIG_DMA_LPC32XX
	45	#endif
	46
768ddeee VZ	47	/*
	48	* I2C
	49	*/
	50	#define CONFIG_SYS_I2C
	51	#define CONFIG_SYS_I2C_LPC32XX
	52	#define CONFIG_SYS_I2C_SPEED 100000
768ddeee VZ	53
	54	/*
	55	* GPIO
	56	*/
	57	#define CONFIG_LPC32XX_GPIO
768ddeee VZ	58
	59	/*
	60	* SSP/SPI
	61	*/
768ddeee	62	#define CONFIG_LPC32XX_SSP_TIMEOUT 100000
768ddeee VZ	63
	64	/*
	65	* Ethernet
	66	*/
	67	#define CONFIG_RMII
768ddeee	68	#define CONFIG_LPC32XX_ETH
768ddeee	69	#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
768ddeee	70
463ec1ca VZ	71	/*
	72	* NOR Flash
	73	*/
463ec1ca VZ	74	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	75	#define CONFIG_SYS_MAX_FLASH_SECT 71
	76	#define CONFIG_SYS_FLASH_BASE EMC_CS0_BASE
	77	#define CONFIG_SYS_FLASH_SIZE SZ_4M
463ec1ca	78
768ddeee VZ	79	/*
	80	* NAND controller
	81	*/
768ddeee VZ	82	#define CONFIG_SYS_NAND_BASE SLC_NAND_BASE
	83	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	84	#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
	85
	86	/*
	87	* NAND chip timings
	88	*/
	89	#define CONFIG_LPC32XX_NAND_SLC_WDR_CLKS 14
	90	#define CONFIG_LPC32XX_NAND_SLC_WWIDTH 66666666
	91	#define CONFIG_LPC32XX_NAND_SLC_WHOLD 200000000
	92	#define CONFIG_LPC32XX_NAND_SLC_WSETUP 50000000
	93	#define CONFIG_LPC32XX_NAND_SLC_RDR_CLKS 14
	94	#define CONFIG_LPC32XX_NAND_SLC_RWIDTH 66666666
	95	#define CONFIG_LPC32XX_NAND_SLC_RHOLD 200000000
	96	#define CONFIG_LPC32XX_NAND_SLC_RSETUP 50000000
	97
327f0d23 VZ	98	#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
327f0d23 VZ	99	#define CONFIG_SYS_NAND_PAGE_SIZE NAND_LARGE_BLOCK_PAGE_SIZE
327f0d23	100
6cbaf4c1 VZ	101	/*
	102	* USB
	103	*/
	104	#define CONFIG_USB_OHCI_LPC32XX
	105	#define CONFIG_USB_ISP1301_I2C_ADDR 0x2d
6cbaf4c1	106
463ec1ca VZ	107	/*
	108	* U-Boot General Configurations
	109	*/
463ec1ca	110	#define CONFIG_SYS_CBSIZE 1024
463ec1ca VZ	111	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
463ec1ca VZ	112
768ddeee VZ	113	/*
	114	* Pass open firmware flat tree
	115	*/
768ddeee VZ	116
	117	/*
	118	* Environment
	119	*/
768ddeee VZ	120
	121	#define CONFIG_BOOTCOMMAND \
	122	"dhcp; " \
	123	"tftp ${loadaddr} ${serverip}:${tftpdir}/${bootfile}; " \
	124	"tftp ${dtbaddr} ${serverip}:${tftpdir}/devkit3250.dtb; " \
	125	"setenv nfsargs ip=dhcp root=/dev/nfs nfsroot=${serverip}:${nfsroot},tcp; " \
	126	"setenv bootargs ${bootargs} ${nfsargs} ${userargs}; " \
	127	"bootm ${loadaddr} - ${dtbaddr}"
	128
	129	#define CONFIG_EXTRA_ENV_SETTINGS \
	130	"autoload=no\0" \
	131	"ethaddr=00:01:90:00:C0:81\0" \
	132	"dtbaddr=0x81000000\0" \
	133	"nfsroot=/opt/projects/images/vladimir/oe/devkit3250/rootfs\0" \
	134	"tftpdir=vladimir/oe/devkit3250\0" \
	135	"userargs=oops=panic\0"
463ec1ca VZ	136
	137	/*
	138	* U-Boot Commands
	139	*/
463ec1ca VZ	140
	141	/*
	142	* Boot Linux
	143	*/
	144	#define CONFIG_CMDLINE_TAG
	145	#define CONFIG_SETUP_MEMORY_TAGS
463ec1ca VZ	146
463ec1ca VZ	147	#define CONFIG_BOOTFILE "uImage"
463ec1ca VZ	148	#define CONFIG_LOADADDR 0x80008000
463ec1ca VZ	149
e9b3ce3f VZ	150	/*
	151	* SPL specific defines
	152	*/
	153	/* SPL will be executed at offset 0 */
e9b3ce3f VZ	154
	155	/* SPL will use SRAM as stack */
	156	#define CONFIG_SPL_STACK 0x0000FFF8
e9b3ce3f VZ	157
e9b3ce3f VZ	158	/* Use the framework and generic lib */
e9b3ce3f VZ	159
e9b3ce3f VZ	160	/* SPL will use serial */
e9b3ce3f VZ	161
e9b3ce3f VZ	162	/* SPL loads an image from NAND */
e9b3ce3f	163	#define CONFIG_SPL_NAND_RAW_ONLY
e9b3ce3f VZ	164	#define CONFIG_SPL_NAND_DRIVERS
e9b3ce3f VZ	165
e9b3ce3f VZ	166	#define CONFIG_SPL_NAND_ECC
	167	#define CONFIG_SPL_NAND_SOFTECC
	168
	169	#define CONFIG_SPL_MAX_SIZE 0x20000
	170	#define CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE
	171
	172	/* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
	173	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
	174	#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000
	175
	176	#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
	177	#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
	178
	179	/* See common/spl/spl.c spl_set_header_raw_uboot() */
	180	#define CONFIG_SYS_MONITOR_LEN CONFIG_SYS_NAND_U_BOOT_SIZE
	181
463ec1ca VZ	182	/*
	183	* Include SoC specific configuration
	184	*/
	185	#include <asm/arch/config.h>
	186
	187	#endif /* __CONFIG_DEVKIT3250_H__*/