[u-boot.git] / include / configs / cm_t335.h

/*
 * Config file for Compulab CM-T335 board
 *
 * Copyright (C) 2013, Compulab Ltd - http://compulab.co.il/
 *
 * Author: Ilya Ledvich <[email protected]>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_CM_T335_H
#define __CONFIG_CM_T335_H

#define CONFIG_CM_T335
#define CONFIG_NAND

#include <configs/ti_am335x_common.h>

#undef CONFIG_SPI
#undef CONFIG_OMAP3_SPI
#undef CONFIG_BOOTCOUNT_LIMIT
#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC

#undef CONFIG_MAX_RAM_BANK_SIZE
#define CONFIG_MAX_RAM_BANK_SIZE	(512 << 20)	/* 512MB */

#define MACH_TYPE_CM_T335		4586	/* Until the next sync */
#define CONFIG_MACH_TYPE		MACH_TYPE_CM_T335

/* Clock Defines */
#define V_OSCK				25000000  /* Clock output from T2 */
#define V_SCLK				(V_OSCK)

#define CONFIG_ENV_SIZE			(16 << 10)	/* 16 KiB */

#ifndef CONFIG_SPL_BUILD
#define MMCARGS \
	"mmcdev=0\0" \
	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
	"mmcrootfstype=ext4\0" \
	"mmcargs=setenv bootargs console=${console} " \
		"root=${mmcroot} " \
		"rootfstype=${mmcrootfstype}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"bootm ${loadaddr}\0"

#define NANDARGS \
	"mtdids=" MTDIDS_DEFAULT "\0" \
	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	"nandroot=ubi0:rootfs rw\0" \
	"nandrootfstype=ubifs\0" \
	"nandargs=setenv bootargs console=${console} " \
		"root=${nandroot} " \
		"rootfstype=${nandrootfstype} " \
		"ubi.mtd=${rootfs_name}\0" \
	"nandboot=echo Booting from nand ...; " \
		"run nandargs; " \
		"nboot ${loadaddr} nand0 900000; " \
		"bootm ${loadaddr}\0"

#define CONFIG_EXTRA_ENV_SETTINGS \
	"loadaddr=82000000\0" \
	"console=ttyO0,115200n8\0" \
	"rootfs_name=rootfs\0" \
	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
		"source ${loadaddr}\0" \
	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
	MMCARGS \
	NANDARGS

#define CONFIG_BOOTCOMMAND \
	"mmc dev ${mmcdev}; if mmc rescan; then " \
		"if run loadbootscript; then " \
			"run bootscript; " \
		"else " \
			"if run loaduimage; then " \
				"run mmcboot; " \
			"else run nandboot; " \
			"fi; " \
		"fi; " \
	"else run nandboot; fi"
#endif /* CONFIG_SPL_BUILD */

#define CONFIG_TIMESTAMP
#define CONFIG_SYS_AUTOLOAD		"no"

/* Serial console configuration */
#define CONFIG_CONS_INDEX		1
#define CONFIG_SERIAL1			1	/* UART0 */

/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1		0x44e09000	/* UART0 */
#define CONFIG_SYS_NS16550_COM2		0x48022000	/* UART1 */
#define CONFIG_BAUDRATE			115200

/* I2C Configuration */
#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
#define CONFIG_SYS_I2C_EEPROM_BUS	0

/* SPL */
#define CONFIG_SPL_LDSCRIPT		"arch/arm/mach-omap2/am33xx/u-boot-spl.lds"

/* Network. */
#define CONFIG_PHY_GIGE
#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS

/* NAND support */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
					 CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
					 10, 11, 12, 13, 14, 15, 16, 17, \
					 18, 19, 20, 21, 22, 23, 24, 25, \
					 26, 27, 28, 29, 30, 31, 32, 33, \
					 34, 35, 36, 37, 38, 39, 40, 41, \
					 42, 43, 44, 45, 46, 47, 48, 49, \
					 50, 51, 52, 53, 54, 55, 56, 57, }

#define CONFIG_SYS_NAND_ECCSIZE		512
#define CONFIG_SYS_NAND_ECCBYTES	14

#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE

#undef CONFIG_SYS_NAND_U_BOOT_OFFS
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x200000

#define CONFIG_CMD_NAND
#define MTDIDS_DEFAULT			"nand0=nand"
#define MTDPARTS_DEFAULT		"mtdparts=nand:2m(spl)," \
					"1m(u-boot),1m(u-boot-env)," \
					"1m(dtb),4m(splash)," \
					"6m(kernel),-(rootfs)"
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET		0x300000 /* environment starts here */
#define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
#define CONFIG_SYS_NAND_ONFI_DETECTION
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS		0x400000 /* un-assigned: (using dtb) */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x500000
#define CONFIG_CMD_SPL_WRITE_SIZE	0x2000
#endif

/* GPIO pin + bank to pin ID mapping */
#define GPIO_PIN(_bank, _pin)		((_bank << 5) + _pin)

/* Status LED */
/* Status LED polarity is inversed, so init it in the "off" state */

/* EEPROM */
#define CONFIG_CMD_EEPROM
#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
#define CONFIG_SYS_EEPROM_SIZE			256

#define CONFIG_CMD_EEPROM_LAYOUT
#define CONFIG_EEPROM_LAYOUT_HELP_STRING "v2, v3"

#ifndef CONFIG_SPL_BUILD
/*
 * Enable PCA9555 at I2C0-0x26.
 * First select the I2C0 bus with "i2c dev 0", then use "pca953x" command.
 */
#define CONFIG_PCA953X
#define CONFIG_CMD_PCA953X
#define CONFIG_CMD_PCA953X_INFO
#define CONFIG_SYS_I2C_PCA953X_ADDR	0x26
#define CONFIG_SYS_I2C_PCA953X_WIDTH	{ {0x26, 16} }
#endif /* CONFIG_SPL_BUILD */

#endif	/* __CONFIG_CM_T335_H */
Commit	Line	Data
54e7445d IL	1	/*
	2	* Config file for Compulab CM-T335 board
	3	*
	4	* Copyright (C) 2013, Compulab Ltd - http://compulab.co.il/
	5	*
	6	* Author: Ilya Ledvich <[email protected]>
	7	*
	8	* SPDX-License-Identifier: GPL-2.0+
	9	*/
	10
	11	#ifndef __CONFIG_CM_T335_H
	12	#define __CONFIG_CM_T335_H
	13
	14	#define CONFIG_CM_T335
	15	#define CONFIG_NAND
	16
	17	#include <configs/ti_am335x_common.h>
	18
54e7445d IL	19	#undef CONFIG_SPI
54e7445d IL	20	#undef CONFIG_OMAP3_SPI
54e7445d IL	21	#undef CONFIG_BOOTCOUNT_LIMIT
	22	#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
	23
	24	#undef CONFIG_MAX_RAM_BANK_SIZE
	25	#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* 512MB */
	26
54e7445d IL	27	#define MACH_TYPE_CM_T335 4586 /* Until the next sync */
	28	#define CONFIG_MACH_TYPE MACH_TYPE_CM_T335
	29
	30	/* Clock Defines */
	31	#define V_OSCK 25000000 /* Clock output from T2 */
	32	#define V_SCLK (V_OSCK)
	33
	34	#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
	35
	36	#ifndef CONFIG_SPL_BUILD
	37	#define MMCARGS \
	38	"mmcdev=0\0" \
	39	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
	40	"mmcrootfstype=ext4\0" \
	41	"mmcargs=setenv bootargs console=${console} " \
	42	"root=${mmcroot} " \
	43	"rootfstype=${mmcrootfstype}\0" \
	44	"mmcboot=echo Booting from mmc ...; " \
	45	"run mmcargs; " \
	46	"bootm ${loadaddr}\0"
	47
	48	#define NANDARGS \
	49	"mtdids=" MTDIDS_DEFAULT "\0" \
	50	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	51	"nandroot=ubi0:rootfs rw\0" \
	52	"nandrootfstype=ubifs\0" \
	53	"nandargs=setenv bootargs console=${console} " \
	54	"root=${nandroot} " \
	55	"rootfstype=${nandrootfstype} " \
	56	"ubi.mtd=${rootfs_name}\0" \
	57	"nandboot=echo Booting from nand ...; " \
	58	"run nandargs; " \
	59	"nboot ${loadaddr} nand0 900000; " \
	60	"bootm ${loadaddr}\0"
	61
54e7445d IL	62	#define CONFIG_EXTRA_ENV_SETTINGS \
	63	"loadaddr=82000000\0" \
	64	"console=ttyO0,115200n8\0" \
	65	"rootfs_name=rootfs\0" \
	66	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	67	"bootscript=echo Running bootscript from mmc ...; " \
	68	"source ${loadaddr}\0" \
	69	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
	70	MMCARGS \
	71	NANDARGS
	72
	73	#define CONFIG_BOOTCOMMAND \
	74	"mmc dev ${mmcdev}; if mmc rescan; then " \
	75	"if run loadbootscript; then " \
	76	"run bootscript; " \
	77	"else " \
	78	"if run loaduimage; then " \
	79	"run mmcboot; " \
	80	"else run nandboot; " \
	81	"fi; " \
	82	"fi; " \
	83	"else run nandboot; fi"
	84	#endif /* CONFIG_SPL_BUILD */
	85
	86	#define CONFIG_TIMESTAMP
	87	#define CONFIG_SYS_AUTOLOAD "no"
	88
	89	/* Serial console configuration */
	90	#define CONFIG_CONS_INDEX 1
	91	#define CONFIG_SERIAL1 1 /* UART0 */
	92
	93	/* NS16550 Configuration */
	94	#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
	95	#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
	96	#define CONFIG_BAUDRATE 115200
	97
	98	/* I2C Configuration */
	99	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
	100	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
52658fda	101	#define CONFIG_SYS_I2C_EEPROM_BUS 0
54e7445d IL	102
54e7445d IL	103	/* SPL */
983e3700	104	#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds"
54e7445d IL	105
	106	/* Network. */
	107	#define CONFIG_PHY_GIGE
	108	#define CONFIG_PHYLIB
54e7445d IL	109	#define CONFIG_PHY_ATHEROS
	110
	111	/* NAND support */
	112	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	113	#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
	114	CONFIG_SYS_NAND_PAGE_SIZE)
	115	#define CONFIG_SYS_NAND_PAGE_SIZE 2048
	116	#define CONFIG_SYS_NAND_OOBSIZE 64
	117	#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
	118	#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
	119	#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
	120	10, 11, 12, 13, 14, 15, 16, 17, \
	121	18, 19, 20, 21, 22, 23, 24, 25, \
	122	26, 27, 28, 29, 30, 31, 32, 33, \
	123	34, 35, 36, 37, 38, 39, 40, 41, \
	124	42, 43, 44, 45, 46, 47, 48, 49, \
	125	50, 51, 52, 53, 54, 55, 56, 57, }
	126
	127	#define CONFIG_SYS_NAND_ECCSIZE 512
	128	#define CONFIG_SYS_NAND_ECCBYTES 14
	129
	130	#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
	131
	132	#undef CONFIG_SYS_NAND_U_BOOT_OFFS
	133	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000
	134
	135	#define CONFIG_CMD_NAND
54e7445d IL	136	#define MTDIDS_DEFAULT "nand0=nand"
	137	#define MTDPARTS_DEFAULT "mtdparts=nand:2m(spl)," \
	138	"1m(u-boot),1m(u-boot-env)," \
	139	"1m(dtb),4m(splash)," \
	140	"6m(kernel),-(rootfs)"
	141	#define CONFIG_ENV_IS_IN_NAND
	142	#define CONFIG_ENV_OFFSET 0x300000 /* environment starts here */
	143	#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
	144	#define CONFIG_SYS_NAND_ONFI_DETECTION
434f2cfc	145	#ifdef CONFIG_SPL_OS_BOOT
	146	#define CONFIG_CMD_SPL_NAND_OFS 0x400000 /* un-assigned: (using dtb) */
	147	#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000
	148	#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
	149	#endif
54e7445d IL	150
	151	/* GPIO pin + bank to pin ID mapping */
	152	#define GPIO_PIN(_bank, _pin) ((_bank << 5) + _pin)
	153
e8ac22be	154	/* Status LED */
e8ac22be	155	/* Status LED polarity is inversed, so init it in the "off" state */
e8ac22be	156
0e656b82 NK	157	/* EEPROM */
	158	#define CONFIG_CMD_EEPROM
	159	#define CONFIG_ENV_EEPROM_IS_ON_I2C
	160	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
	161	#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
	162	#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
	163	#define CONFIG_SYS_EEPROM_SIZE 256
	164
	165	#define CONFIG_CMD_EEPROM_LAYOUT
	166	#define CONFIG_EEPROM_LAYOUT_HELP_STRING "v2, v3"
	167
ef62df80 IL	168	#ifndef CONFIG_SPL_BUILD
	169	/*
	170	* Enable PCA9555 at I2C0-0x26.
	171	* First select the I2C0 bus with "i2c dev 0", then use "pca953x" command.
	172	*/
	173	#define CONFIG_PCA953X
	174	#define CONFIG_CMD_PCA953X
	175	#define CONFIG_CMD_PCA953X_INFO
	176	#define CONFIG_SYS_I2C_PCA953X_ADDR 0x26
	177	#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x26, 16} }
	178	#endif /* CONFIG_SPL_BUILD */
	179
54e7445d IL	180	#endif /* __CONFIG_CM_T335_H */
54e7445d IL	181