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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
8d0afcd7 LV |
2 | /* |
3 | * am43xx_evm.h | |
4 | * | |
5 | * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ | |
8d0afcd7 LV |
6 | */ |
7 | ||
8 | #ifndef __CONFIG_AM43XX_EVM_H | |
9 | #define __CONFIG_AM43XX_EVM_H | |
10 | ||
42da5adf | 11 | #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 21) /* 2GB */ |
8d0afcd7 | 12 | #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ |
369cbe1e LV |
13 | |
14 | #include <asm/arch/omap.h> | |
8d0afcd7 LV |
15 | |
16 | /* NS16550 Configuration */ | |
c7b9686d | 17 | #define CONFIG_SYS_NS16550_CLK 48000000 |
19c1c700 LV |
18 | #if !defined(CONFIG_SPL_DM) || !defined(CONFIG_DM_SERIAL) |
19 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
8d0afcd7 | 20 | #define CONFIG_SYS_NS16550_SERIAL |
2a429d23 | 21 | #endif |
8d0afcd7 | 22 | |
9f1a8cd3 | 23 | /* I2C Configuration */ |
9f1a8cd3 | 24 | |
83bad102 TR |
25 | /* Power */ |
26 | #define CONFIG_POWER_TPS65218 | |
403d70ab | 27 | #define CONFIG_POWER_TPS62362 |
83bad102 | 28 | |
369cbe1e | 29 | /* SPL defines. */ |
d3289aac TR |
30 | #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ |
31 | (128 << 20)) | |
8d0afcd7 | 32 | |
573b020e LV |
33 | /* Enabling L2 Cache */ |
34 | #define CONFIG_SYS_L2_PL310 | |
35 | #define CONFIG_SYS_PL310_BASE 0x48242000 | |
573b020e | 36 | |
196311dc TR |
37 | /* |
38 | * When building U-Boot such that there is no previous loader | |
39 | * we need to call board_early_init_f. This is taken care of in | |
40 | * s_init when we have SPL used. | |
41 | */ | |
196311dc | 42 | |
369cbe1e | 43 | /* Now bring in the rest of the common code. */ |
9a0f4004 | 44 | #include <configs/ti_armv7_omap.h> |
8d0afcd7 | 45 | |
369cbe1e LV |
46 | /* Clock Defines */ |
47 | #define V_OSCK 24000000 /* Clock output from T2 */ | |
48 | #define V_SCLK (V_OSCK) | |
8d0afcd7 | 49 | |
369cbe1e LV |
50 | /* NS16550 Configuration */ |
51 | #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ | |
52 | ||
2b36fe57 | 53 | /* SPL USB Support */ |
2b36fe57 | 54 | |
333e4a62 | 55 | #if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD) |
592bc5e2 | 56 | #define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1 |
3d799c7f | 57 | #define CONFIG_USB_XHCI_OMAP |
aee119bd | 58 | #endif |
3d799c7f | 59 | |
9f664920 | 60 | #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USB_GADGET) |
b142729d | 61 | #undef CONFIG_USB_DWC3_PHY_OMAP |
c16bf621 | 62 | #undef CONFIG_USB_DWC3_OMAP |
3457bbaf | 63 | #undef CONFIG_USB_DWC3 |
65403f30 | 64 | #undef CONFIG_USB_DWC3_GADGET |
3457bbaf | 65 | |
aaa4a9e3 | 66 | #undef CONFIG_USB_GADGET_DOWNLOAD |
a59a77f8 | 67 | #undef CONFIG_USB_GADGET_VBUS_DRAW |
a95aee6a MR |
68 | #undef CONFIG_USB_GADGET_MANUFACTURER |
69 | #undef CONFIG_USB_GADGET_VENDOR_NUM | |
70 | #undef CONFIG_USB_GADGET_PRODUCT_NUM | |
3457bbaf | 71 | #undef CONFIG_USB_GADGET_DUALSPEED |
a59a77f8 SP |
72 | #endif |
73 | ||
8aff39e3 M |
74 | /* |
75 | * Disable MMC DM for SPL build and can be re-enabled after adding | |
76 | * DM support in SPL | |
77 | */ | |
78 | #ifdef CONFIG_SPL_BUILD | |
1ce32ba7 | 79 | #undef CONFIG_TIMER |
8aff39e3 M |
80 | #endif |
81 | ||
a69e2c22 KVA |
82 | #ifndef CONFIG_SPL_BUILD |
83 | /* USB Device Firmware Update support */ | |
a69e2c22 KVA |
84 | #define DFUARGS \ |
85 | "dfu_bufsiz=0x10000\0" \ | |
86 | DFU_ALT_INFO_MMC \ | |
87 | DFU_ALT_INFO_EMMC \ | |
42d1b818 | 88 | DFU_ALT_INFO_RAM \ |
f843770a | 89 | DFU_ALT_INFO_QSPI_XIP |
a69e2c22 KVA |
90 | #else |
91 | #define DFUARGS | |
92 | #endif | |
93 | ||
e0c91ae2 TR |
94 | #define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \ |
95 | "bootcmd_" #devtypel "=" \ | |
96 | "run nandboot\0" | |
97 | ||
98 | #define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \ | |
99 | #devtypel #instance " " | |
100 | ||
101 | #define BOOT_TARGET_DEVICES(func) \ | |
102 | func(MMC, mmc, 0) \ | |
103 | func(USB, usb, 0) \ | |
104 | func(NAND, nand, 0) \ | |
105 | func(PXE, pxe, na) \ | |
106 | func(DHCP, dhcp, na) | |
107 | ||
108 | #include <config_distro_bootcmd.h> | |
109 | ||
1564dba7 | 110 | #ifndef CONFIG_SPL_BUILD |
88fdfcd2 | 111 | #include <environment/ti/dfu.h> |
88fdfcd2 | 112 | |
1564dba7 | 113 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
fb3ad9bd | 114 | DEFAULT_LINUX_BOOT_ENV \ |
1564dba7 | 115 | "fdtfile=undefined\0" \ |
e0c91ae2 | 116 | "finduuid=part uuid mmc 0:2 uuid\0" \ |
1564dba7 | 117 | "console=ttyO0,115200n8\0" \ |
0f1b0443 TR |
118 | "partitions=" \ |
119 | "uuid_disk=${uuid_gpt_disk};" \ | |
120 | "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ | |
1564dba7 | 121 | "optargs=\0" \ |
bea0fd5e | 122 | "ramroot=/dev/ram0 rw\0" \ |
1564dba7 | 123 | "ramrootfstype=ext2\0" \ |
1564dba7 LV |
124 | "ramargs=setenv bootargs console=${console} " \ |
125 | "${optargs} " \ | |
126 | "root=${ramroot} " \ | |
127 | "rootfstype=${ramrootfstype}\0" \ | |
2b36fe57 | 128 | "loadramdisk=load ${devtype} ${devnum} ${rdaddr} ramdisk.gz\0" \ |
1564dba7 LV |
129 | "findfdt="\ |
130 | "if test $board_name = AM43EPOS; then " \ | |
131 | "setenv fdtfile am43x-epos-evm.dtb; fi; " \ | |
132 | "if test $board_name = AM43__GP; then " \ | |
133 | "setenv fdtfile am437x-gp-evm.dtb; fi; " \ | |
a5051b72 MS |
134 | "if test $board_name = AM43XXHS; then " \ |
135 | "setenv fdtfile am437x-gp-evm.dtb; fi; " \ | |
9cb9f333 FB |
136 | "if test $board_name = AM43__SK; then " \ |
137 | "setenv fdtfile am437x-sk-evm.dtb; fi; " \ | |
403d70ab FB |
138 | "if test $board_name = AM43_IDK; then " \ |
139 | "setenv fdtfile am437x-idk-evm.dtb; fi; " \ | |
1564dba7 | 140 | "if test $fdtfile = undefined; then " \ |
a69e2c22 | 141 | "echo WARNING: Could not determine device tree; fi; \0" \ |
0ad5eaa4 | 142 | NANDARGS \ |
2320866b | 143 | NETARGS \ |
a69e2c22 | 144 | DFUARGS \ |
e0c91ae2 | 145 | BOOTENV |
1564dba7 | 146 | |
3a3939bf M |
147 | #endif |
148 | ||
f4787eab | 149 | #ifndef CONFIG_SPL_BUILD |
4cdd7fda | 150 | /* CPSW Ethernet */ |
4cdd7fda | 151 | #define CONFIG_NET_RETRY_COUNT 10 |
f4787eab M |
152 | #endif |
153 | ||
d9da26ec | 154 | #define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */ |
3a3939bf | 155 | |
4cdd7fda | 156 | #define CONFIG_SYS_RX_ETH_BUFFER 64 |
4cdd7fda | 157 | |
e53ad4b4 | 158 | /* NAND support */ |
88718be3 | 159 | #ifdef CONFIG_MTD_RAW_NAND |
e53ad4b4 | 160 | /* NAND: device related configs */ |
161 | #define CONFIG_SYS_NAND_PAGE_SIZE 4096 | |
162 | #define CONFIG_SYS_NAND_OOBSIZE 224 | |
163 | #define CONFIG_SYS_NAND_BLOCK_SIZE (256*1024) | |
164 | #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ | |
165 | CONFIG_SYS_NAND_PAGE_SIZE) | |
166 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
167 | /* NAND: driver related configs */ | |
e53ad4b4 | 168 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
169 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW | |
170 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS | |
171 | #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ | |
172 | 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \ | |
173 | 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \ | |
174 | 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \ | |
175 | 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \ | |
176 | 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \ | |
177 | 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \ | |
178 | 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \ | |
179 | 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \ | |
180 | 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \ | |
181 | 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \ | |
182 | 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \ | |
183 | 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \ | |
184 | 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \ | |
185 | 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \ | |
186 | 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \ | |
187 | 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \ | |
188 | 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \ | |
189 | 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \ | |
190 | 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \ | |
191 | 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \ | |
192 | } | |
193 | #define CONFIG_SYS_NAND_ECCSIZE 512 | |
194 | #define CONFIG_SYS_NAND_ECCBYTES 26 | |
e53ad4b4 | 195 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00180000 |
196 | /* NAND: SPL related configs */ | |
e53ad4b4 | 197 | /* NAND: SPL falcon mode configs */ |
198 | #ifdef CONFIG_SPL_OS_BOOT | |
e53ad4b4 | 199 | #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */ |
e53ad4b4 | 200 | #endif |
0ad5eaa4 | 201 | #define NANDARGS \ |
43ede0bc TR |
202 | "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ |
203 | "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ | |
0ad5eaa4 TR |
204 | "nandargs=setenv bootargs console=${console} " \ |
205 | "${optargs} " \ | |
206 | "root=${nandroot} " \ | |
207 | "rootfstype=${nandrootfstype}\0" \ | |
208 | "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \ | |
209 | "nandrootfstype=ubifs rootwait=1\0" \ | |
210 | "nandboot=echo Booting from nand ...; " \ | |
211 | "run nandargs; " \ | |
212 | "nand read ${fdtaddr} NAND.u-boot-spl-os; " \ | |
213 | "nand read ${loadaddr} NAND.kernel; " \ | |
214 | "bootz ${loadaddr} - ${fdtaddr}\0" | |
215 | #define NANDBOOT "run nandboot; " | |
88718be3 | 216 | #else /* !CONFIG_MTD_RAW_NAND */ |
0ad5eaa4 TR |
217 | #define NANDARGS |
218 | #define NANDBOOT | |
88718be3 | 219 | #endif /* CONFIG_MTD_RAW_NAND */ |
e53ad4b4 | 220 | |
373358f2 AD |
221 | #if defined(CONFIG_TI_SECURE_DEVICE) |
222 | /* Avoid relocating onto firewalled area at end of DRAM */ | |
223 | #define CONFIG_PRAM (64 * 1024) | |
224 | #endif /* CONFIG_TI_SECURE_DEVICE */ | |
225 | ||
8d0afcd7 | 226 | #endif /* __CONFIG_AM43XX_EVM_H */ |