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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2e0c1c7d | 2 | /* |
fb9ed23c TD |
3 | * (C) Copyright 2022 Tony Dinh <[email protected]> |
4 | * (C) Copyright 2011 Jason Cooper <[email protected]> | |
2e0c1c7d JC |
5 | * |
6 | * Based on work by: | |
7 | * Marvell Semiconductor <www.marvell.com> | |
8 | * Written-by: Siddarth Gore <[email protected]> | |
2e0c1c7d JC |
9 | */ |
10 | ||
11 | #ifndef _CONFIG_DREAMPLUG_H | |
12 | #define _CONFIG_DREAMPLUG_H | |
13 | ||
f98b3be2 | 14 | #include "mv-common.h" |
2e0c1c7d | 15 | |
2e0c1c7d JC |
16 | /* |
17 | * Default environment variables | |
18 | */ | |
2e0c1c7d JC |
19 | |
20 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
21 | "x_bootcmd_ethernet=ping 192.168.2.1\0" \ | |
22 | "x_bootcmd_usb=usb start\0" \ | |
23 | "x_bootcmd_kernel=fatload usb 0 0x6400000 uImage\0" \ | |
24 | "x_bootargs=console=ttyS0,115200\0" \ | |
25 | "x_bootargs_root=root=/dev/sda2 rootdelay=10\0" | |
26 | ||
27 | /* | |
28 | * Ethernet Driver configuration | |
29 | */ | |
2e0c1c7d JC |
30 | #define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */ |
31 | #define CONFIG_PHY_BASE_ADR 0 | |
2e0c1c7d | 32 | |
46e08f7c TD |
33 | /* |
34 | * SATA Driver configuration | |
35 | */ | |
46e08f7c | 36 | #define CONFIG_LBA48 |
46e08f7c | 37 | |
2e0c1c7d | 38 | #endif /* _CONFIG_DREAMPLUG_H */ |