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3ebb9191 MV |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* | |
3 | * board/renesas/condor/condor.c | |
4 | * This file is Condor board support. | |
5 | * | |
6 | * Copyright (C) 2019 Marek Vasut <[email protected]> | |
7 | */ | |
8 | ||
9 | #include <common.h> | |
657afb14 | 10 | #include <cpu_func.h> |
29a4a9f1 | 11 | #include <hang.h> |
3ebb9191 MV |
12 | #include <asm/processor.h> |
13 | #include <asm/mach-types.h> | |
14 | #include <asm/io.h> | |
15 | #include <linux/errno.h> | |
16 | #include <asm/arch/sys_proto.h> | |
17 | ||
18 | DECLARE_GLOBAL_DATA_PTR; | |
19 | ||
20 | void s_init(void) | |
21 | { | |
22 | } | |
23 | ||
24 | int board_early_init_f(void) | |
25 | { | |
26 | return 0; | |
27 | } | |
28 | ||
29 | int board_init(void) | |
30 | { | |
31 | /* adress of boot parameters */ | |
32 | gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; | |
33 | ||
34 | return 0; | |
35 | } | |
36 | ||
37 | #define RST_BASE 0xE6160000 | |
38 | #define RST_CA57RESCNT (RST_BASE + 0x40) | |
39 | #define RST_CA53RESCNT (RST_BASE + 0x44) | |
40 | #define RST_RSTOUTCR (RST_BASE + 0x58) | |
41 | #define RST_CA57_CODE 0xA5A5000F | |
42 | #define RST_CA53_CODE 0x5A5A000F | |
43 | ||
44 | void reset_cpu(ulong addr) | |
45 | { | |
46 | unsigned long midr, cputype; | |
47 | ||
48 | asm volatile("mrs %0, midr_el1" : "=r" (midr)); | |
49 | cputype = (midr >> 4) & 0xfff; | |
50 | ||
51 | if (cputype == 0xd03) | |
52 | writel(RST_CA53_CODE, RST_CA53RESCNT); | |
53 | else if (cputype == 0xd07) | |
54 | writel(RST_CA57_CODE, RST_CA57RESCNT); | |
55 | else | |
56 | hang(); | |
57 | } |