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8c653124 AW |
1 | /* |
2 | * Copyright 2013 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * Configuration settings for the Freescale Vybrid vf610twr board. | |
5 | * | |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
8c653124 AW |
7 | */ |
8 | ||
9 | #ifndef __CONFIG_H | |
10 | #define __CONFIG_H | |
11 | ||
12 | #include <asm/arch/imx-regs.h> | |
8c653124 | 13 | |
18fb0e3c | 14 | #define CONFIG_SYS_FSL_CLK |
8c653124 AW |
15 | |
16 | #define CONFIG_MACH_TYPE 4146 | |
17 | ||
18 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
19 | ||
20 | /* Enable passing of ATAGs */ | |
21 | #define CONFIG_CMDLINE_TAG | |
22 | ||
8c653124 AW |
23 | #ifdef CONFIG_CMD_FUSE |
24 | #define CONFIG_MXC_OCOTP | |
25 | #endif | |
26 | ||
27 | /* Size of malloc() pool */ | |
28 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) | |
29 | ||
8c653124 AW |
30 | /* Allow to overwrite serial and ethaddr */ |
31 | #define CONFIG_ENV_OVERWRITE | |
8c653124 | 32 | |
d6d07a9b | 33 | /* NAND support */ |
8fca2d8c | 34 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
d6d07a9b SA |
35 | |
36 | #ifdef CONFIG_CMD_NAND | |
d6d07a9b SA |
37 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
38 | #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR | |
39 | ||
d6d07a9b | 40 | /* Dynamic MTD partition support */ |
d6d07a9b SA |
41 | #define CONFIG_MTD_PARTITIONS |
42 | #define CONFIG_MTD_DEVICE | |
d6d07a9b SA |
43 | #endif |
44 | ||
8c653124 AW |
45 | #define CONFIG_FSL_ESDHC |
46 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
47 | #define CONFIG_SYS_FSL_ESDHC_NUM 1 | |
48 | ||
8c653124 AW |
49 | #define CONFIG_FEC_MXC |
50 | #define CONFIG_MII | |
51 | #define IMX_FEC_BASE ENET_BASE_ADDR | |
52 | #define CONFIG_FEC_XCV_TYPE RMII | |
53 | #define CONFIG_FEC_MXC_PHYADDR 0 | |
8c653124 | 54 | |
cb6d04d6 | 55 | /* QSPI Configs*/ |
cb6d04d6 CF |
56 | |
57 | #ifdef CONFIG_FSL_QSPI | |
cb6d04d6 CF |
58 | #define FSL_QSPI_FLASH_SIZE (1 << 24) |
59 | #define FSL_QSPI_FLASH_NUM 2 | |
60 | #define CONFIG_SYS_FSL_QSPI_LE | |
61 | #endif | |
62 | ||
1221b3d7 | 63 | /* I2C Configs */ |
b089d039 | 64 | #define CONFIG_SYS_I2C |
65 | #define CONFIG_SYS_I2C_MXC | |
03544c66 AA |
66 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
67 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | |
b089d039 | 68 | #define CONFIG_SYS_SPD_BUS_NUM 0 |
1221b3d7 | 69 | |
8c653124 | 70 | |
cf04ad32 | 71 | #define CONFIG_SYS_LOAD_ADDR 0x82000000 |
b188067f SA |
72 | |
73 | /* We boot from the gfxRAM area of the OCRAM. */ | |
c0f432c3 | 74 | #define CONFIG_BOARD_SIZE_LIMIT 520192 |
8c653124 | 75 | |
cf04ad32 SA |
76 | /* |
77 | * We do have 128MB of memory on the Vybrid Tower board. Leave the last | |
78 | * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from | |
79 | * DDR3. Hence, limit the memory range for image processing to 112MB | |
80 | * using bootm_size. All of the following must be within this range. | |
81 | * We have the default load at 32MB into DDR (for the kernel), FDT at | |
82 | * 64MB and the ramdisk 512KB above that (allowing for hopefully never | |
83 | * seen large trees). This allows a reasonable split between ramdisk | |
84 | * and kernel size, where the ram disk can be a bit larger. | |
85 | */ | |
86 | #define MEM_LAYOUT_ENV_SETTINGS \ | |
87 | "bootm_size=0x07000000\0" \ | |
88 | "loadaddr=0x82000000\0" \ | |
89 | "kernel_addr_r=0x82000000\0" \ | |
90 | "fdt_addr=0x84000000\0" \ | |
91 | "fdt_addr_r=0x84000000\0" \ | |
92 | "rdaddr=0x84080000\0" \ | |
93 | "ramdisk_addr_r=0x84080000\0" | |
94 | ||
ca21f61e | 95 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
cf04ad32 | 96 | MEM_LAYOUT_ENV_SETTINGS \ |
ca21f61e | 97 | "script=boot.scr\0" \ |
c0a5b081 | 98 | "image=zImage\0" \ |
ca21f61e | 99 | "console=ttyLP1\0" \ |
ca21f61e | 100 | "fdt_file=vf610-twr.dtb\0" \ |
ca21f61e OS |
101 | "boot_fdt=try\0" \ |
102 | "ip_dyn=yes\0" \ | |
103 | "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ | |
104 | "mmcpart=1\0" \ | |
105 | "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ | |
106 | "update_sd_firmware_filename=u-boot.imx\0" \ | |
107 | "update_sd_firmware=" \ | |
108 | "if test ${ip_dyn} = yes; then " \ | |
109 | "setenv get_cmd dhcp; " \ | |
110 | "else " \ | |
111 | "setenv get_cmd tftp; " \ | |
112 | "fi; " \ | |
113 | "if mmc dev ${mmcdev}; then " \ | |
114 | "if ${get_cmd} ${update_sd_firmware_filename}; then " \ | |
115 | "setexpr fw_sz ${filesize} / 0x200; " \ | |
116 | "setexpr fw_sz ${fw_sz} + 1; " \ | |
117 | "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ | |
118 | "fi; " \ | |
119 | "fi\0" \ | |
120 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ | |
121 | "root=${mmcroot}\0" \ | |
122 | "loadbootscript=" \ | |
123 | "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | |
124 | "bootscript=echo Running bootscript from mmc ...; " \ | |
125 | "source\0" \ | |
c0a5b081 | 126 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ |
ca21f61e OS |
127 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ |
128 | "mmcboot=echo Booting from mmc ...; " \ | |
129 | "run mmcargs; " \ | |
130 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
131 | "if run loadfdt; then " \ | |
c0a5b081 | 132 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
ca21f61e OS |
133 | "else " \ |
134 | "if test ${boot_fdt} = try; then " \ | |
c0a5b081 | 135 | "bootz; " \ |
ca21f61e OS |
136 | "else " \ |
137 | "echo WARN: Cannot load the DT; " \ | |
138 | "fi; " \ | |
139 | "fi; " \ | |
140 | "else " \ | |
c0a5b081 | 141 | "bootz; " \ |
ca21f61e OS |
142 | "fi;\0" \ |
143 | "netargs=setenv bootargs console=${console},${baudrate} " \ | |
144 | "root=/dev/nfs " \ | |
145 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ | |
146 | "netboot=echo Booting from net ...; " \ | |
147 | "run netargs; " \ | |
148 | "if test ${ip_dyn} = yes; then " \ | |
149 | "setenv get_cmd dhcp; " \ | |
150 | "else " \ | |
151 | "setenv get_cmd tftp; " \ | |
152 | "fi; " \ | |
c0a5b081 | 153 | "${get_cmd} ${image}; " \ |
ca21f61e OS |
154 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
155 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ | |
c0a5b081 | 156 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
ca21f61e OS |
157 | "else " \ |
158 | "if test ${boot_fdt} = try; then " \ | |
c0a5b081 | 159 | "bootz; " \ |
ca21f61e OS |
160 | "else " \ |
161 | "echo WARN: Cannot load the DT; " \ | |
162 | "fi; " \ | |
163 | "fi; " \ | |
164 | "else " \ | |
c0a5b081 | 165 | "bootz; " \ |
ca21f61e OS |
166 | "fi;\0" |
167 | ||
168 | #define CONFIG_BOOTCOMMAND \ | |
169 | "mmc dev ${mmcdev}; if mmc rescan; then " \ | |
170 | "if run loadbootscript; then " \ | |
171 | "run bootscript; " \ | |
172 | "else " \ | |
c0a5b081 | 173 | "if run loadimage; then " \ |
ca21f61e OS |
174 | "run mmcboot; " \ |
175 | "else run netboot; " \ | |
176 | "fi; " \ | |
177 | "fi; " \ | |
178 | "else run netboot; fi" | |
179 | ||
8c653124 AW |
180 | /* Miscellaneous configurable options */ |
181 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
8c653124 | 182 | #undef CONFIG_AUTO_COMPLETE |
8c653124 | 183 | |
8c653124 AW |
184 | #define CONFIG_SYS_MEMTEST_START 0x80010000 |
185 | #define CONFIG_SYS_MEMTEST_END 0x87C00000 | |
186 | ||
8c653124 AW |
187 | /* Physical memory map */ |
188 | #define CONFIG_NR_DRAM_BANKS 1 | |
189 | #define PHYS_SDRAM (0x80000000) | |
190 | #define PHYS_SDRAM_SIZE (128 * 1024 * 1024) | |
191 | ||
192 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
193 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
194 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
195 | ||
196 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
197 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
198 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
199 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
200 | ||
d6d07a9b | 201 | #ifdef CONFIG_ENV_IS_IN_MMC |
8c653124 | 202 | #define CONFIG_ENV_SIZE (8 * 1024) |
8c653124 AW |
203 | |
204 | #define CONFIG_ENV_OFFSET (12 * 64 * 1024) | |
205 | #define CONFIG_SYS_MMC_ENV_DEV 0 | |
d6d07a9b SA |
206 | #endif |
207 | ||
208 | #ifdef CONFIG_ENV_IS_IN_NAND | |
209 | #define CONFIG_ENV_SIZE (64 * 2048) | |
210 | #define CONFIG_ENV_SECT_SIZE (64 * 2048) | |
211 | #define CONFIG_ENV_RANGE (512 * 1024) | |
212 | #define CONFIG_ENV_OFFSET 0x180000 | |
213 | #endif | |
8c653124 | 214 | |
8c653124 | 215 | #endif |