[u-boot.git] / arch / arm / dts / fsl-sch-30842.dtsi

// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
 * Device tree fragment for RCW SCH-30842 card
 *
 * Copyright 2019-2021 NXP
 */

/*
 * SCH-30842 is a single port add-on card used with various FSL QDS boards.
 * It integrates a AQR112 PHY, which supports several protocols - SGMII,
 * 2500base-x, USXGMII, 10GBase-R.
 * PHY address is 0x02.
 */
phy@02 {
	reg = <0x02>;
	mdi-reversal = <1>;
	smb-addr = <0x25>;
};
Commit	Line	Data
a7fdac7e AM	1	// SPDX-License-Identifier: GPL-2.0+ OR X11
	2	/*
	3	* Device tree fragment for RCW SCH-30842 card
	4	*
66fd01fe	5	* Copyright 2019-2021 NXP
a7fdac7e AM	6	*/
	7
	8	/*
	9	* SCH-30842 is a single port add-on card used with various FSL QDS boards.
	10	* It integrates a AQR112 PHY, which supports several protocols - SGMII,
7c2d5d16	11	* 2500base-x, USXGMII, 10GBase-R.
a7fdac7e AM	12	* PHY address is 0x02.
	13	*/
	14	phy@02 {
	15	reg = <0x02>;
	16	mdi-reversal = <1>;
	17	smb-addr = <0x25>;
	18	};