[u-boot.git] / include / configs / snapper9g45.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Bluewater Systems Snapper 9G45 module
 *
 * (C) Copyright 2011 Bluewater Systems
 *   Author: Andre Renaud <[email protected]>
 *   Author: Ryan Mallon <[email protected]>
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* SoC type is defined in boards.cfg */
#include <asm/hardware.h>
#include <linux/sizes.h>

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
#define CONFIG_SYS_AT91_SLOW_CLOCK	32768

/* CPU */
#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs	*/
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY

/* SDRAM */
#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS6
#define CONFIG_SYS_SDRAM_SIZE		(128 * 1024 * 1024) /* 64MB */
#define CONFIG_SYS_INIT_SP_ADDR		(ATMEL_BASE_SRAM + 0x1000 - \
					 GENERATED_GBL_DATA_SIZE)

/* Mem test settings */

/* NAND Flash */
#define CONFIG_SYS_NAND_ECC_BASE	ATMEL_BASE_ECC
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
#define CONFIG_SYS_NAND_DBW_8
#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21) /* AD21 */
#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22) /* AD22 */
#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC8

/* Ethernet */
#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT		20
#define CONFIG_RESET_PHY_R
#define CONFIG_AT91_WANTS_COMMON_PHY
#define CONFIG_TFTP_PORT

/* MMC */
#define CONFIG_GENERIC_ATMEL_MCI

/* LCD */
#define CONFIG_ATMEL_LCD
#define CONFIG_GURNARD_SPLASH

/* GPIOs and IO expander */
#define CONFIG_ATMEL_LEGACY
#define CONFIG_AT91_GPIO_PULLUP		1

/* UARTs/Serial console */

/* Boot options */
#define CONFIG_SYS_LOAD_ADDR		0x23000000

#define CONFIG_BOOTP_BOOTFILESIZE

/* Environment settings */

#define	CONFIG_EXTRA_ENV_SETTINGS	\
	"ethaddr=00:00:00:00:00:00\0" \
	"serial=0\0" \
	"stdout=serial_atmel\0" \
	"stderr=serial_atmel\0" \
	"stdin=serial_atmel\0" \
	"bootlimit=3\0" \
	"loadaddr=0x71000000\0" \
	"board_rev=2\0" \
	"bootfile=/tftpboot/uImage\0" \
	"bootargs_def=console=ttyS0,115200 panic=5 quiet lpj=997376\0" \
	"nfsroot=/export/root\0" \
	"boot_working=setenv bootargs $bootargs_def; nboot $loadaddr 0 0x20c0000 && bootm\0" \
	"boot_safe=setenv bootargs $bootargs_def; nboot $loadaddr 0 0xc0000 && bootm\0" \
	"boot_tftp=setenv bootargs $bootargs_def ip=any nfsroot=$nfsroot; setenv autoload y && bootp && bootm\0" \
	"boot_usb=setenv bootargs $bootargs_def; usb start && usb storage && fatload usb 0:1 $loadaddr dds-xm200.bin && bootm\0" \
	"boot_mmc=setenv bootargs $bootargs_def; mmc rescan && fatload mmc 0:1 $loadaddr dds-xm200.bin && bootm\0" \
	"bootcmd=run boot_mmc ; run boot_usb ; run boot_working ; run boot_safe\0" \
	"altbootcmd=run boot_mmc ; run boot_usb ; run boot_safe ; run boot_working\0"

/* Console settings */

/* U-Boot memory settings */
#define CONFIG_SYS_MALLOC_LEN		(1 << 20)

#endif /* __CONFIG_H */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
885fc03a AR	2	/*
	3	* Bluewater Systems Snapper 9G45 module
	4	*
	5	* (C) Copyright 2011 Bluewater Systems
	6	* Author: Andre Renaud <[email protected]>
	7	* Author: Ryan Mallon <[email protected]>
885fc03a AR	8	*/
	9
	10	#ifndef __CONFIG_H
	11	#define __CONFIG_H
	12
	13	/* SoC type is defined in boards.cfg */
	14	#include <asm/hardware.h>
	15	#include <linux/sizes.h>
	16
885fc03a AR	17	/* ARM asynchronous clock */
	18	#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
	19	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
	20
	21	/* CPU */
	22	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	23	#define CONFIG_SETUP_MEMORY_TAGS
	24	#define CONFIG_INITRD_TAG
	25	#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
885fc03a AR	26
885fc03a AR	27	/* SDRAM */
885fc03a AR	28	#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
	29	#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) /* 64MB */
	30	#define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM + 0x1000 - \
	31	GENERATED_GBL_DATA_SIZE)
	32
	33	/* Mem test settings */
885fc03a AR	34
885fc03a AR	35	/* NAND Flash */
885fc03a	36	#define CONFIG_SYS_NAND_ECC_BASE ATMEL_BASE_ECC
885fc03a AR	37	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	38	#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
	39	#define CONFIG_SYS_NAND_DBW_8
	40	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */
	41	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */
	42	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
	43	#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
	44
	45	/* Ethernet */
	46	#define CONFIG_MACB
	47	#define CONFIG_RMII
	48	#define CONFIG_NET_RETRY_COUNT 20
	49	#define CONFIG_RESET_PHY_R
	50	#define CONFIG_AT91_WANTS_COMMON_PHY
	51	#define CONFIG_TFTP_PORT
885fc03a	52
885fc03a	53	/* MMC */
885fc03a AR	54	#define CONFIG_GENERIC_ATMEL_MCI
	55
	56	/* LCD */
	57	#define CONFIG_ATMEL_LCD
885fc03a AR	58	#define CONFIG_GURNARD_SPLASH
885fc03a AR	59
885fc03a AR	60	/* GPIOs and IO expander */
885fc03a AR	61	#define CONFIG_ATMEL_LEGACY
885fc03a AR	62	#define CONFIG_AT91_GPIO_PULLUP 1
	63
	64	/* UARTs/Serial console */
885fc03a AR	65
	66	/* Boot options */
	67	#define CONFIG_SYS_LOAD_ADDR 0x23000000
885fc03a AR	68
885fc03a AR	69	#define CONFIG_BOOTP_BOOTFILESIZE
885fc03a AR	70
885fc03a AR	71	/* Environment settings */
885fc03a AR	72
	73	#define CONFIG_EXTRA_ENV_SETTINGS \
	74	"ethaddr=00:00:00:00:00:00\0" \
	75	"serial=0\0" \
	76	"stdout=serial_atmel\0" \
	77	"stderr=serial_atmel\0" \
	78	"stdin=serial_atmel\0" \
	79	"bootlimit=3\0" \
	80	"loadaddr=0x71000000\0" \
	81	"board_rev=2\0" \
	82	"bootfile=/tftpboot/uImage\0" \
	83	"bootargs_def=console=ttyS0,115200 panic=5 quiet lpj=997376\0" \
	84	"nfsroot=/export/root\0" \
	85	"boot_working=setenv bootargs $bootargs_def; nboot $loadaddr 0 0x20c0000 && bootm\0" \
	86	"boot_safe=setenv bootargs $bootargs_def; nboot $loadaddr 0 0xc0000 && bootm\0" \
	87	"boot_tftp=setenv bootargs $bootargs_def ip=any nfsroot=$nfsroot; setenv autoload y && bootp && bootm\0" \
	88	"boot_usb=setenv bootargs $bootargs_def; usb start && usb storage && fatload usb 0:1 $loadaddr dds-xm200.bin && bootm\0" \
	89	"boot_mmc=setenv bootargs $bootargs_def; mmc rescan && fatload mmc 0:1 $loadaddr dds-xm200.bin && bootm\0" \
	90	"bootcmd=run boot_mmc ; run boot_usb ; run boot_working ; run boot_safe\0" \
	91	"altbootcmd=run boot_mmc ; run boot_usb ; run boot_safe ; run boot_working\0"
	92
	93	/* Console settings */
885fc03a AR	94
	95	/* U-Boot memory settings */
	96	#define CONFIG_SYS_MALLOC_LEN (1 << 20)
	97
885fc03a	98	#endif /* __CONFIG_H */