]> Git Repo - u-boot.git/blame - include/dm/uclass-id.h
bootstd: Add the bootdev uclass
[u-boot.git] / include / dm / uclass-id.h
CommitLineData
83d290c5 1/* SPDX-License-Identifier: GPL-2.0+ */
6494d708
SG
2/*
3 * Copyright (c) 2013 Google, Inc
4 *
5 * (C) Copyright 2012
6 * Pavel Herrmann <[email protected]>
6494d708
SG
7 */
8
9#ifndef _DM_UCLASS_ID_H
10#define _DM_UCLASS_ID_H
11
12/* TODO([email protected]): this could be compile-time generated */
13enum uclass_id {
14 /* These are used internally by driver model */
15 UCLASS_ROOT = 0,
16 UCLASS_DEMO,
17 UCLASS_TEST,
18 UCLASS_TEST_FDT,
93f44e8a 19 UCLASS_TEST_FDT_MANUAL,
1ca7e206 20 UCLASS_TEST_BUS,
98561572 21 UCLASS_TEST_PROBE,
e8d52918 22 UCLASS_TEST_DUMMY,
dc12ebbb 23 UCLASS_TEST_DEVRES,
f50cc952 24 UCLASS_TEST_ACPI,
c60e1f25 25 UCLASS_SPI_EMUL, /* sandbox SPI device emulator */
c70c71d8 26 UCLASS_I2C_EMUL, /* sandbox I2C device emulator */
b7c25b11 27 UCLASS_I2C_EMUL_PARENT, /* parent for I2C device emulators */
36d0d3b4 28 UCLASS_PCI_EMUL, /* sandbox PCI device emulator */
9b69ba4a 29 UCLASS_PCI_EMUL_PARENT, /* parent for PCI device emulators */
019808f9 30 UCLASS_USB_EMUL, /* sandbox USB bus device emulator */
9a8bcabd 31 UCLASS_AXI_EMUL, /* sandbox AXI bus device emulator */
6494d708 32
3d7cf419 33 /* U-Boot uclasses start here - in alphabetical order */
6c6d88e1 34 UCLASS_ACPI_PMC, /* (x86) Power-management controller (PMC) */
5decbf53 35 UCLASS_ADC, /* Analog-to-digital converter */
a219639d 36 UCLASS_AHCI, /* SATA disk controller */
ce6d99a0 37 UCLASS_AUDIO_CODEC, /* Audio codec with control and data path */
759a99c2 38 UCLASS_AXI, /* AXI bus */
09d71aac 39 UCLASS_BLK, /* Block device */
ebb73de1 40 UCLASS_BOOTCOUNT, /* Bootcount backing store */
201417d7 41 UCLASS_BOOTDEV, /* Boot device for locating an OS to boot */
ef5e3891 42 UCLASS_BOOTSTD, /* Standard boot driver */
30d66db7 43 UCLASS_BUTTON, /* Button */
84b124db 44 UCLASS_CACHE, /* Cache controller */
f26c8a8e 45 UCLASS_CLK, /* Clock source, e.g. used by peripherals */
3d7cf419
SG
46 UCLASS_CPU, /* CPU, typically part of an SoC */
47 UCLASS_CROS_EC, /* Chrome OS EC */
2dcf1433 48 UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */
23f965a4 49 UCLASS_DSI_HOST, /* Display Serial Interface host */
a0594cef 50 UCLASS_DMA, /* Direct Memory Access */
fc054d56 51 UCLASS_DSA, /* Distributed (Ethernet) Switch Architecture */
1d54af13 52 UCLASS_ECDSA, /* Elliptic curve cryptographic device */
2abd8d1c 53 UCLASS_EFI_LOADER, /* Devices created by UEFI applications */
42b7f421 54 UCLASS_EFI_MEDIA, /* Devices provided by UEFI firmware */
3d7cf419 55 UCLASS_ETH, /* Ethernet device */
5fe419ef 56 UCLASS_ETH_PHY, /* Ethernet PHY device */
759a99c2 57 UCLASS_FIRMWARE, /* Firmware */
62030004 58 UCLASS_FS_FIRMWARE_LOADER, /* Generic loader */
0040b944 59 UCLASS_GPIO, /* Bank of general-purpose I/O pins */
4deaff79 60 UCLASS_HASH, /* Hash device */
7f84fc67 61 UCLASS_HWSPINLOCK, /* Hardware semaphores */
c6202d85 62 UCLASS_I2C, /* I2C bus */
20142019 63 UCLASS_I2C_EEPROM, /* I2C EEPROM device */
3d7cf419 64 UCLASS_I2C_GENERIC, /* Generic I2C device */
3d1957f0 65 UCLASS_I2C_MUX, /* I2C multiplexer */
e96fa6c9 66 UCLASS_I2S, /* I2S bus */
68e6f221 67 UCLASS_IDE, /* IDE device */
40dbf03d 68 UCLASS_IOMMU, /* IOMMU */
e76187a3 69 UCLASS_IRQ, /* Interrupt controller */
34ab37ee 70 UCLASS_KEYBOARD, /* Keyboard input device */
5917112c 71 UCLASS_LED, /* Light-emitting diode (LED) */
3d7cf419 72 UCLASS_LPC, /* x86 'low pin count' interface */
6238935d 73 UCLASS_MAILBOX, /* Mailbox controller */
3d7cf419 74 UCLASS_MASS_STORAGE, /* Mass storage device */
c3452b50 75 UCLASS_MDIO, /* MDIO bus */
8880edba 76 UCLASS_MDIO_MUX, /* MDIO MUX/switch */
4395e06e 77 UCLASS_MISC, /* Miscellaneous device */
e7ecf7cb 78 UCLASS_MMC, /* SD / MMC card or chip */
31d2b4fd 79 UCLASS_MOD_EXP, /* RSA Mod Exp device */
d8587993 80 UCLASS_MTD, /* Memory Technology Device (MTD) device */
0ad40b24 81 UCLASS_MUX, /* Multiplexer device */
07e33711 82 UCLASS_NOP, /* No-op devices */
5544757c 83 UCLASS_NORTHBRIDGE, /* Intel Northbridge / SDRAM controller */
ffab6945 84 UCLASS_NVME, /* NVM Express device */
5bee27aa 85 UCLASS_P2SB, /* (x86) Primary-to-Sideband Bus */
f563dc1d 86 UCLASS_PANEL, /* Display panel, such as an LCD */
363bf77a 87 UCLASS_PANEL_BACKLIGHT, /* Backlight controller for panel */
3d7cf419 88 UCLASS_PCH, /* x86 platform controller hub */
ff3e077b 89 UCLASS_PCI, /* PCI bus */
914026d2 90 UCLASS_PCI_EP, /* PCI endpoint device */
ff3e077b 91 UCLASS_PCI_GENERIC, /* Generic PCI bus device */
72e5016f 92 UCLASS_PHY, /* Physical Layer (PHY) device */
d90a5a30 93 UCLASS_PINCONFIG, /* Pin configuration node device */
6f0e7a36 94 UCLASS_PINCTRL, /* Pinctrl (pin muxing/configuration) device */
4e389366 95 UCLASS_PMIC, /* PMIC I/O device */
61f5ddcb 96 UCLASS_POWER_DOMAIN, /* (SoC) Power domains */
759a99c2 97 UCLASS_PWM, /* Pulse-width modulator */
5fd6badb 98 UCLASS_PWRSEQ, /* Power sequence device */
5b0b43e0 99 UCLASS_QFW, /* QEMU firmware config device */
6f0e7a36 100 UCLASS_RAM, /* RAM controller */
2541ce2c 101 UCLASS_REBOOT_MODE, /* Reboot mode */
4e389366 102 UCLASS_REGULATOR, /* Regulator device */
ddf56bc7 103 UCLASS_REMOTEPROC, /* Remote Processor device */
89c1e2da 104 UCLASS_RESET, /* Reset controller device */
a2487684 105 UCLASS_RNG, /* Random Number Generator */
3d7cf419 106 UCLASS_RTC, /* Real time clock device */
358599ef 107 UCLASS_SCMI_AGENT, /* Interface with an SCMI server */
e8a016b5 108 UCLASS_SCSI, /* SCSI device */
3d7cf419 109 UCLASS_SERIAL, /* Serial UART */
25cbb470 110 UCLASS_SIMPLE_BUS, /* Bus with child devices */
7b384ecc 111 UCLASS_SMEM, /* Shared memory interface */
6d3b82df 112 UCLASS_SOC, /* SOC Device */
d4901898 113 UCLASS_SOUND, /* Playing simple sounds */
3d7cf419 114 UCLASS_SPI, /* SPI bus */
3d7cf419 115 UCLASS_SPI_FLASH, /* SPI flash */
4e389366 116 UCLASS_SPI_GENERIC, /* Generic SPI flash target */
759a99c2 117 UCLASS_SPMI, /* System Power Management Interface bus */
57251285 118 UCLASS_SYSCON, /* System configuration device */
3a8ee3df 119 UCLASS_SYSINFO, /* Device information from hardware */
11636258 120 UCLASS_SYSRESET, /* System reset device */
9ff4a311 121 UCLASS_TEE, /* Trusted Execution Environment device */
3d7cf419 122 UCLASS_THERMAL, /* Thermal sensor */
c8a7ba9e 123 UCLASS_TIMER, /* Timer device */
f255d31f 124 UCLASS_TPM, /* Trusted Platform Module TIS interface */
7feafb0a 125 UCLASS_UFS, /* Universal Flash Storage */
de31213f 126 UCLASS_USB, /* USB bus */
449230f0 127 UCLASS_USB_DEV_GENERIC, /* USB generic device */
3d7cf419 128 UCLASS_USB_HUB, /* USB hub */
01311624 129 UCLASS_USB_GADGET_GENERIC, /* USB generic device */
1acafc73 130 UCLASS_VIDEO, /* Video or LCD device */
801ab9e9 131 UCLASS_VIDEO_BRIDGE, /* Video bridge, e.g. DisplayPort to LVDS */
83510766 132 UCLASS_VIDEO_CONSOLE, /* Text console driver for video device */
39a336f1 133 UCLASS_VIDEO_OSD, /* On-screen display */
8fb49b4c 134 UCLASS_VIRTIO, /* VirtIO transport device */
d3e19cf9 135 UCLASS_W1, /* Dallas 1-Wire bus */
c924ee25 136 UCLASS_W1_EEPROM, /* one-wire EEPROMs */
72384ff2 137 UCLASS_WDT, /* Watchdog Timer driver */
722bc5b5 138 UCLASS_PVBLOCK, /* Xen virtual block device */
6494d708
SG
139
140 UCLASS_COUNT,
141 UCLASS_INVALID = -1,
142};
143
144#endif
This page took 0.449332 seconds and 4 git commands to generate.