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69018ce2 KG |
1 | /* |
2 | * Copyright 2008 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * (C) Copyright 2000 | |
5 | * Wolfgang Denk, DENX Software Engineering, [email protected]. | |
6 | * | |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
69018ce2 KG |
8 | */ |
9 | ||
10 | #include <common.h> | |
11 | #include <libfdt.h> | |
12 | #include <fdt_support.h> | |
13 | #include "qe.h" | |
14 | ||
15 | DECLARE_GLOBAL_DATA_PTR; | |
16 | ||
17 | /* | |
18 | * If a QE firmware has been uploaded, then add the 'firmware' node under | |
19 | * the 'qe' node. | |
20 | */ | |
21 | void fdt_fixup_qe_firmware(void *blob) | |
22 | { | |
23 | struct qe_firmware_info *qe_fw_info; | |
24 | int node, ret; | |
25 | ||
26 | qe_fw_info = qe_get_firmware_info(); | |
27 | if (!qe_fw_info) | |
28 | return; | |
29 | ||
30 | node = fdt_path_offset(blob, "/qe"); | |
31 | if (node < 0) | |
32 | return; | |
33 | ||
34 | /* We assume the node doesn't exist yet */ | |
35 | node = fdt_add_subnode(blob, node, "firmware"); | |
36 | if (node < 0) | |
37 | return; | |
38 | ||
39 | ret = fdt_setprop(blob, node, "extended-modes", | |
40 | &qe_fw_info->extended_modes, sizeof(u64)); | |
41 | if (ret < 0) | |
42 | goto error; | |
43 | ||
44 | ret = fdt_setprop_string(blob, node, "id", qe_fw_info->id); | |
45 | if (ret < 0) | |
46 | goto error; | |
47 | ||
48 | ret = fdt_setprop(blob, node, "virtual-traps", qe_fw_info->vtraps, | |
49 | sizeof(qe_fw_info->vtraps)); | |
50 | if (ret < 0) | |
51 | goto error; | |
52 | ||
53 | return; | |
54 | ||
55 | error: | |
56 | fdt_del_node(blob, node); | |
57 | } | |
58 | ||
59 | void ft_qe_setup(void *blob) | |
60 | { | |
69018ce2 | 61 | do_fixup_by_prop_u32(blob, "device_type", "qe", 4, |
45bae2e3 | 62 | "bus-frequency", gd->arch.qe_clk, 1); |
69018ce2 | 63 | do_fixup_by_prop_u32(blob, "device_type", "qe", 4, |
1206c184 | 64 | "brg-frequency", gd->arch.brg_clk, 1); |
69018ce2 | 65 | do_fixup_by_compat_u32(blob, "fsl,qe", |
45bae2e3 | 66 | "clock-frequency", gd->arch.qe_clk, 1); |
69018ce2 | 67 | do_fixup_by_compat_u32(blob, "fsl,qe", |
45bae2e3 | 68 | "bus-frequency", gd->arch.qe_clk, 1); |
69018ce2 | 69 | do_fixup_by_compat_u32(blob, "fsl,qe", |
1206c184 | 70 | "brg-frequency", gd->arch.brg_clk, 1); |
3fca8037 | 71 | do_fixup_by_compat_u32(blob, "fsl,qe-gtm", |
45bae2e3 | 72 | "clock-frequency", gd->arch.qe_clk / 2, 1); |
69018ce2 | 73 | fdt_fixup_qe_firmware(blob); |
69018ce2 | 74 | } |