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Commit | Line | Data |
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3c5d0e34 SG |
1 | /* |
2 | * (C) Copyright 2015 Google, Inc | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0 | |
5 | */ | |
6 | ||
7 | #include <common.h> | |
8 | #include <dm.h> | |
9 | #include <errno.h> | |
11636258 | 10 | #include <sysreset.h> |
3c5d0e34 SG |
11 | #include <asm/io.h> |
12 | #include <asm/arch/clock.h> | |
13 | #include <asm/arch/cru_rk3288.h> | |
14 | #include <asm/arch/hardware.h> | |
15 | #include <linux/err.h> | |
16 | ||
11636258 | 17 | int rk3288_sysreset_request(struct udevice *dev, enum sysreset_t type) |
3c5d0e34 SG |
18 | { |
19 | struct rk3288_cru *cru = rockchip_get_cru(); | |
20 | ||
21 | if (IS_ERR(cru)) | |
22 | return PTR_ERR(cru); | |
23 | switch (type) { | |
11636258 | 24 | case SYSRESET_WARM: |
a49dc0a9 | 25 | rk_clrreg(&cru->cru_mode_con, 0xffff); |
3c5d0e34 SG |
26 | writel(0xeca8, &cru->cru_glb_srst_snd_value); |
27 | break; | |
11636258 | 28 | case SYSRESET_COLD: |
a49dc0a9 | 29 | rk_clrreg(&cru->cru_mode_con, 0xffff); |
3c5d0e34 SG |
30 | writel(0xfdb9, &cru->cru_glb_srst_fst_value); |
31 | break; | |
32 | default: | |
33 | return -EPROTONOSUPPORT; | |
34 | } | |
35 | ||
36 | return -EINPROGRESS; | |
37 | } | |
38 | ||
11636258 SW |
39 | static struct sysreset_ops rk3288_sysreset = { |
40 | .request = rk3288_sysreset_request, | |
3c5d0e34 SG |
41 | }; |
42 | ||
11636258 SW |
43 | U_BOOT_DRIVER(sysreset_rk3288) = { |
44 | .name = "rk3288_sysreset", | |
45 | .id = UCLASS_SYSRESET, | |
46 | .ops = &rk3288_sysreset, | |
3c5d0e34 | 47 | }; |